SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
idle_cnt_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
reg_integ_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
shadow_storage_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 2828 | 1 | T7 | 1 | T8 | 1 | T5 | 1 | ||||
auto[1] | 280 | 1 | T51 | 40 | T52 | 40 | T53 | 40 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 2738 | 1 | T7 | 1 | T8 | 1 | T5 | 1 | ||||
auto[1] | 370 | 1 | T51 | 10 | T52 | 10 | T53 | 10 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 2709 | 1 | T7 | 1 | T8 | 1 | T5 | 1 | ||||
auto[1] | 399 | 1 | T64 | 13 | T65 | 15 | T66 | 12 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |