Group : clkmgr_env_pkg::clkmgr_env_cov::fatal_err_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : clkmgr_env_pkg::clkmgr_env_cov::fatal_err_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_clkmgr_env_0.1/clkmgr_env_cov.sv



Summary for Group clkmgr_env_pkg::clkmgr_env_cov::fatal_err_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group clkmgr_env_pkg::clkmgr_env_cov::fatal_err_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
idle_cnt_cp 2 0 2 100.00 100 1 1 2
reg_integ_cp 2 0 2 100.00 100 1 1 2
shadow_storage_cp 2 0 2 100.00 100 1 1 2


Summary for Variable idle_cnt_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for idle_cnt_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2828 1 T7 1 T8 1 T5 1
auto[1] 280 1 T51 40 T52 40 T53 40



Summary for Variable reg_integ_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for reg_integ_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2738 1 T7 1 T8 1 T5 1
auto[1] 370 1 T51 10 T52 10 T53 10



Summary for Variable shadow_storage_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for shadow_storage_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2709 1 T7 1 T8 1 T5 1
auto[1] 399 1 T64 13 T65 15 T66 12

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%