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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.51 99.15 95.76 100.00 100.00 98.81 97.02 98.80


Total test records in report: 1010
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T798 /workspace/coverage/default/34.clkmgr_lc_clk_byp_req_intersig_mubi.1923218481 Jul 01 04:46:28 PM PDT 24 Jul 01 04:46:35 PM PDT 24 48782887 ps
T799 /workspace/coverage/default/6.clkmgr_clk_handshake_intersig_mubi.1899208305 Jul 01 04:45:03 PM PDT 24 Jul 01 04:45:05 PM PDT 24 74500482 ps
T800 /workspace/coverage/default/25.clkmgr_frequency.2240256425 Jul 01 04:46:09 PM PDT 24 Jul 01 04:46:22 PM PDT 24 1639199790 ps
T801 /workspace/coverage/default/1.clkmgr_extclk.2992767669 Jul 01 04:44:29 PM PDT 24 Jul 01 04:44:31 PM PDT 24 67297751 ps
T802 /workspace/coverage/default/31.clkmgr_idle_intersig_mubi.3790171025 Jul 01 04:46:21 PM PDT 24 Jul 01 04:46:26 PM PDT 24 22236275 ps
T803 /workspace/coverage/default/35.clkmgr_regwen.3196036339 Jul 01 04:46:28 PM PDT 24 Jul 01 04:46:36 PM PDT 24 431831212 ps
T804 /workspace/coverage/default/41.clkmgr_clk_status.402429362 Jul 01 04:46:55 PM PDT 24 Jul 01 04:47:04 PM PDT 24 24389340 ps
T805 /workspace/coverage/default/4.clkmgr_lc_ctrl_intersig_mubi.3248778252 Jul 01 04:44:51 PM PDT 24 Jul 01 04:44:55 PM PDT 24 38837666 ps
T806 /workspace/coverage/default/49.clkmgr_extclk.4141127768 Jul 01 04:47:13 PM PDT 24 Jul 01 04:47:20 PM PDT 24 58993046 ps
T807 /workspace/coverage/default/45.clkmgr_clk_handshake_intersig_mubi.1219990249 Jul 01 04:47:02 PM PDT 24 Jul 01 04:47:11 PM PDT 24 67408438 ps
T808 /workspace/coverage/default/28.clkmgr_peri.539217272 Jul 01 04:46:14 PM PDT 24 Jul 01 04:46:19 PM PDT 24 161229436 ps
T809 /workspace/coverage/default/43.clkmgr_lc_clk_byp_req_intersig_mubi.3188456441 Jul 01 04:46:54 PM PDT 24 Jul 01 04:47:03 PM PDT 24 41553947 ps
T810 /workspace/coverage/default/28.clkmgr_frequency.1197810538 Jul 01 04:46:14 PM PDT 24 Jul 01 04:46:26 PM PDT 24 1162034486 ps
T811 /workspace/coverage/default/9.clkmgr_div_intersig_mubi.3061283032 Jul 01 04:45:10 PM PDT 24 Jul 01 04:45:13 PM PDT 24 16655155 ps
T812 /workspace/coverage/default/6.clkmgr_stress_all.2527737884 Jul 01 04:45:05 PM PDT 24 Jul 01 04:45:59 PM PDT 24 7468533400 ps
T813 /workspace/coverage/default/12.clkmgr_extclk.3087131710 Jul 01 04:45:22 PM PDT 24 Jul 01 04:45:27 PM PDT 24 33605954 ps
T814 /workspace/coverage/default/5.clkmgr_extclk.3017283888 Jul 01 04:44:58 PM PDT 24 Jul 01 04:45:01 PM PDT 24 40962064 ps
T815 /workspace/coverage/default/44.clkmgr_idle_intersig_mubi.45699542 Jul 01 04:46:57 PM PDT 24 Jul 01 04:47:06 PM PDT 24 37418264 ps
T816 /workspace/coverage/default/36.clkmgr_idle_intersig_mubi.64127320 Jul 01 04:46:39 PM PDT 24 Jul 01 04:46:42 PM PDT 24 30072262 ps
T817 /workspace/coverage/default/15.clkmgr_peri.493291856 Jul 01 04:45:34 PM PDT 24 Jul 01 04:45:39 PM PDT 24 17522419 ps
T818 /workspace/coverage/default/10.clkmgr_clk_handshake_intersig_mubi.3974535688 Jul 01 04:45:20 PM PDT 24 Jul 01 04:45:24 PM PDT 24 20468452 ps
T819 /workspace/coverage/default/5.clkmgr_frequency_timeout.3295804195 Jul 01 04:44:56 PM PDT 24 Jul 01 04:44:59 PM PDT 24 140256868 ps
T820 /workspace/coverage/default/29.clkmgr_lc_ctrl_intersig_mubi.3674747967 Jul 01 04:46:14 PM PDT 24 Jul 01 04:46:19 PM PDT 24 56693215 ps
T821 /workspace/coverage/default/34.clkmgr_frequency_timeout.1275401161 Jul 01 04:46:29 PM PDT 24 Jul 01 04:46:53 PM PDT 24 2422246404 ps
T822 /workspace/coverage/default/46.clkmgr_smoke.2217501883 Jul 01 04:46:57 PM PDT 24 Jul 01 04:47:05 PM PDT 24 26782043 ps
T823 /workspace/coverage/default/26.clkmgr_stress_all_with_rand_reset.3956568018 Jul 01 04:46:05 PM PDT 24 Jul 01 04:53:52 PM PDT 24 45075722361 ps
T824 /workspace/coverage/default/36.clkmgr_trans.979513841 Jul 01 04:46:36 PM PDT 24 Jul 01 04:46:40 PM PDT 24 74622289 ps
T825 /workspace/coverage/default/35.clkmgr_extclk.184591360 Jul 01 04:46:28 PM PDT 24 Jul 01 04:46:35 PM PDT 24 16980122 ps
T826 /workspace/coverage/default/27.clkmgr_stress_all_with_rand_reset.361655472 Jul 01 04:46:16 PM PDT 24 Jul 01 04:53:55 PM PDT 24 73401333220 ps
T827 /workspace/coverage/default/6.clkmgr_clk_status.1972405638 Jul 01 04:44:59 PM PDT 24 Jul 01 04:45:02 PM PDT 24 15940846 ps
T828 /workspace/coverage/default/48.clkmgr_alert_test.1533843218 Jul 01 04:47:03 PM PDT 24 Jul 01 04:47:11 PM PDT 24 52264472 ps
T829 /workspace/coverage/default/17.clkmgr_lc_ctrl_intersig_mubi.3229424821 Jul 01 04:45:41 PM PDT 24 Jul 01 04:45:44 PM PDT 24 26911377 ps
T830 /workspace/coverage/default/26.clkmgr_div_intersig_mubi.3913665110 Jul 01 04:46:07 PM PDT 24 Jul 01 04:46:12 PM PDT 24 25967120 ps
T831 /workspace/coverage/default/5.clkmgr_peri.1534272472 Jul 01 04:44:56 PM PDT 24 Jul 01 04:44:58 PM PDT 24 16386907 ps
T832 /workspace/coverage/default/27.clkmgr_idle_intersig_mubi.29075156 Jul 01 04:46:12 PM PDT 24 Jul 01 04:46:16 PM PDT 24 176263747 ps
T833 /workspace/coverage/default/32.clkmgr_extclk.428260951 Jul 01 04:46:23 PM PDT 24 Jul 01 04:46:29 PM PDT 24 54329754 ps
T834 /workspace/coverage/default/29.clkmgr_stress_all.250195844 Jul 01 04:46:15 PM PDT 24 Jul 01 04:46:43 PM PDT 24 5802052898 ps
T835 /workspace/coverage/default/46.clkmgr_clk_handshake_intersig_mubi.3007975093 Jul 01 04:47:14 PM PDT 24 Jul 01 04:47:21 PM PDT 24 38848072 ps
T836 /workspace/coverage/default/4.clkmgr_lc_clk_byp_req_intersig_mubi.1186725050 Jul 01 04:44:52 PM PDT 24 Jul 01 04:44:56 PM PDT 24 15853187 ps
T837 /workspace/coverage/default/23.clkmgr_stress_all_with_rand_reset.797591897 Jul 01 04:45:59 PM PDT 24 Jul 01 05:03:23 PM PDT 24 99909332758 ps
T838 /workspace/coverage/default/38.clkmgr_div_intersig_mubi.1566623513 Jul 01 04:46:45 PM PDT 24 Jul 01 04:46:50 PM PDT 24 16513846 ps
T839 /workspace/coverage/default/43.clkmgr_frequency_timeout.2597525972 Jul 01 04:46:55 PM PDT 24 Jul 01 04:47:11 PM PDT 24 977741661 ps
T840 /workspace/coverage/default/21.clkmgr_stress_all.2229353291 Jul 01 04:45:56 PM PDT 24 Jul 01 04:46:50 PM PDT 24 11230245717 ps
T841 /workspace/coverage/default/19.clkmgr_lc_clk_byp_req_intersig_mubi.3824719065 Jul 01 04:45:44 PM PDT 24 Jul 01 04:45:49 PM PDT 24 15014058 ps
T842 /workspace/coverage/default/19.clkmgr_stress_all.2442855999 Jul 01 04:46:02 PM PDT 24 Jul 01 04:46:08 PM PDT 24 491553204 ps
T843 /workspace/coverage/default/43.clkmgr_smoke.4000814195 Jul 01 04:46:55 PM PDT 24 Jul 01 04:47:04 PM PDT 24 16887159 ps
T844 /workspace/coverage/default/27.clkmgr_div_intersig_mubi.3414211869 Jul 01 04:46:14 PM PDT 24 Jul 01 04:46:18 PM PDT 24 181771243 ps
T845 /workspace/coverage/default/31.clkmgr_frequency.570991575 Jul 01 04:46:20 PM PDT 24 Jul 01 04:46:27 PM PDT 24 979653673 ps
T846 /workspace/coverage/default/45.clkmgr_lc_ctrl_intersig_mubi.3791644679 Jul 01 04:47:00 PM PDT 24 Jul 01 04:47:09 PM PDT 24 239220067 ps
T847 /workspace/coverage/default/48.clkmgr_regwen.3071559844 Jul 01 04:47:05 PM PDT 24 Jul 01 04:47:14 PM PDT 24 456378069 ps
T848 /workspace/coverage/default/48.clkmgr_frequency.229147036 Jul 01 04:47:05 PM PDT 24 Jul 01 04:47:19 PM PDT 24 1285941529 ps
T849 /workspace/coverage/default/18.clkmgr_lc_clk_byp_req_intersig_mubi.3809800682 Jul 01 04:45:43 PM PDT 24 Jul 01 04:45:47 PM PDT 24 15105924 ps
T850 /workspace/coverage/default/0.clkmgr_idle_intersig_mubi.3844408031 Jul 01 04:44:29 PM PDT 24 Jul 01 04:44:32 PM PDT 24 42037252 ps
T851 /workspace/coverage/default/18.clkmgr_clk_status.1412857538 Jul 01 04:45:44 PM PDT 24 Jul 01 04:45:49 PM PDT 24 64684707 ps
T852 /workspace/coverage/default/26.clkmgr_frequency_timeout.172981303 Jul 01 04:46:07 PM PDT 24 Jul 01 04:46:14 PM PDT 24 379156045 ps
T100 /workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.1458771894 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:04 PM PDT 24 37102430 ps
T51 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.1961913129 Jul 01 04:25:56 PM PDT 24 Jul 01 04:26:10 PM PDT 24 127770420 ps
T93 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.423764740 Jul 01 04:26:50 PM PDT 24 Jul 01 04:27:02 PM PDT 24 126714121 ps
T853 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.1012869789 Jul 01 04:25:57 PM PDT 24 Jul 01 04:26:09 PM PDT 24 130491227 ps
T73 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.50242920 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:55 PM PDT 24 23426140 ps
T52 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3437614715 Jul 01 04:25:49 PM PDT 24 Jul 01 04:26:02 PM PDT 24 135314635 ps
T854 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.3963949549 Jul 01 04:26:08 PM PDT 24 Jul 01 04:26:19 PM PDT 24 38378083 ps
T855 /workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.3091847074 Jul 01 04:25:33 PM PDT 24 Jul 01 04:25:49 PM PDT 24 666679267 ps
T74 /workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.3327401817 Jul 01 04:25:34 PM PDT 24 Jul 01 04:25:45 PM PDT 24 25045933 ps
T53 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.95009499 Jul 01 04:25:55 PM PDT 24 Jul 01 04:26:10 PM PDT 24 664429312 ps
T856 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.990175906 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:55 PM PDT 24 20788223 ps
T857 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.183335337 Jul 01 04:26:07 PM PDT 24 Jul 01 04:26:18 PM PDT 24 27418333 ps
T75 /workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.2884056612 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:02 PM PDT 24 49313244 ps
T858 /workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.482738920 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:05 PM PDT 24 22372015 ps
T54 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.3159874584 Jul 01 04:25:47 PM PDT 24 Jul 01 04:25:59 PM PDT 24 92964147 ps
T76 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2763821364 Jul 01 04:25:58 PM PDT 24 Jul 01 04:26:11 PM PDT 24 32598173 ps
T56 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.1971644740 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:02 PM PDT 24 53134728 ps
T859 /workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.3387733772 Jul 01 04:25:38 PM PDT 24 Jul 01 04:25:49 PM PDT 24 18354606 ps
T94 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2103402751 Jul 01 04:26:10 PM PDT 24 Jul 01 04:26:25 PM PDT 24 258867778 ps
T860 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.530993817 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:07 PM PDT 24 103794508 ps
T861 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.2281407391 Jul 01 04:25:57 PM PDT 24 Jul 01 04:26:10 PM PDT 24 176756591 ps
T862 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.376305761 Jul 01 04:25:38 PM PDT 24 Jul 01 04:25:50 PM PDT 24 110103244 ps
T95 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.3801930510 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:05 PM PDT 24 241913665 ps
T863 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.4174208698 Jul 01 04:26:52 PM PDT 24 Jul 01 04:27:10 PM PDT 24 744724138 ps
T77 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.351538349 Jul 01 04:26:02 PM PDT 24 Jul 01 04:26:14 PM PDT 24 30163080 ps
T864 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.3873825693 Jul 01 04:25:56 PM PDT 24 Jul 01 04:26:09 PM PDT 24 19016947 ps
T55 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.3274574900 Jul 01 04:25:42 PM PDT 24 Jul 01 04:25:53 PM PDT 24 78400524 ps
T78 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3711688245 Jul 01 04:25:48 PM PDT 24 Jul 01 04:26:00 PM PDT 24 45452557 ps
T79 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.1370914373 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:07 PM PDT 24 152745764 ps
T80 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.1987183459 Jul 01 04:25:56 PM PDT 24 Jul 01 04:26:08 PM PDT 24 66571307 ps
T865 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.782484951 Jul 01 04:26:09 PM PDT 24 Jul 01 04:26:20 PM PDT 24 11675565 ps
T866 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.2785636283 Jul 01 04:26:14 PM PDT 24 Jul 01 04:26:28 PM PDT 24 26255130 ps
T867 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.1070681199 Jul 01 04:26:03 PM PDT 24 Jul 01 04:26:18 PM PDT 24 668303940 ps
T868 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.190330627 Jul 01 04:26:06 PM PDT 24 Jul 01 04:26:18 PM PDT 24 15089811 ps
T81 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.2663794694 Jul 01 04:25:45 PM PDT 24 Jul 01 04:25:57 PM PDT 24 254839033 ps
T869 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.252175586 Jul 01 04:25:49 PM PDT 24 Jul 01 04:26:01 PM PDT 24 28968424 ps
T870 /workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.2413569631 Jul 01 04:25:43 PM PDT 24 Jul 01 04:25:53 PM PDT 24 35493078 ps
T871 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.3021279538 Jul 01 04:25:58 PM PDT 24 Jul 01 04:26:11 PM PDT 24 11848672 ps
T872 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.2414547409 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:55 PM PDT 24 24952615 ps
T117 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.544880348 Jul 01 04:25:56 PM PDT 24 Jul 01 04:26:11 PM PDT 24 147903002 ps
T873 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.3396121809 Jul 01 04:25:46 PM PDT 24 Jul 01 04:25:58 PM PDT 24 119416692 ps
T118 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.3135428331 Jul 01 04:26:04 PM PDT 24 Jul 01 04:26:19 PM PDT 24 335511628 ps
T874 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.1462305584 Jul 01 04:26:14 PM PDT 24 Jul 01 04:26:27 PM PDT 24 20995497 ps
T875 /workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.2844632535 Jul 01 04:25:29 PM PDT 24 Jul 01 04:25:42 PM PDT 24 179805026 ps
T876 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.3313657071 Jul 01 04:25:40 PM PDT 24 Jul 01 04:25:52 PM PDT 24 20412508 ps
T877 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.2509354114 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:55 PM PDT 24 15670839 ps
T878 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.2529658395 Jul 01 04:25:45 PM PDT 24 Jul 01 04:25:56 PM PDT 24 23860725 ps
T57 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.4137293176 Jul 01 04:25:43 PM PDT 24 Jul 01 04:25:54 PM PDT 24 116138617 ps
T119 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.4272479450 Jul 01 04:26:51 PM PDT 24 Jul 01 04:27:03 PM PDT 24 93124241 ps
T879 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.2783981369 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:07 PM PDT 24 24542136 ps
T880 /workspace/coverage/cover_reg_top/4.clkmgr_intr_test.1394723689 Jul 01 04:25:45 PM PDT 24 Jul 01 04:25:56 PM PDT 24 46758813 ps
T881 /workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.1579315623 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:04 PM PDT 24 130764840 ps
T882 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.284711694 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:55 PM PDT 24 27692570 ps
T883 /workspace/coverage/cover_reg_top/25.clkmgr_intr_test.1022659946 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:04 PM PDT 24 11837740 ps
T173 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.1983617020 Jul 01 04:25:50 PM PDT 24 Jul 01 04:26:04 PM PDT 24 448215941 ps
T884 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.1429397776 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:06 PM PDT 24 75381761 ps
T885 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.1145132251 Jul 01 04:26:10 PM PDT 24 Jul 01 04:26:22 PM PDT 24 14259325 ps
T123 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.3224114716 Jul 01 04:25:41 PM PDT 24 Jul 01 04:25:55 PM PDT 24 182183989 ps
T120 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.3367776862 Jul 01 04:25:58 PM PDT 24 Jul 01 04:26:12 PM PDT 24 281703908 ps
T886 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.2029113483 Jul 01 04:25:37 PM PDT 24 Jul 01 04:25:48 PM PDT 24 12127618 ps
T887 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.4032056824 Jul 01 04:25:21 PM PDT 24 Jul 01 04:25:33 PM PDT 24 12290571 ps
T888 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.182340511 Jul 01 04:25:58 PM PDT 24 Jul 01 04:26:11 PM PDT 24 124581147 ps
T889 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.1932983539 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:55 PM PDT 24 15584077 ps
T124 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.2056212032 Jul 01 04:25:41 PM PDT 24 Jul 01 04:25:54 PM PDT 24 458451098 ps
T890 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.1108782848 Jul 01 04:25:56 PM PDT 24 Jul 01 04:26:10 PM PDT 24 61321325 ps
T891 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.3657519721 Jul 01 04:26:00 PM PDT 24 Jul 01 04:26:14 PM PDT 24 115844594 ps
T892 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.22630494 Jul 01 04:26:02 PM PDT 24 Jul 01 04:26:14 PM PDT 24 11789274 ps
T893 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.730394422 Jul 01 04:25:48 PM PDT 24 Jul 01 04:26:00 PM PDT 24 15278284 ps
T894 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.2391930457 Jul 01 04:25:48 PM PDT 24 Jul 01 04:26:00 PM PDT 24 89381709 ps
T895 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.1587761737 Jul 01 04:25:49 PM PDT 24 Jul 01 04:26:04 PM PDT 24 16739848 ps
T121 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.4084977857 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:06 PM PDT 24 168349894 ps
T125 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.35986351 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:07 PM PDT 24 102336457 ps
T896 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.1654520216 Jul 01 04:25:49 PM PDT 24 Jul 01 04:26:02 PM PDT 24 112750794 ps
T897 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.1395759694 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:07 PM PDT 24 23493223 ps
T898 /workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.3611532430 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:04 PM PDT 24 158577323 ps
T899 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.2797564560 Jul 01 04:25:46 PM PDT 24 Jul 01 04:25:58 PM PDT 24 63393100 ps
T900 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.881427004 Jul 01 04:25:32 PM PDT 24 Jul 01 04:25:44 PM PDT 24 24793471 ps
T901 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.1353357425 Jul 01 04:25:55 PM PDT 24 Jul 01 04:26:07 PM PDT 24 24560488 ps
T105 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.3265172263 Jul 01 04:25:41 PM PDT 24 Jul 01 04:25:54 PM PDT 24 170752508 ps
T902 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.620206209 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:03 PM PDT 24 44754857 ps
T103 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.946643993 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:09 PM PDT 24 135642122 ps
T903 /workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.970815733 Jul 01 04:26:10 PM PDT 24 Jul 01 04:26:23 PM PDT 24 37930672 ps
T904 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.1824514261 Jul 01 04:26:03 PM PDT 24 Jul 01 04:26:15 PM PDT 24 12611121 ps
T127 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.2689431419 Jul 01 04:26:01 PM PDT 24 Jul 01 04:26:15 PM PDT 24 484003830 ps
T905 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.2390294215 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:02 PM PDT 24 74183047 ps
T906 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.884927765 Jul 01 04:25:47 PM PDT 24 Jul 01 04:26:02 PM PDT 24 280002188 ps
T131 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.131730002 Jul 01 04:25:47 PM PDT 24 Jul 01 04:26:00 PM PDT 24 106227485 ps
T98 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.2694550934 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:04 PM PDT 24 252842581 ps
T907 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.845336543 Jul 01 04:26:10 PM PDT 24 Jul 01 04:26:22 PM PDT 24 41218424 ps
T908 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.1885370763 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:08 PM PDT 24 53235562 ps
T909 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.2665868272 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:04 PM PDT 24 13937714 ps
T910 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.1437642096 Jul 01 04:26:02 PM PDT 24 Jul 01 04:26:14 PM PDT 24 36502576 ps
T911 /workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.1279059968 Jul 01 04:26:51 PM PDT 24 Jul 01 04:27:03 PM PDT 24 65048459 ps
T912 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.1961148048 Jul 01 04:25:47 PM PDT 24 Jul 01 04:26:03 PM PDT 24 966481188 ps
T913 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.171258453 Jul 01 04:26:55 PM PDT 24 Jul 01 04:27:08 PM PDT 24 31830352 ps
T132 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3911759890 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:06 PM PDT 24 64838565 ps
T122 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.78786415 Jul 01 04:25:35 PM PDT 24 Jul 01 04:25:47 PM PDT 24 80915825 ps
T914 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.3422321072 Jul 01 04:25:39 PM PDT 24 Jul 01 04:25:50 PM PDT 24 55666079 ps
T915 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.1629041084 Jul 01 04:25:33 PM PDT 24 Jul 01 04:25:46 PM PDT 24 304146585 ps
T916 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.1964336747 Jul 01 04:25:40 PM PDT 24 Jul 01 04:25:52 PM PDT 24 86490775 ps
T917 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.1769979007 Jul 01 04:25:42 PM PDT 24 Jul 01 04:25:53 PM PDT 24 37254676 ps
T918 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.1718541747 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:06 PM PDT 24 18276989 ps
T919 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.166307853 Jul 01 04:25:42 PM PDT 24 Jul 01 04:25:54 PM PDT 24 60647412 ps
T920 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3810063388 Jul 01 04:25:48 PM PDT 24 Jul 01 04:26:01 PM PDT 24 35586140 ps
T174 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.1621780855 Jul 01 04:25:46 PM PDT 24 Jul 01 04:25:59 PM PDT 24 93991271 ps
T921 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.3446628680 Jul 01 04:26:06 PM PDT 24 Jul 01 04:26:18 PM PDT 24 181555615 ps
T922 /workspace/coverage/cover_reg_top/24.clkmgr_intr_test.2653344651 Jul 01 04:26:04 PM PDT 24 Jul 01 04:26:16 PM PDT 24 21636835 ps
T923 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.2194360645 Jul 01 04:26:53 PM PDT 24 Jul 01 04:27:05 PM PDT 24 35730900 ps
T129 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.1305609645 Jul 01 04:25:29 PM PDT 24 Jul 01 04:25:42 PM PDT 24 168536747 ps
T924 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.1358685175 Jul 01 04:26:03 PM PDT 24 Jul 01 04:26:15 PM PDT 24 34151012 ps
T925 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.2217012180 Jul 01 04:25:58 PM PDT 24 Jul 01 04:26:11 PM PDT 24 31189992 ps
T926 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.2949523942 Jul 01 04:25:40 PM PDT 24 Jul 01 04:25:52 PM PDT 24 323644088 ps
T927 /workspace/coverage/cover_reg_top/3.clkmgr_intr_test.1604228819 Jul 01 04:25:36 PM PDT 24 Jul 01 04:25:47 PM PDT 24 32492384 ps
T928 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.2585193937 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:02 PM PDT 24 19810103 ps
T175 /workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.907057204 Jul 01 04:26:48 PM PDT 24 Jul 01 04:26:59 PM PDT 24 73170149 ps
T130 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.2137119989 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:56 PM PDT 24 297255218 ps
T929 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.68048598 Jul 01 04:26:09 PM PDT 24 Jul 01 04:26:21 PM PDT 24 128026640 ps
T930 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.979322891 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:05 PM PDT 24 27775879 ps
T101 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.529444325 Jul 01 04:25:42 PM PDT 24 Jul 01 04:25:55 PM PDT 24 198277200 ps
T931 /workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.3033927169 Jul 01 04:25:41 PM PDT 24 Jul 01 04:25:52 PM PDT 24 184489593 ps
T932 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.414576860 Jul 01 04:25:45 PM PDT 24 Jul 01 04:25:56 PM PDT 24 73934449 ps
T933 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.1292862560 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:05 PM PDT 24 24745692 ps
T934 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.1392626619 Jul 01 04:25:20 PM PDT 24 Jul 01 04:25:32 PM PDT 24 25820083 ps
T935 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.4078574285 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:08 PM PDT 24 129400083 ps
T936 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.3050605846 Jul 01 04:25:22 PM PDT 24 Jul 01 04:25:36 PM PDT 24 229823180 ps
T937 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.2047622211 Jul 01 04:25:28 PM PDT 24 Jul 01 04:25:42 PM PDT 24 129612712 ps
T938 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.426253614 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:07 PM PDT 24 26524428 ps
T939 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.4290705797 Jul 01 04:26:09 PM PDT 24 Jul 01 04:26:21 PM PDT 24 31227554 ps
T940 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1569257384 Jul 01 04:26:49 PM PDT 24 Jul 01 04:27:03 PM PDT 24 570259142 ps
T941 /workspace/coverage/cover_reg_top/45.clkmgr_intr_test.640489012 Jul 01 04:26:04 PM PDT 24 Jul 01 04:26:16 PM PDT 24 21724982 ps
T942 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.3253876391 Jul 01 04:25:49 PM PDT 24 Jul 01 04:26:01 PM PDT 24 26091590 ps
T102 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.2011867144 Jul 01 04:25:57 PM PDT 24 Jul 01 04:26:10 PM PDT 24 64916559 ps
T943 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.3547268645 Jul 01 04:25:42 PM PDT 24 Jul 01 04:25:55 PM PDT 24 709513537 ps
T944 /workspace/coverage/cover_reg_top/1.clkmgr_intr_test.3719183913 Jul 01 04:25:26 PM PDT 24 Jul 01 04:25:39 PM PDT 24 32448794 ps
T104 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.2198297101 Jul 01 04:26:00 PM PDT 24 Jul 01 04:26:14 PM PDT 24 110741987 ps
T945 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.3173391416 Jul 01 04:26:15 PM PDT 24 Jul 01 04:26:28 PM PDT 24 22699571 ps
T946 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.1305661309 Jul 01 04:25:32 PM PDT 24 Jul 01 04:25:45 PM PDT 24 71444356 ps
T947 /workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.1764527126 Jul 01 04:26:05 PM PDT 24 Jul 01 04:26:17 PM PDT 24 24003178 ps
T948 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.2468631231 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:05 PM PDT 24 78877447 ps
T949 /workspace/coverage/cover_reg_top/44.clkmgr_intr_test.1767659941 Jul 01 04:26:05 PM PDT 24 Jul 01 04:26:17 PM PDT 24 15186119 ps
T950 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.2929453267 Jul 01 04:26:03 PM PDT 24 Jul 01 04:26:15 PM PDT 24 58797981 ps
T951 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.1067976484 Jul 01 04:25:48 PM PDT 24 Jul 01 04:26:02 PM PDT 24 175304960 ps
T952 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.3203037923 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:04 PM PDT 24 115027908 ps
T953 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.3341255284 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:07 PM PDT 24 104094302 ps
T954 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.4255686594 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:05 PM PDT 24 25523813 ps
T106 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.3747834038 Jul 01 04:25:56 PM PDT 24 Jul 01 04:26:09 PM PDT 24 66238938 ps
T955 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.1167401846 Jul 01 04:25:55 PM PDT 24 Jul 01 04:26:08 PM PDT 24 129812824 ps
T956 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.722010411 Jul 01 04:26:11 PM PDT 24 Jul 01 04:26:25 PM PDT 24 28168591 ps
T957 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1261396063 Jul 01 04:25:57 PM PDT 24 Jul 01 04:26:11 PM PDT 24 223165448 ps
T126 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.3677344054 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:05 PM PDT 24 102521619 ps
T958 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.1877255323 Jul 01 04:25:59 PM PDT 24 Jul 01 04:26:13 PM PDT 24 96358671 ps
T959 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.2099736283 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:08 PM PDT 24 73655819 ps
T960 /workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.1257088747 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:03 PM PDT 24 69829249 ps
T961 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.2595357522 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:05 PM PDT 24 14430540 ps
T962 /workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.3380870111 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:57 PM PDT 24 210642762 ps
T963 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.2255536265 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:07 PM PDT 24 22858457 ps
T964 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3432426963 Jul 01 04:25:48 PM PDT 24 Jul 01 04:26:00 PM PDT 24 55389397 ps
T965 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.3671581974 Jul 01 04:25:57 PM PDT 24 Jul 01 04:26:10 PM PDT 24 11222685 ps
T966 /workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.832381102 Jul 01 04:25:36 PM PDT 24 Jul 01 04:25:47 PM PDT 24 25170173 ps
T967 /workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.13122932 Jul 01 04:25:47 PM PDT 24 Jul 01 04:25:59 PM PDT 24 107453677 ps
T968 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3497709494 Jul 01 04:25:40 PM PDT 24 Jul 01 04:25:51 PM PDT 24 60374958 ps
T969 /workspace/coverage/cover_reg_top/16.clkmgr_intr_test.1519264398 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:05 PM PDT 24 38687916 ps
T970 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.3462586990 Jul 01 04:26:08 PM PDT 24 Jul 01 04:26:19 PM PDT 24 10407567 ps
T971 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.1778482435 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:04 PM PDT 24 22752389 ps
T972 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.3119956382 Jul 01 04:25:39 PM PDT 24 Jul 01 04:25:50 PM PDT 24 76852701 ps
T973 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.3105712477 Jul 01 04:25:46 PM PDT 24 Jul 01 04:25:58 PM PDT 24 22309363 ps
T99 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.1010467421 Jul 01 04:25:50 PM PDT 24 Jul 01 04:26:03 PM PDT 24 67150041 ps
T974 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.1296763092 Jul 01 04:25:48 PM PDT 24 Jul 01 04:26:01 PM PDT 24 267057242 ps
T975 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.1812016711 Jul 01 04:25:57 PM PDT 24 Jul 01 04:26:11 PM PDT 24 107079855 ps
T976 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.2903096805 Jul 01 04:25:19 PM PDT 24 Jul 01 04:25:31 PM PDT 24 37290089 ps
T977 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.3251054651 Jul 01 04:25:51 PM PDT 24 Jul 01 04:26:04 PM PDT 24 36095993 ps
T978 /workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.772318575 Jul 01 04:26:00 PM PDT 24 Jul 01 04:26:13 PM PDT 24 122833723 ps
T979 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.167820486 Jul 01 04:25:44 PM PDT 24 Jul 01 04:25:55 PM PDT 24 106692708 ps
T980 /workspace/coverage/cover_reg_top/36.clkmgr_intr_test.1856430659 Jul 01 04:26:28 PM PDT 24 Jul 01 04:26:37 PM PDT 24 115698451 ps
T981 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.2413632565 Jul 01 04:26:16 PM PDT 24 Jul 01 04:26:29 PM PDT 24 16740294 ps
T982 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.1626192284 Jul 01 04:25:56 PM PDT 24 Jul 01 04:26:09 PM PDT 24 23086118 ps
T983 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.3339988736 Jul 01 04:25:49 PM PDT 24 Jul 01 04:26:01 PM PDT 24 69391503 ps
T984 /workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.3061964814 Jul 01 04:25:42 PM PDT 24 Jul 01 04:25:53 PM PDT 24 28311056 ps
T985 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.1619455529 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:05 PM PDT 24 13842194 ps
T986 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.1828994507 Jul 01 04:25:43 PM PDT 24 Jul 01 04:25:53 PM PDT 24 169473651 ps
T987 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3707307145 Jul 01 04:25:52 PM PDT 24 Jul 01 04:26:04 PM PDT 24 16346600 ps
T988 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.2187623366 Jul 01 04:25:58 PM PDT 24 Jul 01 04:26:11 PM PDT 24 101679823 ps
T989 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3452994664 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:08 PM PDT 24 169081882 ps
T990 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.4179417285 Jul 01 04:25:54 PM PDT 24 Jul 01 04:26:06 PM PDT 24 35942899 ps
T991 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.4176252680 Jul 01 04:26:51 PM PDT 24 Jul 01 04:27:03 PM PDT 24 102615369 ps
T992 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.2936143808 Jul 01 04:25:49 PM PDT 24 Jul 01 04:26:01 PM PDT 24 55823195 ps
T993 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.3670655359 Jul 01 04:26:02 PM PDT 24 Jul 01 04:26:14 PM PDT 24 24651983 ps
T994 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.1989840848 Jul 01 04:26:01 PM PDT 24 Jul 01 04:26:15 PM PDT 24 33660944 ps
T128 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.299604077 Jul 01 04:26:06 PM PDT 24 Jul 01 04:26:19 PM PDT 24 54499384 ps
T995 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.2852640427 Jul 01 04:25:47 PM PDT 24 Jul 01 04:25:59 PM PDT 24 60628811 ps
T996 /workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.3112180266 Jul 01 04:25:31 PM PDT 24 Jul 01 04:25:49 PM PDT 24 602218999 ps
T997 /workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.1006291652 Jul 01 04:25:53 PM PDT 24 Jul 01 04:26:05 PM PDT 24 86635153 ps
T998 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.347971829 Jul 01 04:25:22 PM PDT 24 Jul 01 04:25:36 PM PDT 24 157130687 ps
T999 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.2308642193 Jul 01 04:25:55 PM PDT 24 Jul 01 04:26:11 PM PDT 24 878305660 ps
T1000 /workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.1552224652 Jul 01 04:25:40 PM PDT 24 Jul 01 04:25:51 PM PDT 24 106655407 ps
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