Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.51 99.15 95.80 100.00 100.00 98.81 97.02 98.80


Total test records in report: 1010
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T801 /workspace/coverage/default/13.clkmgr_clk_handshake_intersig_mubi.3797385537 Jul 09 05:47:45 PM PDT 24 Jul 09 05:47:47 PM PDT 24 72735590 ps
T802 /workspace/coverage/default/25.clkmgr_regwen.1200330048 Jul 09 05:47:59 PM PDT 24 Jul 09 05:48:04 PM PDT 24 210237919 ps
T803 /workspace/coverage/default/22.clkmgr_peri.1432636715 Jul 09 05:47:50 PM PDT 24 Jul 09 05:47:52 PM PDT 24 35469962 ps
T804 /workspace/coverage/default/26.clkmgr_clk_status.4174418794 Jul 09 05:47:58 PM PDT 24 Jul 09 05:48:01 PM PDT 24 16449169 ps
T805 /workspace/coverage/default/27.clkmgr_stress_all.408740305 Jul 09 05:47:59 PM PDT 24 Jul 09 05:48:34 PM PDT 24 4966857018 ps
T806 /workspace/coverage/default/24.clkmgr_alert_test.3677685748 Jul 09 05:48:03 PM PDT 24 Jul 09 05:48:07 PM PDT 24 40645452 ps
T807 /workspace/coverage/default/9.clkmgr_frequency_timeout.3786574276 Jul 09 05:47:14 PM PDT 24 Jul 09 05:47:25 PM PDT 24 1824552741 ps
T808 /workspace/coverage/default/46.clkmgr_smoke.992728088 Jul 09 05:48:47 PM PDT 24 Jul 09 05:48:49 PM PDT 24 146442774 ps
T809 /workspace/coverage/default/39.clkmgr_clk_handshake_intersig_mubi.3415601580 Jul 09 05:48:23 PM PDT 24 Jul 09 05:48:25 PM PDT 24 23648072 ps
T810 /workspace/coverage/default/1.clkmgr_frequency_timeout.2078292278 Jul 09 05:47:05 PM PDT 24 Jul 09 05:47:14 PM PDT 24 1228955524 ps
T811 /workspace/coverage/default/48.clkmgr_lc_ctrl_intersig_mubi.417061631 Jul 09 05:48:42 PM PDT 24 Jul 09 05:48:45 PM PDT 24 17921113 ps
T812 /workspace/coverage/default/7.clkmgr_extclk.2785567366 Jul 09 05:47:04 PM PDT 24 Jul 09 05:47:08 PM PDT 24 65410558 ps
T813 /workspace/coverage/default/17.clkmgr_regwen.2538319154 Jul 09 05:47:57 PM PDT 24 Jul 09 05:48:01 PM PDT 24 432082712 ps
T814 /workspace/coverage/default/30.clkmgr_regwen.139943244 Jul 09 05:47:58 PM PDT 24 Jul 09 05:48:07 PM PDT 24 1031766273 ps
T815 /workspace/coverage/default/34.clkmgr_lc_clk_byp_req_intersig_mubi.903074549 Jul 09 05:48:11 PM PDT 24 Jul 09 05:48:13 PM PDT 24 48167503 ps
T816 /workspace/coverage/default/24.clkmgr_peri.1341138899 Jul 09 05:47:54 PM PDT 24 Jul 09 05:47:56 PM PDT 24 50436877 ps
T817 /workspace/coverage/default/46.clkmgr_frequency.206071324 Jul 09 05:48:43 PM PDT 24 Jul 09 05:48:53 PM PDT 24 2157871305 ps
T818 /workspace/coverage/default/39.clkmgr_lc_ctrl_intersig_mubi.3435412164 Jul 09 05:48:38 PM PDT 24 Jul 09 05:48:41 PM PDT 24 65683891 ps
T819 /workspace/coverage/default/31.clkmgr_frequency_timeout.2141426905 Jul 09 05:47:58 PM PDT 24 Jul 09 05:48:08 PM PDT 24 2078399461 ps
T820 /workspace/coverage/default/36.clkmgr_lc_ctrl_intersig_mubi.1474100070 Jul 09 05:48:00 PM PDT 24 Jul 09 05:48:05 PM PDT 24 186468580 ps
T821 /workspace/coverage/default/47.clkmgr_idle_intersig_mubi.4219094467 Jul 09 05:48:38 PM PDT 24 Jul 09 05:48:41 PM PDT 24 49007679 ps
T822 /workspace/coverage/default/49.clkmgr_frequency_timeout.1074141824 Jul 09 05:48:40 PM PDT 24 Jul 09 05:48:56 PM PDT 24 1943013965 ps
T823 /workspace/coverage/default/27.clkmgr_clk_status.1614660043 Jul 09 05:47:59 PM PDT 24 Jul 09 05:48:03 PM PDT 24 25446577 ps
T824 /workspace/coverage/default/26.clkmgr_lc_ctrl_intersig_mubi.2117310107 Jul 09 05:48:12 PM PDT 24 Jul 09 05:48:13 PM PDT 24 18874984 ps
T825 /workspace/coverage/default/43.clkmgr_regwen.1961084571 Jul 09 05:48:38 PM PDT 24 Jul 09 05:48:44 PM PDT 24 828830227 ps
T826 /workspace/coverage/default/45.clkmgr_trans.2201988267 Jul 09 05:48:36 PM PDT 24 Jul 09 05:48:38 PM PDT 24 28791712 ps
T827 /workspace/coverage/default/49.clkmgr_div_intersig_mubi.3663832924 Jul 09 05:48:44 PM PDT 24 Jul 09 05:48:46 PM PDT 24 34760719 ps
T828 /workspace/coverage/default/19.clkmgr_trans.1748995887 Jul 09 05:47:52 PM PDT 24 Jul 09 05:47:54 PM PDT 24 63740628 ps
T829 /workspace/coverage/default/21.clkmgr_lc_ctrl_intersig_mubi.4103808918 Jul 09 05:47:56 PM PDT 24 Jul 09 05:47:58 PM PDT 24 18350509 ps
T830 /workspace/coverage/default/2.clkmgr_lc_clk_byp_req_intersig_mubi.3828767458 Jul 09 05:47:04 PM PDT 24 Jul 09 05:47:08 PM PDT 24 55305978 ps
T831 /workspace/coverage/default/4.clkmgr_lc_ctrl_intersig_mubi.1745831768 Jul 09 05:47:05 PM PDT 24 Jul 09 05:47:10 PM PDT 24 107738607 ps
T832 /workspace/coverage/default/30.clkmgr_trans.4013286754 Jul 09 05:48:00 PM PDT 24 Jul 09 05:48:05 PM PDT 24 33711518 ps
T833 /workspace/coverage/default/4.clkmgr_frequency.1775791250 Jul 09 05:47:20 PM PDT 24 Jul 09 05:47:35 PM PDT 24 1754683697 ps
T834 /workspace/coverage/default/33.clkmgr_stress_all.3180318149 Jul 09 05:48:00 PM PDT 24 Jul 09 05:49:14 PM PDT 24 9807730788 ps
T835 /workspace/coverage/default/35.clkmgr_smoke.3011947415 Jul 09 05:48:01 PM PDT 24 Jul 09 05:48:05 PM PDT 24 18774021 ps
T836 /workspace/coverage/default/19.clkmgr_peri.1139246000 Jul 09 05:47:44 PM PDT 24 Jul 09 05:47:46 PM PDT 24 98716473 ps
T837 /workspace/coverage/default/28.clkmgr_regwen.2093723962 Jul 09 05:48:10 PM PDT 24 Jul 09 05:48:12 PM PDT 24 141014385 ps
T838 /workspace/coverage/default/18.clkmgr_lc_clk_byp_req_intersig_mubi.3375368994 Jul 09 05:47:48 PM PDT 24 Jul 09 05:47:50 PM PDT 24 15884292 ps
T839 /workspace/coverage/default/18.clkmgr_trans.2211700814 Jul 09 05:47:41 PM PDT 24 Jul 09 05:47:42 PM PDT 24 24969776 ps
T840 /workspace/coverage/default/22.clkmgr_extclk.3075739865 Jul 09 05:47:58 PM PDT 24 Jul 09 05:48:10 PM PDT 24 57628811 ps
T841 /workspace/coverage/default/31.clkmgr_stress_all_with_rand_reset.3082195184 Jul 09 05:48:17 PM PDT 24 Jul 09 05:52:44 PM PDT 24 17227617888 ps
T842 /workspace/coverage/default/25.clkmgr_trans.195795654 Jul 09 05:47:59 PM PDT 24 Jul 09 05:48:03 PM PDT 24 54191499 ps
T843 /workspace/coverage/default/14.clkmgr_lc_clk_byp_req_intersig_mubi.1421797795 Jul 09 05:47:46 PM PDT 24 Jul 09 05:47:47 PM PDT 24 19204718 ps
T844 /workspace/coverage/default/29.clkmgr_extclk.1255306760 Jul 09 05:47:58 PM PDT 24 Jul 09 05:48:01 PM PDT 24 33760648 ps
T845 /workspace/coverage/default/15.clkmgr_lc_clk_byp_req_intersig_mubi.449998136 Jul 09 05:47:53 PM PDT 24 Jul 09 05:47:55 PM PDT 24 21607250 ps
T846 /workspace/coverage/default/0.clkmgr_lc_ctrl_intersig_mubi.1323614241 Jul 09 05:47:05 PM PDT 24 Jul 09 05:47:09 PM PDT 24 29417523 ps
T847 /workspace/coverage/default/8.clkmgr_lc_clk_byp_req_intersig_mubi.2948887203 Jul 09 05:47:04 PM PDT 24 Jul 09 05:47:08 PM PDT 24 46183151 ps
T848 /workspace/coverage/default/20.clkmgr_clk_status.118986318 Jul 09 05:47:46 PM PDT 24 Jul 09 05:47:48 PM PDT 24 25758361 ps
T849 /workspace/coverage/default/32.clkmgr_lc_ctrl_intersig_mubi.2601898881 Jul 09 05:48:08 PM PDT 24 Jul 09 05:48:11 PM PDT 24 112542934 ps
T850 /workspace/coverage/default/37.clkmgr_stress_all.3476518122 Jul 09 05:48:18 PM PDT 24 Jul 09 05:48:54 PM PDT 24 8416814414 ps
T851 /workspace/coverage/default/7.clkmgr_idle_intersig_mubi.324586016 Jul 09 05:47:26 PM PDT 24 Jul 09 05:47:28 PM PDT 24 124552099 ps
T852 /workspace/coverage/default/33.clkmgr_frequency_timeout.2803457835 Jul 09 05:48:01 PM PDT 24 Jul 09 05:48:08 PM PDT 24 676522537 ps
T853 /workspace/coverage/default/20.clkmgr_frequency_timeout.1279715165 Jul 09 05:47:47 PM PDT 24 Jul 09 05:47:55 PM PDT 24 1722864854 ps
T854 /workspace/coverage/default/47.clkmgr_stress_all_with_rand_reset.1954503575 Jul 09 05:48:40 PM PDT 24 Jul 09 06:04:02 PM PDT 24 145154162394 ps
T855 /workspace/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.1625273556 Jul 09 05:48:47 PM PDT 24 Jul 09 05:48:55 PM PDT 24 37507559 ps
T85 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.1283208888 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:26 PM PDT 24 38473218 ps
T86 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.1113369515 Jul 09 05:44:11 PM PDT 24 Jul 09 05:44:14 PM PDT 24 58920835 ps
T856 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.1678406428 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:26 PM PDT 24 12279863 ps
T106 /workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.2728125148 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:17 PM PDT 24 48604136 ps
T136 /workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.3933209354 Jul 09 05:44:08 PM PDT 24 Jul 09 05:44:16 PM PDT 24 987963692 ps
T857 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.1271599726 Jul 09 05:44:14 PM PDT 24 Jul 09 05:44:17 PM PDT 24 65320381 ps
T100 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3540130554 Jul 09 05:44:11 PM PDT 24 Jul 09 05:44:16 PM PDT 24 200586063 ps
T61 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.3031448174 Jul 09 05:44:26 PM PDT 24 Jul 09 05:44:31 PM PDT 24 59851528 ps
T62 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3743324542 Jul 09 05:44:19 PM PDT 24 Jul 09 05:44:25 PM PDT 24 433813625 ps
T858 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.368483236 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:27 PM PDT 24 89483949 ps
T87 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2316585038 Jul 09 05:44:18 PM PDT 24 Jul 09 05:44:22 PM PDT 24 55812523 ps
T63 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.632526387 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:29 PM PDT 24 143752482 ps
T88 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.2597964098 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:26 PM PDT 24 65767667 ps
T68 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.2647037707 Jul 09 05:44:21 PM PDT 24 Jul 09 05:44:25 PM PDT 24 96594753 ps
T89 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.3453235207 Jul 09 05:44:03 PM PDT 24 Jul 09 05:44:06 PM PDT 24 22522537 ps
T859 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.1983018639 Jul 09 05:44:40 PM PDT 24 Jul 09 05:44:41 PM PDT 24 15434735 ps
T69 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.426136393 Jul 09 05:44:02 PM PDT 24 Jul 09 05:44:07 PM PDT 24 123444471 ps
T65 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.850263227 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:19 PM PDT 24 199910132 ps
T860 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.347213612 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:32 PM PDT 24 10580287 ps
T66 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.2008387270 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:29 PM PDT 24 58086108 ps
T861 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.2322867611 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:32 PM PDT 24 41607962 ps
T862 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.1606622017 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:21 PM PDT 24 194909380 ps
T863 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.1793433255 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:20 PM PDT 24 36499016 ps
T864 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.3372135505 Jul 09 05:44:14 PM PDT 24 Jul 09 05:44:19 PM PDT 24 178204165 ps
T101 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.1915556296 Jul 09 05:44:07 PM PDT 24 Jul 09 05:44:14 PM PDT 24 454253003 ps
T865 /workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.2045944401 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:28 PM PDT 24 545937864 ps
T866 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.3906118971 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:22 PM PDT 24 49965931 ps
T867 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.3452675573 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:28 PM PDT 24 14158720 ps
T868 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.1402840939 Jul 09 05:44:05 PM PDT 24 Jul 09 05:44:10 PM PDT 24 300707331 ps
T102 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1727160849 Jul 09 05:44:10 PM PDT 24 Jul 09 05:44:15 PM PDT 24 254919594 ps
T71 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.2678940232 Jul 09 05:44:08 PM PDT 24 Jul 09 05:44:15 PM PDT 24 446679046 ps
T869 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.1358324685 Jul 09 05:44:20 PM PDT 24 Jul 09 05:44:23 PM PDT 24 14492576 ps
T120 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.3621883058 Jul 09 05:44:00 PM PDT 24 Jul 09 05:44:05 PM PDT 24 188471295 ps
T870 /workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.3304883116 Jul 09 05:44:32 PM PDT 24 Jul 09 05:44:35 PM PDT 24 83042879 ps
T871 /workspace/coverage/cover_reg_top/46.clkmgr_intr_test.711762341 Jul 09 05:44:45 PM PDT 24 Jul 09 05:44:47 PM PDT 24 65595836 ps
T107 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.2610633017 Jul 09 05:44:15 PM PDT 24 Jul 09 05:44:20 PM PDT 24 185610835 ps
T70 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.992668494 Jul 09 05:44:00 PM PDT 24 Jul 09 05:44:05 PM PDT 24 317981069 ps
T872 /workspace/coverage/cover_reg_top/1.clkmgr_intr_test.185277623 Jul 09 05:43:57 PM PDT 24 Jul 09 05:43:58 PM PDT 24 73524069 ps
T873 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.1444868057 Jul 09 05:44:40 PM PDT 24 Jul 09 05:44:41 PM PDT 24 49764947 ps
T874 /workspace/coverage/cover_reg_top/45.clkmgr_intr_test.2986721067 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:31 PM PDT 24 12242286 ps
T119 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.4160637757 Jul 09 05:44:18 PM PDT 24 Jul 09 05:44:22 PM PDT 24 59453771 ps
T67 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.2341080199 Jul 09 05:44:12 PM PDT 24 Jul 09 05:44:18 PM PDT 24 437289752 ps
T875 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.3937667438 Jul 09 05:44:19 PM PDT 24 Jul 09 05:44:22 PM PDT 24 15997420 ps
T876 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.4069062507 Jul 09 05:44:12 PM PDT 24 Jul 09 05:44:15 PM PDT 24 15314627 ps
T877 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.3151407799 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:18 PM PDT 24 79602915 ps
T878 /workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.2025341552 Jul 09 05:44:21 PM PDT 24 Jul 09 05:44:24 PM PDT 24 60071712 ps
T103 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1412887401 Jul 09 05:44:10 PM PDT 24 Jul 09 05:44:15 PM PDT 24 100085192 ps
T879 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.218254889 Jul 09 05:44:08 PM PDT 24 Jul 09 05:44:11 PM PDT 24 29479255 ps
T880 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.2313186730 Jul 09 05:44:04 PM PDT 24 Jul 09 05:44:08 PM PDT 24 41128259 ps
T64 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.1587219878 Jul 09 05:44:04 PM PDT 24 Jul 09 05:44:08 PM PDT 24 108350192 ps
T881 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.2972130788 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:32 PM PDT 24 11745465 ps
T882 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.1483287756 Jul 09 05:44:21 PM PDT 24 Jul 09 05:44:26 PM PDT 24 45292117 ps
T883 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.3630288321 Jul 09 05:44:33 PM PDT 24 Jul 09 05:44:35 PM PDT 24 29193258 ps
T884 /workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.749090779 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:19 PM PDT 24 341110047 ps
T885 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1616604106 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:27 PM PDT 24 30934197 ps
T886 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.2634495159 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:18 PM PDT 24 196760399 ps
T887 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.4211352983 Jul 09 05:44:11 PM PDT 24 Jul 09 05:44:14 PM PDT 24 37137166 ps
T888 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.1877057015 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:36 PM PDT 24 524363665 ps
T889 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.808342144 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:27 PM PDT 24 152968315 ps
T890 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.2761975519 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:20 PM PDT 24 12574060 ps
T126 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.3087220598 Jul 09 05:44:21 PM PDT 24 Jul 09 05:44:25 PM PDT 24 268806823 ps
T891 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.2806979650 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:28 PM PDT 24 97259680 ps
T892 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.3050888777 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:25 PM PDT 24 24335887 ps
T108 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.2185038152 Jul 09 05:44:20 PM PDT 24 Jul 09 05:44:25 PM PDT 24 661951175 ps
T893 /workspace/coverage/cover_reg_top/16.clkmgr_intr_test.1145826571 Jul 09 05:44:12 PM PDT 24 Jul 09 05:44:15 PM PDT 24 12525861 ps
T894 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.2308491102 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:27 PM PDT 24 11709868 ps
T895 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.3579302273 Jul 09 05:44:10 PM PDT 24 Jul 09 05:44:13 PM PDT 24 57932851 ps
T112 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.2752722183 Jul 09 05:44:26 PM PDT 24 Jul 09 05:44:35 PM PDT 24 314671815 ps
T896 /workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.341765904 Jul 09 05:44:29 PM PDT 24 Jul 09 05:44:33 PM PDT 24 53425593 ps
T897 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.1350406485 Jul 09 05:44:43 PM PDT 24 Jul 09 05:44:44 PM PDT 24 18517552 ps
T898 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.3153878123 Jul 09 05:44:04 PM PDT 24 Jul 09 05:44:11 PM PDT 24 939365671 ps
T899 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.68296805 Jul 09 05:44:33 PM PDT 24 Jul 09 05:44:42 PM PDT 24 43464742 ps
T104 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.581435368 Jul 09 05:44:19 PM PDT 24 Jul 09 05:44:23 PM PDT 24 59064699 ps
T900 /workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.3191793321 Jul 09 05:44:05 PM PDT 24 Jul 09 05:44:10 PM PDT 24 63674206 ps
T901 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.1716843048 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:32 PM PDT 24 31687549 ps
T121 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.1475781913 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:30 PM PDT 24 398546371 ps
T902 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.3701939723 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:25 PM PDT 24 36182383 ps
T128 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.3386554038 Jul 09 05:44:19 PM PDT 24 Jul 09 05:44:23 PM PDT 24 162086519 ps
T903 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.2422749205 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:27 PM PDT 24 28607328 ps
T904 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.1100610931 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:27 PM PDT 24 33258151 ps
T905 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.1111781886 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:36 PM PDT 24 201462592 ps
T906 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.225610242 Jul 09 05:45:39 PM PDT 24 Jul 09 05:45:41 PM PDT 24 13440618 ps
T109 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2810091512 Jul 09 05:44:12 PM PDT 24 Jul 09 05:44:18 PM PDT 24 96148705 ps
T907 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3958229256 Jul 09 05:44:07 PM PDT 24 Jul 09 05:44:17 PM PDT 24 1255124202 ps
T908 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.2861806621 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:29 PM PDT 24 32412060 ps
T909 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2043986626 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:31 PM PDT 24 335948113 ps
T910 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.2198877861 Jul 09 05:44:14 PM PDT 24 Jul 09 05:44:19 PM PDT 24 95554270 ps
T911 /workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.2622231589 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:22 PM PDT 24 78579857 ps
T912 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.1413068586 Jul 09 05:44:21 PM PDT 24 Jul 09 05:44:24 PM PDT 24 40134080 ps
T913 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.55641261 Jul 09 05:44:12 PM PDT 24 Jul 09 05:44:16 PM PDT 24 13660077 ps
T914 /workspace/coverage/cover_reg_top/34.clkmgr_intr_test.1566009223 Jul 09 05:44:42 PM PDT 24 Jul 09 05:44:43 PM PDT 24 12922122 ps
T113 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.2912401778 Jul 09 05:44:06 PM PDT 24 Jul 09 05:44:11 PM PDT 24 125477282 ps
T915 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.4201338178 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:20 PM PDT 24 26309662 ps
T916 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.488742985 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:21 PM PDT 24 70326557 ps
T122 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.495180737 Jul 09 05:44:10 PM PDT 24 Jul 09 05:44:14 PM PDT 24 77681376 ps
T917 /workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.979051856 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:30 PM PDT 24 489720278 ps
T918 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.1122762074 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:28 PM PDT 24 193263702 ps
T919 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.2603125021 Jul 09 05:44:48 PM PDT 24 Jul 09 05:44:50 PM PDT 24 40542499 ps
T127 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.1919187132 Jul 09 05:44:03 PM PDT 24 Jul 09 05:44:07 PM PDT 24 56224528 ps
T123 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.1110481695 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:27 PM PDT 24 103109217 ps
T920 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.2046872509 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:20 PM PDT 24 37562234 ps
T921 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.1324667025 Jul 09 05:44:26 PM PDT 24 Jul 09 05:44:30 PM PDT 24 21085004 ps
T133 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.1972844081 Jul 09 05:44:11 PM PDT 24 Jul 09 05:44:16 PM PDT 24 108681558 ps
T922 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.2819473034 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:32 PM PDT 24 93137172 ps
T923 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.879213039 Jul 09 05:44:07 PM PDT 24 Jul 09 05:44:13 PM PDT 24 179007323 ps
T924 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.380082722 Jul 09 05:44:30 PM PDT 24 Jul 09 05:44:34 PM PDT 24 12560265 ps
T925 /workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2499222740 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:26 PM PDT 24 29004545 ps
T926 /workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.3928829257 Jul 09 05:44:14 PM PDT 24 Jul 09 05:44:18 PM PDT 24 61651149 ps
T927 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.2399126702 Jul 09 05:45:41 PM PDT 24 Jul 09 05:45:42 PM PDT 24 25136802 ps
T110 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.1309734070 Jul 09 05:44:45 PM PDT 24 Jul 09 05:44:47 PM PDT 24 65610871 ps
T928 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.1790571787 Jul 09 05:44:07 PM PDT 24 Jul 09 05:44:11 PM PDT 24 70992020 ps
T929 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.2566905725 Jul 09 05:44:14 PM PDT 24 Jul 09 05:44:17 PM PDT 24 14916566 ps
T930 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.1423493022 Jul 09 05:44:15 PM PDT 24 Jul 09 05:44:23 PM PDT 24 21988404 ps
T931 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.3407921302 Jul 09 05:44:09 PM PDT 24 Jul 09 05:44:12 PM PDT 24 17079147 ps
T932 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.380747041 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:29 PM PDT 24 123865668 ps
T933 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.2627343886 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:26 PM PDT 24 35244192 ps
T934 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.3577314603 Jul 09 05:44:09 PM PDT 24 Jul 09 05:44:13 PM PDT 24 76305778 ps
T935 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2525289536 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:33 PM PDT 24 72955701 ps
T161 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.2164377228 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:28 PM PDT 24 168127885 ps
T936 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.1657685412 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:34 PM PDT 24 66327132 ps
T937 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.97418374 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:31 PM PDT 24 29979505 ps
T938 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.2927878661 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:29 PM PDT 24 67489516 ps
T939 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.1035675121 Jul 09 05:44:04 PM PDT 24 Jul 09 05:44:08 PM PDT 24 26345675 ps
T124 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.2829843269 Jul 09 05:44:30 PM PDT 24 Jul 09 05:44:35 PM PDT 24 198884248 ps
T940 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.251232383 Jul 09 05:44:14 PM PDT 24 Jul 09 05:44:18 PM PDT 24 33687861 ps
T941 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.72679988 Jul 09 05:44:21 PM PDT 24 Jul 09 05:44:24 PM PDT 24 36718115 ps
T942 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.452948686 Jul 09 05:44:26 PM PDT 24 Jul 09 05:44:30 PM PDT 24 13430778 ps
T943 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.1020354740 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:29 PM PDT 24 82382628 ps
T944 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2145522053 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:32 PM PDT 24 620367867 ps
T945 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.71628835 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:19 PM PDT 24 44189853 ps
T946 /workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.1388434487 Jul 09 05:44:07 PM PDT 24 Jul 09 05:44:11 PM PDT 24 67011703 ps
T131 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.1171520140 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:30 PM PDT 24 231263348 ps
T947 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3737230373 Jul 09 05:44:09 PM PDT 24 Jul 09 05:44:14 PM PDT 24 120919061 ps
T948 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.2058079674 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:21 PM PDT 24 56755478 ps
T949 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.1666430997 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:31 PM PDT 24 10623729 ps
T950 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.121312488 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:28 PM PDT 24 126127368 ps
T130 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.725563537 Jul 09 05:44:20 PM PDT 24 Jul 09 05:44:25 PM PDT 24 395407483 ps
T951 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.3883753332 Jul 09 05:44:09 PM PDT 24 Jul 09 05:44:15 PM PDT 24 47392905 ps
T952 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.26377084 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:17 PM PDT 24 57077163 ps
T953 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.3969837616 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:31 PM PDT 24 44816756 ps
T954 /workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.278960761 Jul 09 05:44:19 PM PDT 24 Jul 09 05:44:24 PM PDT 24 200899684 ps
T955 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.2328076440 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:21 PM PDT 24 147378462 ps
T956 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.1855773657 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:19 PM PDT 24 35307256 ps
T957 /workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.2197172667 Jul 09 05:44:03 PM PDT 24 Jul 09 05:44:09 PM PDT 24 162996150 ps
T958 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.1493477592 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:32 PM PDT 24 19363928 ps
T959 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.3289020970 Jul 09 05:44:23 PM PDT 24 Jul 09 05:44:29 PM PDT 24 139878093 ps
T105 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.704660386 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:27 PM PDT 24 321772516 ps
T960 /workspace/coverage/cover_reg_top/4.clkmgr_intr_test.3553356771 Jul 09 05:44:32 PM PDT 24 Jul 09 05:44:34 PM PDT 24 12206736 ps
T961 /workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.3836872892 Jul 09 05:44:06 PM PDT 24 Jul 09 05:44:10 PM PDT 24 50909923 ps
T962 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.65905711 Jul 09 05:44:07 PM PDT 24 Jul 09 05:44:10 PM PDT 24 15313431 ps
T963 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.3395508988 Jul 09 05:44:00 PM PDT 24 Jul 09 05:44:10 PM PDT 24 894818243 ps
T964 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.616234597 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:37 PM PDT 24 337388435 ps
T132 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.1336476371 Jul 09 05:44:21 PM PDT 24 Jul 09 05:44:26 PM PDT 24 131373580 ps
T965 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.2185870256 Jul 09 05:44:03 PM PDT 24 Jul 09 05:44:06 PM PDT 24 23668995 ps
T966 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.2856755021 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:32 PM PDT 24 82617039 ps
T967 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.387546353 Jul 09 05:44:24 PM PDT 24 Jul 09 05:44:30 PM PDT 24 125274642 ps
T968 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.655953139 Jul 09 05:44:13 PM PDT 24 Jul 09 05:44:17 PM PDT 24 108615042 ps
T969 /workspace/coverage/cover_reg_top/25.clkmgr_intr_test.2677272682 Jul 09 05:44:32 PM PDT 24 Jul 09 05:44:34 PM PDT 24 12562590 ps
T970 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.4056772439 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:21 PM PDT 24 23149519 ps
T971 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.142613991 Jul 09 05:44:03 PM PDT 24 Jul 09 05:44:06 PM PDT 24 26252440 ps
T972 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3893579434 Jul 09 05:44:08 PM PDT 24 Jul 09 05:44:12 PM PDT 24 72465496 ps
T973 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.2687386965 Jul 09 05:44:20 PM PDT 24 Jul 09 05:44:24 PM PDT 24 95628564 ps
T974 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.1451205881 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:32 PM PDT 24 37534616 ps
T975 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.1281151127 Jul 09 05:44:06 PM PDT 24 Jul 09 05:44:10 PM PDT 24 36856754 ps
T976 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.1180262409 Jul 09 05:44:29 PM PDT 24 Jul 09 05:44:33 PM PDT 24 31304192 ps
T977 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.935685172 Jul 09 05:44:27 PM PDT 24 Jul 09 05:44:32 PM PDT 24 136332378 ps
T978 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.3200478247 Jul 09 05:44:20 PM PDT 24 Jul 09 05:44:24 PM PDT 24 101655368 ps
T135 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.1904878839 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:20 PM PDT 24 101559367 ps
T979 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.593231544 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:22 PM PDT 24 560339146 ps
T980 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.4094411703 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:32 PM PDT 24 32992170 ps
T981 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.1280053193 Jul 09 05:44:06 PM PDT 24 Jul 09 05:44:10 PM PDT 24 168996659 ps
T982 /workspace/coverage/cover_reg_top/3.clkmgr_intr_test.1310708767 Jul 09 05:44:09 PM PDT 24 Jul 09 05:44:12 PM PDT 24 12418348 ps
T983 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.3134648083 Jul 09 05:44:26 PM PDT 24 Jul 09 05:44:30 PM PDT 24 28695695 ps
T129 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.3488238188 Jul 09 05:44:10 PM PDT 24 Jul 09 05:44:13 PM PDT 24 99961784 ps
T984 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.3491523280 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:28 PM PDT 24 32250329 ps
T985 /workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.2653048251 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:21 PM PDT 24 153349901 ps
T986 /workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.1786250453 Jul 09 05:44:01 PM PDT 24 Jul 09 05:44:04 PM PDT 24 30865917 ps
T987 /workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.834852913 Jul 09 05:44:16 PM PDT 24 Jul 09 05:44:20 PM PDT 24 126183163 ps
T988 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.4060668304 Jul 09 05:44:22 PM PDT 24 Jul 09 05:44:27 PM PDT 24 496413691 ps
T989 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3371949497 Jul 09 05:44:05 PM PDT 24 Jul 09 05:44:09 PM PDT 24 60245717 ps
T990 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.263908933 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:21 PM PDT 24 147169645 ps
T991 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.990138546 Jul 09 05:44:10 PM PDT 24 Jul 09 05:44:14 PM PDT 24 82811010 ps
T992 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.3440186892 Jul 09 05:44:10 PM PDT 24 Jul 09 05:44:13 PM PDT 24 18913088 ps
T993 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.3088849793 Jul 09 05:44:07 PM PDT 24 Jul 09 05:44:11 PM PDT 24 139101843 ps
T994 /workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.3640467956 Jul 09 05:44:18 PM PDT 24 Jul 09 05:44:21 PM PDT 24 99720854 ps
T995 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.726197312 Jul 09 05:44:15 PM PDT 24 Jul 09 05:44:19 PM PDT 24 135301559 ps
T996 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.3788233154 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:29 PM PDT 24 36328032 ps
T997 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.2034922052 Jul 09 05:44:25 PM PDT 24 Jul 09 05:44:29 PM PDT 24 67744426 ps
T998 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.586288072 Jul 09 05:44:08 PM PDT 24 Jul 09 05:44:12 PM PDT 24 19545759 ps
T999 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.4105241167 Jul 09 05:44:28 PM PDT 24 Jul 09 05:44:33 PM PDT 24 14673240 ps
T125 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.485903193 Jul 09 05:44:17 PM PDT 24 Jul 09 05:44:21 PM PDT 24 50316676 ps
T1000 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.4059853156 Jul 09 05:44:18 PM PDT 24 Jul 09 05:44:22 PM PDT 24 151574081 ps
T111 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.3732628218 Jul 09 05:44:12 PM PDT 24 Jul 09 05:44:18 PM PDT 24 448026033 ps
T1001 /workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.2002686712 Jul 09 05:44:12 PM PDT 24 Jul 09 05:44:17 PM PDT 24 153640077 ps
T1002 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.2767392132 Jul 09 05:44:01 PM PDT 24 Jul 09 05:44:04 PM PDT 24 64501395 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%