Group : clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg
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Group : clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_clkmgr_env_0.1/clkmgr_env_cov.sv



Summary for Group clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 22 0 22 100.00


Variables for Group clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
io_div2_measure_cp 2 0 2 100.00 100 1 1 2
io_div2_timeout_cp 2 0 2 100.00 100 1 1 2
io_div4_measure_cp 2 0 2 100.00 100 1 1 2
io_div4_timeout_cp 2 0 2 100.00 100 1 1 2
io_measure_cp 2 0 2 100.00 100 1 1 2
io_timeout_cp 2 0 2 100.00 100 1 1 2
main_measure_cp 2 0 2 100.00 100 1 1 2
main_timeout_cp 2 0 2 100.00 100 1 1 2
shadow_update_cp 2 0 2 100.00 100 1 1 2
usb_measure_cp 2 0 2 100.00 100 1 1 2
usb_timeout_cp 2 0 2 100.00 100 1 1 2


Summary for Variable io_div2_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div2_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18853 1 T4 1 T5 1 T6 1
auto[1] 717 1 T1 3 T2 2 T3 11



Summary for Variable io_div2_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div2_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 15824 1 T4 1 T5 1 T6 1
auto[1] 3746 1 T2 31 T3 8 T28 2



Summary for Variable io_div4_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div4_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18889 1 T4 1 T5 1 T6 1
auto[1] 681 1 T1 3 T2 2 T3 7



Summary for Variable io_div4_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div4_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 15856 1 T4 1 T5 1 T6 1
auto[1] 3714 1 T2 26 T3 7 T28 1



Summary for Variable io_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18875 1 T4 1 T5 1 T6 1
auto[1] 695 1 T2 3 T3 2 T10 9



Summary for Variable io_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 15839 1 T4 1 T5 1 T6 1
auto[1] 3731 1 T2 31 T3 8 T28 2



Summary for Variable main_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for main_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18862 1 T4 1 T5 1 T6 1
auto[1] 708 1 T1 1 T2 2 T3 3



Summary for Variable main_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for main_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18624 1 T4 1 T5 1 T6 1
auto[1] 946 1 T2 8 T3 5 T10 7



Summary for Variable shadow_update_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for shadow_update_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 19376 1 T4 1 T5 1 T6 1
auto[1] 194 1 T62 4 T63 8 T64 5



Summary for Variable usb_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for usb_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18837 1 T4 1 T5 1 T6 1
auto[1] 733 1 T1 1 T2 3 T3 8



Summary for Variable usb_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for usb_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18689 1 T4 1 T5 1 T6 1
auto[1] 881 1 T2 2 T3 3 T10 10

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