| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 22 | 0 | 22 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| io_div2_measure_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| io_div2_timeout_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| io_div4_measure_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| io_div4_timeout_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| io_measure_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| io_timeout_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| main_measure_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| main_timeout_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| shadow_update_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| usb_measure_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| usb_timeout_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8382 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 321 | 1 | T9 | 3 | T1 | 3 | T2 | 7 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 7295 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 1408 | 1 | T7 | 7 | T8 | 3 | T37 | 6 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8430 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 273 | 1 | T9 | 1 | T37 | 1 | T1 | 2 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 7340 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 1363 | 1 | T7 | 7 | T8 | 5 | T37 | 5 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8385 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 318 | 1 | T7 | 1 | T9 | 1 | T37 | 1 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 7302 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 1401 | 1 | T7 | 7 | T8 | 3 | T37 | 6 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8384 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 319 | 1 | T1 | 3 | T2 | 6 | T3 | 10 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8328 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 375 | 1 | T7 | 1 | T8 | 1 | T37 | 2 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8528 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 175 | 1 | T72 | 4 | T73 | 8 | T74 | 5 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8390 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 313 | 1 | T7 | 1 | T9 | 1 | T1 | 2 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 8334 | 1 | T10 | 1 | T11 | 1 | T12 | 1 | ||||
| auto[1] | 369 | 1 | T7 | 4 | T8 | 2 | T37 | 1 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |