Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.51 99.15 95.80 100.00 100.00 98.81 97.02 98.80


Total test records in report: 1010
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T801 /workspace/coverage/default/7.clkmgr_clk_status.1153423391 Aug 16 06:34:33 PM PDT 24 Aug 16 06:34:34 PM PDT 24 27332006 ps
T802 /workspace/coverage/default/11.clkmgr_stress_all.1885082197 Aug 16 06:34:45 PM PDT 24 Aug 16 06:35:21 PM PDT 24 4680281288 ps
T803 /workspace/coverage/default/17.clkmgr_peri.1701430237 Aug 16 06:34:53 PM PDT 24 Aug 16 06:34:54 PM PDT 24 16587048 ps
T804 /workspace/coverage/default/33.clkmgr_idle_intersig_mubi.3656271197 Aug 16 06:35:37 PM PDT 24 Aug 16 06:35:38 PM PDT 24 85016756 ps
T805 /workspace/coverage/default/34.clkmgr_alert_test.80742798 Aug 16 06:35:52 PM PDT 24 Aug 16 06:35:53 PM PDT 24 42058326 ps
T806 /workspace/coverage/default/17.clkmgr_extclk.3718510090 Aug 16 06:34:55 PM PDT 24 Aug 16 06:34:56 PM PDT 24 22509396 ps
T807 /workspace/coverage/default/9.clkmgr_frequency.2308149265 Aug 16 06:34:39 PM PDT 24 Aug 16 06:34:50 PM PDT 24 2029936272 ps
T808 /workspace/coverage/default/15.clkmgr_peri.736451674 Aug 16 06:34:51 PM PDT 24 Aug 16 06:34:52 PM PDT 24 20454872 ps
T809 /workspace/coverage/default/35.clkmgr_stress_all.186293614 Aug 16 06:35:46 PM PDT 24 Aug 16 06:35:59 PM PDT 24 2923827320 ps
T810 /workspace/coverage/default/11.clkmgr_frequency_timeout.2541536218 Aug 16 06:34:42 PM PDT 24 Aug 16 06:34:47 PM PDT 24 986499548 ps
T811 /workspace/coverage/default/7.clkmgr_lc_clk_byp_req_intersig_mubi.3870879537 Aug 16 06:34:30 PM PDT 24 Aug 16 06:34:30 PM PDT 24 43548770 ps
T812 /workspace/coverage/default/39.clkmgr_stress_all_with_rand_reset.1017205816 Aug 16 06:35:53 PM PDT 24 Aug 16 06:36:32 PM PDT 24 2547990574 ps
T813 /workspace/coverage/default/34.clkmgr_div_intersig_mubi.435246310 Aug 16 06:35:46 PM PDT 24 Aug 16 06:35:47 PM PDT 24 177622635 ps
T814 /workspace/coverage/default/46.clkmgr_clk_handshake_intersig_mubi.2658568326 Aug 16 06:36:29 PM PDT 24 Aug 16 06:36:31 PM PDT 24 111033168 ps
T815 /workspace/coverage/default/19.clkmgr_stress_all.4276811761 Aug 16 06:35:08 PM PDT 24 Aug 16 06:36:18 PM PDT 24 9585380304 ps
T816 /workspace/coverage/default/8.clkmgr_regwen.1026372136 Aug 16 06:34:38 PM PDT 24 Aug 16 06:34:41 PM PDT 24 522159504 ps
T817 /workspace/coverage/default/35.clkmgr_idle_intersig_mubi.3446881089 Aug 16 06:35:45 PM PDT 24 Aug 16 06:35:46 PM PDT 24 18344635 ps
T818 /workspace/coverage/default/13.clkmgr_stress_all.2002691881 Aug 16 06:34:43 PM PDT 24 Aug 16 06:34:45 PM PDT 24 36851559 ps
T819 /workspace/coverage/default/19.clkmgr_trans.2212639321 Aug 16 06:35:01 PM PDT 24 Aug 16 06:35:02 PM PDT 24 31215003 ps
T820 /workspace/coverage/default/9.clkmgr_div_intersig_mubi.929005572 Aug 16 06:34:37 PM PDT 24 Aug 16 06:34:38 PM PDT 24 26034124 ps
T821 /workspace/coverage/default/27.clkmgr_div_intersig_mubi.1412110209 Aug 16 06:35:32 PM PDT 24 Aug 16 06:35:33 PM PDT 24 25113866 ps
T822 /workspace/coverage/default/16.clkmgr_frequency_timeout.1018187190 Aug 16 06:34:55 PM PDT 24 Aug 16 06:35:06 PM PDT 24 1580487204 ps
T823 /workspace/coverage/default/44.clkmgr_clk_status.2614940502 Aug 16 06:36:08 PM PDT 24 Aug 16 06:36:09 PM PDT 24 44536401 ps
T824 /workspace/coverage/default/6.clkmgr_stress_all.3258176145 Aug 16 06:34:29 PM PDT 24 Aug 16 06:35:02 PM PDT 24 6186847887 ps
T825 /workspace/coverage/default/43.clkmgr_trans.3131455749 Aug 16 06:36:21 PM PDT 24 Aug 16 06:36:22 PM PDT 24 27213915 ps
T826 /workspace/coverage/default/11.clkmgr_alert_test.3922437591 Aug 16 06:34:43 PM PDT 24 Aug 16 06:34:44 PM PDT 24 21060791 ps
T827 /workspace/coverage/default/32.clkmgr_trans.4173862288 Aug 16 06:35:41 PM PDT 24 Aug 16 06:35:43 PM PDT 24 176038146 ps
T828 /workspace/coverage/default/18.clkmgr_stress_all_with_rand_reset.2516116208 Aug 16 06:34:58 PM PDT 24 Aug 16 06:37:30 PM PDT 24 24084751509 ps
T829 /workspace/coverage/default/42.clkmgr_idle_intersig_mubi.2518166873 Aug 16 06:36:08 PM PDT 24 Aug 16 06:36:09 PM PDT 24 34977958 ps
T830 /workspace/coverage/default/5.clkmgr_stress_all_with_rand_reset.4088822101 Aug 16 06:34:30 PM PDT 24 Aug 16 06:35:44 PM PDT 24 8013316379 ps
T831 /workspace/coverage/default/8.clkmgr_div_intersig_mubi.1492421357 Aug 16 06:34:37 PM PDT 24 Aug 16 06:34:38 PM PDT 24 40280912 ps
T832 /workspace/coverage/default/7.clkmgr_stress_all.570316985 Aug 16 06:34:31 PM PDT 24 Aug 16 06:34:54 PM PDT 24 6024642845 ps
T833 /workspace/coverage/default/13.clkmgr_frequency.2807621045 Aug 16 06:34:46 PM PDT 24 Aug 16 06:34:51 PM PDT 24 980490103 ps
T834 /workspace/coverage/default/27.clkmgr_idle_intersig_mubi.2101637800 Aug 16 06:35:36 PM PDT 24 Aug 16 06:35:37 PM PDT 24 85861269 ps
T835 /workspace/coverage/default/39.clkmgr_smoke.3429459326 Aug 16 06:35:51 PM PDT 24 Aug 16 06:35:53 PM PDT 24 24553251 ps
T836 /workspace/coverage/default/22.clkmgr_lc_clk_byp_req_intersig_mubi.3569526789 Aug 16 06:35:20 PM PDT 24 Aug 16 06:35:21 PM PDT 24 73188065 ps
T837 /workspace/coverage/default/29.clkmgr_lc_ctrl_intersig_mubi.1679966737 Aug 16 06:35:45 PM PDT 24 Aug 16 06:35:47 PM PDT 24 171084369 ps
T838 /workspace/coverage/default/47.clkmgr_regwen.396926659 Aug 16 06:36:33 PM PDT 24 Aug 16 06:36:39 PM PDT 24 1072751180 ps
T839 /workspace/coverage/default/42.clkmgr_lc_ctrl_intersig_mubi.2884658358 Aug 16 06:36:09 PM PDT 24 Aug 16 06:36:10 PM PDT 24 20236083 ps
T840 /workspace/coverage/default/26.clkmgr_clk_handshake_intersig_mubi.2047192460 Aug 16 06:35:32 PM PDT 24 Aug 16 06:35:33 PM PDT 24 39592392 ps
T841 /workspace/coverage/default/36.clkmgr_frequency_timeout.1192245108 Aug 16 06:35:43 PM PDT 24 Aug 16 06:35:49 PM PDT 24 735153353 ps
T842 /workspace/coverage/default/4.clkmgr_smoke.1518233652 Aug 16 06:34:32 PM PDT 24 Aug 16 06:34:33 PM PDT 24 68179098 ps
T843 /workspace/coverage/default/49.clkmgr_stress_all_with_rand_reset.2782308368 Aug 16 06:36:22 PM PDT 24 Aug 16 06:37:21 PM PDT 24 8395588186 ps
T844 /workspace/coverage/default/14.clkmgr_trans.192937342 Aug 16 06:34:47 PM PDT 24 Aug 16 06:34:48 PM PDT 24 45957957 ps
T845 /workspace/coverage/default/13.clkmgr_frequency_timeout.3974980661 Aug 16 06:34:45 PM PDT 24 Aug 16 06:34:47 PM PDT 24 139894662 ps
T846 /workspace/coverage/default/37.clkmgr_frequency.769873951 Aug 16 06:35:50 PM PDT 24 Aug 16 06:35:54 PM PDT 24 607232911 ps
T847 /workspace/coverage/default/11.clkmgr_stress_all_with_rand_reset.3273101550 Aug 16 06:34:51 PM PDT 24 Aug 16 06:36:00 PM PDT 24 4428812381 ps
T848 /workspace/coverage/default/14.clkmgr_lc_clk_byp_req_intersig_mubi.816664036 Aug 16 06:34:54 PM PDT 24 Aug 16 06:34:55 PM PDT 24 19332420 ps
T849 /workspace/coverage/default/6.clkmgr_clk_status.1747448571 Aug 16 06:34:32 PM PDT 24 Aug 16 06:34:33 PM PDT 24 15567904 ps
T850 /workspace/coverage/default/11.clkmgr_lc_clk_byp_req_intersig_mubi.3400867571 Aug 16 06:34:46 PM PDT 24 Aug 16 06:34:47 PM PDT 24 15814417 ps
T851 /workspace/coverage/default/27.clkmgr_extclk.3610698980 Aug 16 06:35:40 PM PDT 24 Aug 16 06:35:41 PM PDT 24 69823741 ps
T57 /workspace/coverage/default/4.clkmgr_sec_cm.2087538237 Aug 16 06:34:27 PM PDT 24 Aug 16 06:34:31 PM PDT 24 668586331 ps
T852 /workspace/coverage/default/6.clkmgr_smoke.1020991601 Aug 16 06:34:28 PM PDT 24 Aug 16 06:34:29 PM PDT 24 30483917 ps
T853 /workspace/coverage/default/39.clkmgr_trans.3762646940 Aug 16 06:36:15 PM PDT 24 Aug 16 06:36:16 PM PDT 24 149049570 ps
T854 /workspace/coverage/default/36.clkmgr_idle_intersig_mubi.603356949 Aug 16 06:35:47 PM PDT 24 Aug 16 06:35:48 PM PDT 24 83666706 ps
T68 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.1106104679 Aug 16 06:33:15 PM PDT 24 Aug 16 06:33:17 PM PDT 24 200871933 ps
T71 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.3196351027 Aug 16 06:32:44 PM PDT 24 Aug 16 06:32:46 PM PDT 24 129008368 ps
T69 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.578508329 Aug 16 06:33:18 PM PDT 24 Aug 16 06:33:21 PM PDT 24 170591785 ps
T855 /workspace/coverage/cover_reg_top/44.clkmgr_intr_test.1145841664 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 25185236 ps
T856 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.4223597904 Aug 16 06:33:11 PM PDT 24 Aug 16 06:33:12 PM PDT 24 21784519 ps
T857 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.3155145634 Aug 16 06:32:49 PM PDT 24 Aug 16 06:32:51 PM PDT 24 103028701 ps
T108 /workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.1226661738 Aug 16 06:32:51 PM PDT 24 Aug 16 06:32:52 PM PDT 24 71232234 ps
T90 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.4107891680 Aug 16 06:32:46 PM PDT 24 Aug 16 06:32:47 PM PDT 24 21823899 ps
T858 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.2860230940 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:40 PM PDT 24 47476049 ps
T859 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.1787524224 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:16 PM PDT 24 1196234884 ps
T70 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1583985950 Aug 16 06:32:45 PM PDT 24 Aug 16 06:32:48 PM PDT 24 243240096 ps
T860 /workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2036149095 Aug 16 06:33:09 PM PDT 24 Aug 16 06:33:11 PM PDT 24 27515888 ps
T861 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.654504609 Aug 16 06:33:08 PM PDT 24 Aug 16 06:33:10 PM PDT 24 128855346 ps
T103 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1973481020 Aug 16 06:32:49 PM PDT 24 Aug 16 06:32:52 PM PDT 24 145265575 ps
T72 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3275679947 Aug 16 06:33:02 PM PDT 24 Aug 16 06:33:05 PM PDT 24 94641364 ps
T862 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.354948808 Aug 16 06:32:29 PM PDT 24 Aug 16 06:32:36 PM PDT 24 280410433 ps
T91 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.1851225958 Aug 16 06:32:26 PM PDT 24 Aug 16 06:32:27 PM PDT 24 23001563 ps
T75 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.415647568 Aug 16 06:33:20 PM PDT 24 Aug 16 06:33:23 PM PDT 24 266860672 ps
T863 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.1901664013 Aug 16 06:33:08 PM PDT 24 Aug 16 06:33:08 PM PDT 24 22514181 ps
T864 /workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.10679984 Aug 16 06:32:30 PM PDT 24 Aug 16 06:32:31 PM PDT 24 74106347 ps
T865 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.2949934987 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:24 PM PDT 24 12033621 ps
T92 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.2893580928 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:33 PM PDT 24 201034703 ps
T866 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.100315619 Aug 16 06:32:47 PM PDT 24 Aug 16 06:32:48 PM PDT 24 69609317 ps
T93 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.210607212 Aug 16 06:32:30 PM PDT 24 Aug 16 06:32:31 PM PDT 24 39510439 ps
T73 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.1514008185 Aug 16 06:33:08 PM PDT 24 Aug 16 06:33:10 PM PDT 24 111015986 ps
T94 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.180488271 Aug 16 06:33:16 PM PDT 24 Aug 16 06:33:17 PM PDT 24 23273311 ps
T867 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.1708242279 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:32 PM PDT 24 58231736 ps
T868 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.2449972967 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 21590571 ps
T95 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.3973549232 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:32 PM PDT 24 15413729 ps
T869 /workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.1718353858 Aug 16 06:33:09 PM PDT 24 Aug 16 06:33:10 PM PDT 24 69182784 ps
T104 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.2743639809 Aug 16 06:32:40 PM PDT 24 Aug 16 06:32:43 PM PDT 24 273074964 ps
T870 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.1257238429 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:35 PM PDT 24 517979249 ps
T871 /workspace/coverage/cover_reg_top/4.clkmgr_intr_test.1654473444 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:40 PM PDT 24 15491590 ps
T74 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.938080058 Aug 16 06:33:20 PM PDT 24 Aug 16 06:33:23 PM PDT 24 267208463 ps
T120 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.48910041 Aug 16 06:32:52 PM PDT 24 Aug 16 06:32:54 PM PDT 24 151013035 ps
T105 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.4056173394 Aug 16 06:33:15 PM PDT 24 Aug 16 06:33:19 PM PDT 24 335054318 ps
T76 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.1820577828 Aug 16 06:32:34 PM PDT 24 Aug 16 06:32:36 PM PDT 24 136079121 ps
T872 /workspace/coverage/cover_reg_top/45.clkmgr_intr_test.1800882157 Aug 16 06:33:22 PM PDT 24 Aug 16 06:33:23 PM PDT 24 73573766 ps
T138 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.3147219021 Aug 16 06:33:09 PM PDT 24 Aug 16 06:33:11 PM PDT 24 141125605 ps
T121 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.487256003 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:42 PM PDT 24 176148324 ps
T115 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.3286598624 Aug 16 06:32:53 PM PDT 24 Aug 16 06:32:55 PM PDT 24 163188336 ps
T873 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.3476530568 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 84777813 ps
T874 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.3579757235 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:24 PM PDT 24 12224432 ps
T875 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.2192450324 Aug 16 06:33:07 PM PDT 24 Aug 16 06:33:09 PM PDT 24 48149605 ps
T133 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.3864165922 Aug 16 06:33:03 PM PDT 24 Aug 16 06:33:06 PM PDT 24 326453693 ps
T876 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.3057042279 Aug 16 06:32:46 PM PDT 24 Aug 16 06:32:47 PM PDT 24 35991496 ps
T877 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.195321836 Aug 16 06:32:49 PM PDT 24 Aug 16 06:32:50 PM PDT 24 36089099 ps
T116 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.543400067 Aug 16 06:32:30 PM PDT 24 Aug 16 06:32:33 PM PDT 24 92935169 ps
T878 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.3997989456 Aug 16 06:32:52 PM PDT 24 Aug 16 06:32:53 PM PDT 24 57461822 ps
T879 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.3434903558 Aug 16 06:33:16 PM PDT 24 Aug 16 06:33:17 PM PDT 24 19612693 ps
T134 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1562373537 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:33 PM PDT 24 42474836 ps
T880 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.3605448925 Aug 16 06:32:56 PM PDT 24 Aug 16 06:32:58 PM PDT 24 93064801 ps
T881 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.611233701 Aug 16 06:32:44 PM PDT 24 Aug 16 06:32:45 PM PDT 24 12801629 ps
T882 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.1909832742 Aug 16 06:33:20 PM PDT 24 Aug 16 06:33:21 PM PDT 24 46195381 ps
T883 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.1723394185 Aug 16 06:32:28 PM PDT 24 Aug 16 06:32:29 PM PDT 24 34461713 ps
T884 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.2700867144 Aug 16 06:33:18 PM PDT 24 Aug 16 06:33:21 PM PDT 24 109298885 ps
T885 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.400062707 Aug 16 06:32:33 PM PDT 24 Aug 16 06:32:35 PM PDT 24 24170550 ps
T886 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.490877711 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 52435101 ps
T109 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.2034137335 Aug 16 06:32:47 PM PDT 24 Aug 16 06:32:48 PM PDT 24 114800237 ps
T112 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.3529960032 Aug 16 06:32:47 PM PDT 24 Aug 16 06:32:49 PM PDT 24 105229399 ps
T887 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.592733216 Aug 16 06:33:01 PM PDT 24 Aug 16 06:33:04 PM PDT 24 246013191 ps
T888 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.1044659504 Aug 16 06:33:22 PM PDT 24 Aug 16 06:33:22 PM PDT 24 42839557 ps
T889 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.2629210528 Aug 16 06:32:52 PM PDT 24 Aug 16 06:32:54 PM PDT 24 58292924 ps
T890 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.828884968 Aug 16 06:32:34 PM PDT 24 Aug 16 06:32:35 PM PDT 24 59473245 ps
T891 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3595635332 Aug 16 06:33:16 PM PDT 24 Aug 16 06:33:17 PM PDT 24 75517005 ps
T892 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.329543523 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:24 PM PDT 24 28518509 ps
T107 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.1706819090 Aug 16 06:32:44 PM PDT 24 Aug 16 06:32:46 PM PDT 24 100302818 ps
T126 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.285000246 Aug 16 06:32:48 PM PDT 24 Aug 16 06:32:51 PM PDT 24 269399498 ps
T893 /workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.1067045954 Aug 16 06:32:44 PM PDT 24 Aug 16 06:32:54 PM PDT 24 1365967852 ps
T894 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.4145414462 Aug 16 06:32:45 PM PDT 24 Aug 16 06:32:46 PM PDT 24 33929856 ps
T895 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.31890680 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 33441302 ps
T183 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.739429578 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:21 PM PDT 24 608213719 ps
T122 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.636206299 Aug 16 06:32:23 PM PDT 24 Aug 16 06:32:25 PM PDT 24 178609851 ps
T135 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.1729082675 Aug 16 06:32:48 PM PDT 24 Aug 16 06:32:51 PM PDT 24 292321586 ps
T127 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.3651075867 Aug 16 06:32:49 PM PDT 24 Aug 16 06:32:51 PM PDT 24 128223266 ps
T896 /workspace/coverage/cover_reg_top/46.clkmgr_intr_test.3820811934 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:24 PM PDT 24 34047918 ps
T897 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.2559495479 Aug 16 06:33:14 PM PDT 24 Aug 16 06:33:15 PM PDT 24 18318217 ps
T898 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.1521023789 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:25 PM PDT 24 29873605 ps
T899 /workspace/coverage/cover_reg_top/1.clkmgr_intr_test.2131797202 Aug 16 06:32:33 PM PDT 24 Aug 16 06:32:34 PM PDT 24 37307575 ps
T900 /workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.4168368590 Aug 16 06:32:58 PM PDT 24 Aug 16 06:32:59 PM PDT 24 23601950 ps
T130 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.1644865446 Aug 16 06:33:08 PM PDT 24 Aug 16 06:33:11 PM PDT 24 132833614 ps
T137 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2774769142 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:12 PM PDT 24 69626097 ps
T901 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.4056007895 Aug 16 06:32:52 PM PDT 24 Aug 16 06:32:53 PM PDT 24 21963928 ps
T902 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.556903439 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 15362935 ps
T903 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.976140259 Aug 16 06:33:09 PM PDT 24 Aug 16 06:33:10 PM PDT 24 19996310 ps
T904 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.4066916521 Aug 16 06:32:29 PM PDT 24 Aug 16 06:32:30 PM PDT 24 48631313 ps
T905 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.1193967270 Aug 16 06:32:40 PM PDT 24 Aug 16 06:32:41 PM PDT 24 59198920 ps
T128 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.3418502523 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:19 PM PDT 24 168130795 ps
T906 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.147564544 Aug 16 06:32:38 PM PDT 24 Aug 16 06:32:41 PM PDT 24 86395786 ps
T907 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.1438585107 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:49 PM PDT 24 1320503365 ps
T908 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.2353286541 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:32 PM PDT 24 51736636 ps
T909 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2252584316 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 27580122 ps
T910 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.4224838726 Aug 16 06:33:13 PM PDT 24 Aug 16 06:33:14 PM PDT 24 26045324 ps
T911 /workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.3572697082 Aug 16 06:32:58 PM PDT 24 Aug 16 06:33:00 PM PDT 24 117294328 ps
T912 /workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.2681914596 Aug 16 06:32:30 PM PDT 24 Aug 16 06:32:31 PM PDT 24 28414112 ps
T913 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3986078410 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:11 PM PDT 24 29821683 ps
T914 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3929030695 Aug 16 06:33:00 PM PDT 24 Aug 16 06:33:01 PM PDT 24 25355927 ps
T915 /workspace/coverage/cover_reg_top/24.clkmgr_intr_test.878649684 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 20630503 ps
T184 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.268909911 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:12 PM PDT 24 70696570 ps
T136 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.3584761444 Aug 16 06:33:15 PM PDT 24 Aug 16 06:33:17 PM PDT 24 315813246 ps
T916 /workspace/coverage/cover_reg_top/25.clkmgr_intr_test.2811116793 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 19299530 ps
T132 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.3351142461 Aug 16 06:32:49 PM PDT 24 Aug 16 06:32:52 PM PDT 24 340467692 ps
T917 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.113163596 Aug 16 06:33:09 PM PDT 24 Aug 16 06:33:11 PM PDT 24 155494420 ps
T918 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.638848102 Aug 16 06:33:18 PM PDT 24 Aug 16 06:33:19 PM PDT 24 55620881 ps
T919 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.2302910683 Aug 16 06:33:07 PM PDT 24 Aug 16 06:33:08 PM PDT 24 21902683 ps
T920 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.3076687031 Aug 16 06:33:19 PM PDT 24 Aug 16 06:33:19 PM PDT 24 12752239 ps
T921 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.3730839953 Aug 16 06:33:00 PM PDT 24 Aug 16 06:33:01 PM PDT 24 33978359 ps
T131 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.3333806928 Aug 16 06:33:01 PM PDT 24 Aug 16 06:33:03 PM PDT 24 269651510 ps
T922 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.3209082875 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:40 PM PDT 24 84325055 ps
T923 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.1527732653 Aug 16 06:32:42 PM PDT 24 Aug 16 06:32:44 PM PDT 24 57807823 ps
T924 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.376462809 Aug 16 06:32:49 PM PDT 24 Aug 16 06:32:49 PM PDT 24 15026926 ps
T925 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.3380842936 Aug 16 06:32:26 PM PDT 24 Aug 16 06:32:27 PM PDT 24 32622303 ps
T926 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.3852453145 Aug 16 06:33:15 PM PDT 24 Aug 16 06:33:16 PM PDT 24 26480437 ps
T927 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.698241466 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:12 PM PDT 24 222057979 ps
T928 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.1493276670 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:19 PM PDT 24 194070695 ps
T929 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.572412351 Aug 16 06:32:38 PM PDT 24 Aug 16 06:32:40 PM PDT 24 189797699 ps
T930 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.626130030 Aug 16 06:32:54 PM PDT 24 Aug 16 06:32:56 PM PDT 24 432016546 ps
T931 /workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.282071946 Aug 16 06:32:42 PM PDT 24 Aug 16 06:32:43 PM PDT 24 40300865 ps
T110 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.2095237815 Aug 16 06:33:11 PM PDT 24 Aug 16 06:33:13 PM PDT 24 123178904 ps
T932 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.1423266572 Aug 16 06:32:44 PM PDT 24 Aug 16 06:32:45 PM PDT 24 49033540 ps
T129 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.2817700953 Aug 16 06:33:07 PM PDT 24 Aug 16 06:33:09 PM PDT 24 54819139 ps
T933 /workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.1579300312 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:41 PM PDT 24 78519304 ps
T934 /workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.2730945643 Aug 16 06:32:50 PM PDT 24 Aug 16 06:32:53 PM PDT 24 125106916 ps
T935 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.3940722612 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:12 PM PDT 24 52815059 ps
T114 /workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.500255216 Aug 16 06:32:34 PM PDT 24 Aug 16 06:32:36 PM PDT 24 229769371 ps
T936 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.3728690963 Aug 16 06:32:27 PM PDT 24 Aug 16 06:32:29 PM PDT 24 77126975 ps
T937 /workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.615965919 Aug 16 06:32:33 PM PDT 24 Aug 16 06:32:35 PM PDT 24 198390865 ps
T938 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2707677054 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 52993504 ps
T939 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.1909487092 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:24 PM PDT 24 15131349 ps
T123 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.652951700 Aug 16 06:32:51 PM PDT 24 Aug 16 06:32:54 PM PDT 24 111992259 ps
T940 /workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1861905641 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:19 PM PDT 24 138410619 ps
T941 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.1551418391 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:35 PM PDT 24 666335433 ps
T942 /workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.3462307940 Aug 16 06:33:11 PM PDT 24 Aug 16 06:33:13 PM PDT 24 30530246 ps
T943 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.318945652 Aug 16 06:33:11 PM PDT 24 Aug 16 06:33:13 PM PDT 24 411340480 ps
T111 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3030238475 Aug 16 06:33:01 PM PDT 24 Aug 16 06:33:04 PM PDT 24 130178248 ps
T944 /workspace/coverage/cover_reg_top/36.clkmgr_intr_test.455806909 Aug 16 06:33:22 PM PDT 24 Aug 16 06:33:23 PM PDT 24 29257160 ps
T945 /workspace/coverage/cover_reg_top/3.clkmgr_intr_test.3900184801 Aug 16 06:32:38 PM PDT 24 Aug 16 06:32:39 PM PDT 24 25669043 ps
T946 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.36307831 Aug 16 06:33:11 PM PDT 24 Aug 16 06:33:12 PM PDT 24 14196432 ps
T947 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.2215443334 Aug 16 06:33:09 PM PDT 24 Aug 16 06:33:10 PM PDT 24 19437177 ps
T948 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.3115029851 Aug 16 06:32:23 PM PDT 24 Aug 16 06:32:25 PM PDT 24 91534073 ps
T949 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.682504421 Aug 16 06:33:20 PM PDT 24 Aug 16 06:33:21 PM PDT 24 233852082 ps
T950 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.2977416408 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:24 PM PDT 24 14790686 ps
T951 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.4208948760 Aug 16 06:32:53 PM PDT 24 Aug 16 06:32:54 PM PDT 24 13581650 ps
T952 /workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.1768675212 Aug 16 06:33:11 PM PDT 24 Aug 16 06:33:12 PM PDT 24 16087748 ps
T953 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.4250484764 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:20 PM PDT 24 217976008 ps
T954 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.4203212830 Aug 16 06:32:31 PM PDT 24 Aug 16 06:32:33 PM PDT 24 67453420 ps
T955 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.2686547224 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:25 PM PDT 24 43300728 ps
T956 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.1519226564 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 21951508 ps
T957 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.2729197893 Aug 16 06:32:23 PM PDT 24 Aug 16 06:32:25 PM PDT 24 210720452 ps
T958 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.2348086210 Aug 16 06:33:22 PM PDT 24 Aug 16 06:33:23 PM PDT 24 16057680 ps
T959 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.2032292415 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 14771319 ps
T960 /workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.925017418 Aug 16 06:33:15 PM PDT 24 Aug 16 06:33:16 PM PDT 24 31717548 ps
T961 /workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.43596120 Aug 16 06:32:42 PM PDT 24 Aug 16 06:32:44 PM PDT 24 98647087 ps
T962 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.2021544130 Aug 16 06:32:33 PM PDT 24 Aug 16 06:32:44 PM PDT 24 1347000042 ps
T113 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.4269998078 Aug 16 06:33:20 PM PDT 24 Aug 16 06:33:23 PM PDT 24 104810120 ps
T963 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.2001612283 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 14980073 ps
T964 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.2412976046 Aug 16 06:33:18 PM PDT 24 Aug 16 06:33:18 PM PDT 24 38988183 ps
T965 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.3712587659 Aug 16 06:32:59 PM PDT 24 Aug 16 06:33:00 PM PDT 24 121656292 ps
T966 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.2636755658 Aug 16 06:33:21 PM PDT 24 Aug 16 06:33:22 PM PDT 24 22825986 ps
T124 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.4251426801 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:42 PM PDT 24 575428996 ps
T967 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1771025065 Aug 16 06:32:42 PM PDT 24 Aug 16 06:32:43 PM PDT 24 18745159 ps
T968 /workspace/coverage/cover_reg_top/16.clkmgr_intr_test.496041657 Aug 16 06:33:18 PM PDT 24 Aug 16 06:33:19 PM PDT 24 14386132 ps
T969 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.3292260146 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 41491387 ps
T970 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.1437762181 Aug 16 06:33:01 PM PDT 24 Aug 16 06:33:01 PM PDT 24 32675160 ps
T971 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.304656157 Aug 16 06:33:07 PM PDT 24 Aug 16 06:33:08 PM PDT 24 19821235 ps
T972 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.3805382914 Aug 16 06:32:39 PM PDT 24 Aug 16 06:32:41 PM PDT 24 80712402 ps
T973 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.3941892996 Aug 16 06:33:18 PM PDT 24 Aug 16 06:33:20 PM PDT 24 129997124 ps
T974 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.2433574761 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 21709196 ps
T975 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.2783785424 Aug 16 06:33:09 PM PDT 24 Aug 16 06:33:11 PM PDT 24 120716668 ps
T976 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.3694820567 Aug 16 06:33:00 PM PDT 24 Aug 16 06:33:01 PM PDT 24 28688652 ps
T977 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.532261766 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:18 PM PDT 24 64427902 ps
T978 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.696862308 Aug 16 06:33:15 PM PDT 24 Aug 16 06:33:16 PM PDT 24 14085886 ps
T979 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.1020105220 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:24 PM PDT 24 10639260 ps
T980 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.3441087574 Aug 16 06:33:08 PM PDT 24 Aug 16 06:33:10 PM PDT 24 146218878 ps
T981 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.4259645940 Aug 16 06:32:38 PM PDT 24 Aug 16 06:32:39 PM PDT 24 16468366 ps
T982 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.1746223078 Aug 16 06:33:07 PM PDT 24 Aug 16 06:33:10 PM PDT 24 98073154 ps
T983 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.1463140638 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 23542965 ps
T984 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.1154367152 Aug 16 06:32:33 PM PDT 24 Aug 16 06:32:35 PM PDT 24 365246436 ps
T985 /workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.1847323732 Aug 16 06:32:54 PM PDT 24 Aug 16 06:32:56 PM PDT 24 29945533 ps
T986 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.947117558 Aug 16 06:32:46 PM PDT 24 Aug 16 06:32:48 PM PDT 24 37405128 ps
T987 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.3432833267 Aug 16 06:32:47 PM PDT 24 Aug 16 06:32:49 PM PDT 24 227955125 ps
T988 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.1494203053 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:21 PM PDT 24 228124920 ps
T989 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.1453401594 Aug 16 06:32:52 PM PDT 24 Aug 16 06:32:54 PM PDT 24 51681230 ps
T990 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.107543378 Aug 16 06:33:11 PM PDT 24 Aug 16 06:33:13 PM PDT 24 40974256 ps
T991 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.3558406977 Aug 16 06:33:17 PM PDT 24 Aug 16 06:33:19 PM PDT 24 40771468 ps
T992 /workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.2817239739 Aug 16 06:32:25 PM PDT 24 Aug 16 06:32:31 PM PDT 24 409422451 ps
T993 /workspace/coverage/cover_reg_top/34.clkmgr_intr_test.1304005014 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:23 PM PDT 24 13383631 ps
T994 /workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.760495010 Aug 16 06:33:16 PM PDT 24 Aug 16 06:33:17 PM PDT 24 86753031 ps
T995 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3823245203 Aug 16 06:33:01 PM PDT 24 Aug 16 06:33:02 PM PDT 24 44164399 ps
T996 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.3601221178 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:13 PM PDT 24 151907693 ps
T997 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.1272465484 Aug 16 06:33:24 PM PDT 24 Aug 16 06:33:25 PM PDT 24 22990403 ps
T998 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.1453539672 Aug 16 06:33:10 PM PDT 24 Aug 16 06:33:12 PM PDT 24 213364519 ps
T999 /workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.3471009033 Aug 16 06:33:01 PM PDT 24 Aug 16 06:33:03 PM PDT 24 143499093 ps
T1000 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.1337705739 Aug 16 06:33:23 PM PDT 24 Aug 16 06:33:26 PM PDT 24 86609209 ps
T1001 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.1314688716 Aug 16 06:33:08 PM PDT 24 Aug 16 06:33:10 PM PDT 24 106537963 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%