Group : clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg
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Group : clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_clkmgr_env_0.1/clkmgr_env_cov.sv



Summary for Group clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 22 0 22 100.00


Variables for Group clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
io_div2_measure_cp 2 0 2 100.00 100 1 1 2
io_div2_timeout_cp 2 0 2 100.00 100 1 1 2
io_div4_measure_cp 2 0 2 100.00 100 1 1 2
io_div4_timeout_cp 2 0 2 100.00 100 1 1 2
io_measure_cp 2 0 2 100.00 100 1 1 2
io_timeout_cp 2 0 2 100.00 100 1 1 2
main_measure_cp 2 0 2 100.00 100 1 1 2
main_timeout_cp 2 0 2 100.00 100 1 1 2
shadow_update_cp 2 0 2 100.00 100 1 1 2
usb_measure_cp 2 0 2 100.00 100 1 1 2
usb_timeout_cp 2 0 2 100.00 100 1 1 2


Summary for Variable io_div2_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div2_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8656 1 T5 1 T6 1 T7 1
auto[1] 259 1 T1 1 T2 4 T3 1



Summary for Variable io_div2_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div2_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7340 1 T5 1 T6 1 T7 1
auto[1] 1575 1 T1 3 T4 5 T24 2



Summary for Variable io_div4_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div4_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8624 1 T5 1 T6 1 T7 1
auto[1] 291 1 T1 3 T2 3 T3 1



Summary for Variable io_div4_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_div4_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7320 1 T5 1 T6 1 T7 1
auto[1] 1595 1 T1 3 T4 5 T24 1



Summary for Variable io_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8662 1 T5 1 T6 1 T7 1
auto[1] 253 1 T2 2 T3 2 T12 1



Summary for Variable io_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for io_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7346 1 T5 1 T6 1 T7 1
auto[1] 1569 1 T1 3 T4 5 T24 2



Summary for Variable main_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for main_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8634 1 T5 1 T6 1 T7 1
auto[1] 281 1 T1 3 T2 3 T3 1



Summary for Variable main_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for main_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8480 1 T5 1 T6 1 T7 1
auto[1] 435 1 T4 3 T33 2 T11 1



Summary for Variable shadow_update_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for shadow_update_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8756 1 T5 1 T6 1 T7 1
auto[1] 159 1 T70 2 T71 7 T72 5



Summary for Variable usb_measure_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for usb_measure_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8643 1 T5 1 T6 1 T7 1
auto[1] 272 1 T1 1 T3 3 T12 5



Summary for Variable usb_timeout_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for usb_timeout_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8496 1 T5 1 T6 1 T7 1
auto[1] 419 1 T4 1 T24 1 T33 2

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