| T803 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_trans.2432032551 |
|
|
Sep 11 02:55:50 AM UTC 24 |
Sep 11 02:55:56 AM UTC 24 |
23449638 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_clk_byp_req_intersig_mubi.3387319193 |
|
|
Sep 11 02:55:51 AM UTC 24 |
Sep 11 02:55:56 AM UTC 24 |
90399142 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/45.clkmgr_frequency.4005102413 |
|
|
Sep 11 02:55:41 AM UTC 24 |
Sep 11 02:55:56 AM UTC 24 |
1766361194 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_ctrl_intersig_mubi.2933245943 |
|
|
Sep 11 02:55:51 AM UTC 24 |
Sep 11 02:55:56 AM UTC 24 |
87370822 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_idle_intersig_mubi.1533789644 |
|
|
Sep 11 02:55:51 AM UTC 24 |
Sep 11 02:55:56 AM UTC 24 |
148372099 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all.3385384115 |
|
|
Sep 11 02:55:41 AM UTC 24 |
Sep 11 02:55:57 AM UTC 24 |
3493059230 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/32.clkmgr_stress_all.1459840086 |
|
|
Sep 11 02:54:51 AM UTC 24 |
Sep 11 02:55:57 AM UTC 24 |
7694668525 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency_timeout.3906311049 |
|
|
Sep 11 02:55:53 AM UTC 24 |
Sep 11 02:55:58 AM UTC 24 |
624163023 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_idle_intersig_mubi.1910831381 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:55:59 AM UTC 24 |
17280640 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_status.2809211822 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:55:59 AM UTC 24 |
14527708 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency.3753497050 |
|
|
Sep 11 02:55:52 AM UTC 24 |
Sep 11 02:55:59 AM UTC 24 |
847211335 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_ctrl_intersig_mubi.3081552079 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:55:59 AM UTC 24 |
101445846 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_regwen.1861600676 |
|
|
Sep 11 02:55:52 AM UTC 24 |
Sep 11 02:55:59 AM UTC 24 |
999926844 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency.405614670 |
|
|
Sep 11 02:55:50 AM UTC 24 |
Sep 11 02:56:00 AM UTC 24 |
1324008354 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all.3576915535 |
|
|
Sep 11 02:55:49 AM UTC 24 |
Sep 11 02:56:00 AM UTC 24 |
1387998048 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency_timeout.3013722643 |
|
|
Sep 11 02:55:50 AM UTC 24 |
Sep 11 02:56:00 AM UTC 24 |
1361861117 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency.31231369 |
|
|
Sep 11 02:55:47 AM UTC 24 |
Sep 11 02:56:01 AM UTC 24 |
1398349974 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/46.clkmgr_clk_handshake_intersig_mubi.1305168081 |
|
|
Sep 11 02:55:45 AM UTC 24 |
Sep 11 02:56:01 AM UTC 24 |
140526378 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/46.clkmgr_lc_ctrl_intersig_mubi.1402002456 |
|
|
Sep 11 02:55:45 AM UTC 24 |
Sep 11 02:56:01 AM UTC 24 |
83666536 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_div_intersig_mubi.3275232789 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:56:01 AM UTC 24 |
45468802 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/35.clkmgr_stress_all.2605827074 |
|
|
Sep 11 02:55:08 AM UTC 24 |
Sep 11 02:56:02 AM UTC 24 |
5566486068 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency_timeout.3869131648 |
|
|
Sep 11 02:55:47 AM UTC 24 |
Sep 11 02:56:03 AM UTC 24 |
1821228320 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_regwen.3490006571 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:56:04 AM UTC 24 |
843208233 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_clk_byp_req_intersig_mubi.2906458982 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:56:04 AM UTC 24 |
53874923 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_alert_test.2631867827 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:56:04 AM UTC 24 |
13314757 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_handshake_intersig_mubi.509061168 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:56:05 AM UTC 24 |
126066175 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all.2957133753 |
|
|
Sep 11 02:55:52 AM UTC 24 |
Sep 11 02:56:06 AM UTC 24 |
2821854646 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all.786761674 |
|
|
Sep 11 02:55:45 AM UTC 24 |
Sep 11 02:56:07 AM UTC 24 |
3496204426 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/40.clkmgr_stress_all_with_rand_reset.3216123445 |
|
|
Sep 11 02:55:27 AM UTC 24 |
Sep 11 02:56:08 AM UTC 24 |
3337488232 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/13.clkmgr_stress_all_with_rand_reset.2820021611 |
|
|
Sep 11 02:53:37 AM UTC 24 |
Sep 11 02:56:16 AM UTC 24 |
33742041879 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/29.clkmgr_stress_all_with_rand_reset.4017068891 |
|
|
Sep 11 02:54:30 AM UTC 24 |
Sep 11 02:56:16 AM UTC 24 |
5688966048 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/38.clkmgr_stress_all.2034245584 |
|
|
Sep 11 02:55:21 AM UTC 24 |
Sep 11 02:56:21 AM UTC 24 |
6853071621 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/35.clkmgr_stress_all_with_rand_reset.1880902298 |
|
|
Sep 11 02:55:08 AM UTC 24 |
Sep 11 02:56:22 AM UTC 24 |
7552005023 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all_with_rand_reset.960408532 |
|
|
Sep 11 02:55:41 AM UTC 24 |
Sep 11 02:56:23 AM UTC 24 |
2796181750 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all.1547600733 |
|
|
Sep 11 02:55:31 AM UTC 24 |
Sep 11 02:56:23 AM UTC 24 |
5938156525 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/39.clkmgr_stress_all.2274802672 |
|
|
Sep 11 02:55:23 AM UTC 24 |
Sep 11 02:56:25 AM UTC 24 |
10377972311 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/36.clkmgr_stress_all_with_rand_reset.1565768513 |
|
|
Sep 11 02:55:11 AM UTC 24 |
Sep 11 02:56:26 AM UTC 24 |
7926861965 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/36.clkmgr_stress_all.2377098717 |
|
|
Sep 11 02:55:11 AM UTC 24 |
Sep 11 02:56:28 AM UTC 24 |
8131503231 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all_with_rand_reset.827237038 |
|
|
Sep 11 02:55:48 AM UTC 24 |
Sep 11 02:56:35 AM UTC 24 |
5029888487 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all_with_rand_reset.3748705083 |
|
|
Sep 11 02:55:40 AM UTC 24 |
Sep 11 02:56:39 AM UTC 24 |
3994282670 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all.285166566 |
|
|
Sep 11 02:55:37 AM UTC 24 |
Sep 11 02:56:40 AM UTC 24 |
8348851808 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all_with_rand_reset.2816322548 |
|
|
Sep 11 02:55:52 AM UTC 24 |
Sep 11 02:56:46 AM UTC 24 |
4711459288 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all_with_rand_reset.4160265462 |
|
|
Sep 11 02:55:37 AM UTC 24 |
Sep 11 02:56:52 AM UTC 24 |
12603770979 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all.305166782 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:56:54 AM UTC 24 |
10278723922 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all_with_rand_reset.1582328126 |
|
|
Sep 11 02:55:45 AM UTC 24 |
Sep 11 02:56:56 AM UTC 24 |
8346817037 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all_with_rand_reset.3388684056 |
|
|
Sep 11 02:55:30 AM UTC 24 |
Sep 11 02:56:57 AM UTC 24 |
5706672982 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all_with_rand_reset.3629538187 |
|
|
Sep 11 02:55:56 AM UTC 24 |
Sep 11 02:56:58 AM UTC 24 |
6522668190 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/37.clkmgr_stress_all.690805176 |
|
|
Sep 11 02:55:17 AM UTC 24 |
Sep 11 02:57:08 AM UTC 24 |
13718156424 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/37.clkmgr_stress_all_with_rand_reset.1947373221 |
|
|
Sep 11 02:55:17 AM UTC 24 |
Sep 11 02:57:18 AM UTC 24 |
17139569690 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/25.clkmgr_stress_all_with_rand_reset.3475903290 |
|
|
Sep 11 02:54:14 AM UTC 24 |
Sep 11 02:57:20 AM UTC 24 |
23875241085 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/38.clkmgr_stress_all_with_rand_reset.3095387513 |
|
|
Sep 11 02:55:20 AM UTC 24 |
Sep 11 02:57:53 AM UTC 24 |
36835435727 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/39.clkmgr_stress_all_with_rand_reset.173388467 |
|
|
Sep 11 02:55:23 AM UTC 24 |
Sep 11 02:58:33 AM UTC 24 |
41193885117 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/default/30.clkmgr_stress_all_with_rand_reset.1010891412 |
|
|
Sep 11 02:54:34 AM UTC 24 |
Sep 11 03:00:32 AM UTC 24 |
90229527040 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.1004251151 |
|
|
Sep 11 03:36:37 AM UTC 24 |
Sep 11 03:36:40 AM UTC 24 |
109180553 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.1471038694 |
|
|
Sep 11 03:36:37 AM UTC 24 |
Sep 11 03:36:41 AM UTC 24 |
99819194 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_intg_err.750143211 |
|
|
Sep 11 03:36:39 AM UTC 24 |
Sep 11 03:36:41 AM UTC 24 |
71961164 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_errors.1075636006 |
|
|
Sep 11 03:36:39 AM UTC 24 |
Sep 11 03:36:42 AM UTC 24 |
69392548 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_intr_test.465279237 |
|
|
Sep 11 03:36:40 AM UTC 24 |
Sep 11 03:36:42 AM UTC 24 |
11265228 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.3047059288 |
|
|
Sep 11 03:36:41 AM UTC 24 |
Sep 11 03:36:43 AM UTC 24 |
25074357 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_rw.2026640263 |
|
|
Sep 11 03:36:41 AM UTC 24 |
Sep 11 03:36:44 AM UTC 24 |
21294876 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.3773399887 |
|
|
Sep 11 03:36:43 AM UTC 24 |
Sep 11 03:36:45 AM UTC 24 |
32437978 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3568415246 |
|
|
Sep 11 03:36:43 AM UTC 24 |
Sep 11 03:36:46 AM UTC 24 |
128896263 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.4031667462 |
|
|
Sep 11 03:36:43 AM UTC 24 |
Sep 11 03:36:46 AM UTC 24 |
52775149 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.1199571128 |
|
|
Sep 11 03:36:43 AM UTC 24 |
Sep 11 03:36:46 AM UTC 24 |
88155139 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_intr_test.3060774626 |
|
|
Sep 11 03:36:44 AM UTC 24 |
Sep 11 03:36:46 AM UTC 24 |
38443404 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.1347914000 |
|
|
Sep 11 03:36:44 AM UTC 24 |
Sep 11 03:36:46 AM UTC 24 |
22110955 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1339932396 |
|
|
Sep 11 03:36:43 AM UTC 24 |
Sep 11 03:36:47 AM UTC 24 |
250806231 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_rw.3908670709 |
|
|
Sep 11 03:36:45 AM UTC 24 |
Sep 11 03:36:48 AM UTC 24 |
47542443 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_intg_err.3819502464 |
|
|
Sep 11 03:36:44 AM UTC 24 |
Sep 11 03:36:48 AM UTC 24 |
123925032 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.129720504 |
|
|
Sep 11 03:36:41 AM UTC 24 |
Sep 11 03:36:48 AM UTC 24 |
714797743 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_errors.83135132 |
|
|
Sep 11 03:36:44 AM UTC 24 |
Sep 11 03:36:48 AM UTC 24 |
143882684 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_aliasing.3529021756 |
|
|
Sep 11 03:36:45 AM UTC 24 |
Sep 11 03:36:49 AM UTC 24 |
122421688 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.3817871775 |
|
|
Sep 11 03:36:46 AM UTC 24 |
Sep 11 03:36:49 AM UTC 24 |
75358023 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3648380604 |
|
|
Sep 11 03:36:46 AM UTC 24 |
Sep 11 03:36:49 AM UTC 24 |
304053388 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.1170292540 |
|
|
Sep 11 03:36:47 AM UTC 24 |
Sep 11 03:36:49 AM UTC 24 |
85745599 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.170579288 |
|
|
Sep 11 03:36:48 AM UTC 24 |
Sep 11 03:36:50 AM UTC 24 |
16039505 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_intr_test.3130351151 |
|
|
Sep 11 03:36:48 AM UTC 24 |
Sep 11 03:36:50 AM UTC 24 |
15405305 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_intg_err.3252337760 |
|
|
Sep 11 03:36:48 AM UTC 24 |
Sep 11 03:36:50 AM UTC 24 |
73531076 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.1782341818 |
|
|
Sep 11 03:36:47 AM UTC 24 |
Sep 11 03:36:51 AM UTC 24 |
136157813 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_errors.494999029 |
|
|
Sep 11 03:36:47 AM UTC 24 |
Sep 11 03:36:51 AM UTC 24 |
95927383 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.4105739170 |
|
|
Sep 11 03:36:45 AM UTC 24 |
Sep 11 03:36:51 AM UTC 24 |
237811948 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.629250275 |
|
|
Sep 11 03:36:49 AM UTC 24 |
Sep 11 03:36:51 AM UTC 24 |
83009984 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.4089723515 |
|
|
Sep 11 03:36:49 AM UTC 24 |
Sep 11 03:36:52 AM UTC 24 |
56531730 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_rw.1515775418 |
|
|
Sep 11 03:36:49 AM UTC 24 |
Sep 11 03:36:52 AM UTC 24 |
114954267 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_aliasing.2034214907 |
|
|
Sep 11 03:36:49 AM UTC 24 |
Sep 11 03:36:52 AM UTC 24 |
72484754 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.2973820271 |
|
|
Sep 11 03:36:49 AM UTC 24 |
Sep 11 03:36:53 AM UTC 24 |
203472970 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_intr_test.556635434 |
|
|
Sep 11 03:36:51 AM UTC 24 |
Sep 11 03:36:53 AM UTC 24 |
12620038 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_rw.4190588634 |
|
|
Sep 11 03:36:51 AM UTC 24 |
Sep 11 03:36:53 AM UTC 24 |
18619512 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1135728670 |
|
|
Sep 11 03:36:51 AM UTC 24 |
Sep 11 03:36:53 AM UTC 24 |
40715873 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.3236262052 |
|
|
Sep 11 03:36:49 AM UTC 24 |
Sep 11 03:36:53 AM UTC 24 |
133782074 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.3971646263 |
|
|
Sep 11 03:36:49 AM UTC 24 |
Sep 11 03:36:54 AM UTC 24 |
135994400 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_intr_test.1311510328 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:01 AM UTC 24 |
34525645 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_errors.421650835 |
|
|
Sep 11 03:36:51 AM UTC 24 |
Sep 11 03:36:54 AM UTC 24 |
140677990 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_aliasing.3945523564 |
|
|
Sep 11 03:36:52 AM UTC 24 |
Sep 11 03:36:54 AM UTC 24 |
55142948 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_intg_err.532472447 |
|
|
Sep 11 03:36:51 AM UTC 24 |
Sep 11 03:36:55 AM UTC 24 |
299442154 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.2211938900 |
|
|
Sep 11 03:36:52 AM UTC 24 |
Sep 11 03:36:55 AM UTC 24 |
75093012 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.2041945213 |
|
|
Sep 11 03:36:52 AM UTC 24 |
Sep 11 03:36:56 AM UTC 24 |
68450101 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.3636665886 |
|
|
Sep 11 03:36:53 AM UTC 24 |
Sep 11 03:36:56 AM UTC 24 |
157853091 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_intr_test.963176486 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:36:56 AM UTC 24 |
13787100 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_intg_err.4251293075 |
|
|
Sep 11 03:36:53 AM UTC 24 |
Sep 11 03:36:56 AM UTC 24 |
179060450 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.4067962148 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:36:56 AM UTC 24 |
35433099 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_rw.43816685 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:36:56 AM UTC 24 |
56615022 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.424226927 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:36:57 AM UTC 24 |
82095593 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.1707526971 |
|
|
Sep 11 03:36:52 AM UTC 24 |
Sep 11 03:36:57 AM UTC 24 |
680042716 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.145478170 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:36:57 AM UTC 24 |
158505213 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.1511538126 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:36:58 AM UTC 24 |
29945122 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_intr_test.1023307725 |
|
|
Sep 11 03:36:56 AM UTC 24 |
Sep 11 03:36:58 AM UTC 24 |
12206042 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_rw.3714503781 |
|
|
Sep 11 03:36:56 AM UTC 24 |
Sep 11 03:36:58 AM UTC 24 |
21807907 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_aliasing.3935651948 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:36:58 AM UTC 24 |
252447518 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_errors.1375043224 |
|
|
Sep 11 03:36:56 AM UTC 24 |
Sep 11 03:36:59 AM UTC 24 |
103650072 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_rw.1032482206 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:02 AM UTC 24 |
51568724 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_intg_err.764474811 |
|
|
Sep 11 03:36:56 AM UTC 24 |
Sep 11 03:36:59 AM UTC 24 |
215744288 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.1700146419 |
|
|
Sep 11 03:36:57 AM UTC 24 |
Sep 11 03:36:59 AM UTC 24 |
30381309 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_intr_test.2264149571 |
|
|
Sep 11 03:36:58 AM UTC 24 |
Sep 11 03:37:00 AM UTC 24 |
16837178 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_errors.2783181319 |
|
|
Sep 11 03:36:53 AM UTC 24 |
Sep 11 03:37:00 AM UTC 24 |
870709897 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.405123955 |
|
|
Sep 11 03:36:57 AM UTC 24 |
Sep 11 03:37:00 AM UTC 24 |
37180604 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.3017019745 |
|
|
Sep 11 03:36:54 AM UTC 24 |
Sep 11 03:37:01 AM UTC 24 |
472300093 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_intg_err.249708508 |
|
|
Sep 11 03:36:58 AM UTC 24 |
Sep 11 03:37:01 AM UTC 24 |
141576813 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.2965938282 |
|
|
Sep 11 03:36:56 AM UTC 24 |
Sep 11 03:37:01 AM UTC 24 |
248564796 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.1408527588 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:01 AM UTC 24 |
22610154 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_errors.1397795558 |
|
|
Sep 11 03:36:58 AM UTC 24 |
Sep 11 03:37:02 AM UTC 24 |
40118264 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.1029013412 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:02 AM UTC 24 |
143037984 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.120198817 |
|
|
Sep 11 03:36:58 AM UTC 24 |
Sep 11 03:37:02 AM UTC 24 |
406765138 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.747256135 |
|
|
Sep 11 03:36:57 AM UTC 24 |
Sep 11 03:37:02 AM UTC 24 |
328226839 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.972991780 |
|
|
Sep 11 03:36:51 AM UTC 24 |
Sep 11 03:37:03 AM UTC 24 |
972409670 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_rw.1665702759 |
|
|
Sep 11 03:37:01 AM UTC 24 |
Sep 11 03:37:03 AM UTC 24 |
21599884 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_errors.1177139323 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:03 AM UTC 24 |
39797589 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.1916878103 |
|
|
Sep 11 03:37:01 AM UTC 24 |
Sep 11 03:37:03 AM UTC 24 |
94134188 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.4155326680 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:03 AM UTC 24 |
161244741 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.3053400506 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:03 AM UTC 24 |
452319685 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1663541580 |
|
|
Sep 11 03:36:59 AM UTC 24 |
Sep 11 03:37:04 AM UTC 24 |
472026691 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.599388847 |
|
|
Sep 11 03:37:01 AM UTC 24 |
Sep 11 03:37:04 AM UTC 24 |
89527784 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.2201847903 |
|
|
Sep 11 03:37:01 AM UTC 24 |
Sep 11 03:37:04 AM UTC 24 |
196972851 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_errors.1238460123 |
|
|
Sep 11 03:37:01 AM UTC 24 |
Sep 11 03:37:04 AM UTC 24 |
359870576 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_intr_test.3092226858 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:04 AM UTC 24 |
34039369 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_intr_test.1898682810 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
32534419 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_rw.1669414543 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:05 AM UTC 24 |
25707732 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_rw.3122841224 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:05 AM UTC 24 |
16386708 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.1620009227 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:05 AM UTC 24 |
31324876 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_intr_test.3186388170 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:05 AM UTC 24 |
16882663 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.877494475 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:05 AM UTC 24 |
65950411 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.1368188329 |
|
|
Sep 11 03:37:01 AM UTC 24 |
Sep 11 03:37:05 AM UTC 24 |
585593260 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_intg_err.3016398315 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:05 AM UTC 24 |
55727201 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.639915999 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:06 AM UTC 24 |
68404272 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_intg_err.2449156641 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:06 AM UTC 24 |
125191150 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_errors.1718571626 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:06 AM UTC 24 |
106027054 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.1962564762 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:06 AM UTC 24 |
119163851 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.1967166993 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:06 AM UTC 24 |
38599908 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.1777237221 |
|
|
Sep 11 03:37:03 AM UTC 24 |
Sep 11 03:37:07 AM UTC 24 |
306872278 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_intr_test.3148420043 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:07 AM UTC 24 |
30270076 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_rw.1894009770 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
48958714 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_intr_test.2818129113 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
19545459 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2248477507 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
25037925 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.2941783419 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
70324850 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_rw.650020871 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
47615011 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.1983895289 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
61987208 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.884248235 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
56040898 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.328756588 |
|
|
Sep 11 03:37:05 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
203169221 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.1581485489 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:08 AM UTC 24 |
82540863 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.748734957 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:09 AM UTC 24 |
220263684 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.211367763 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:09 AM UTC 24 |
27752505 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.776500422 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:09 AM UTC 24 |
77876073 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2207352564 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:09 AM UTC 24 |
219002633 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_errors.2692629404 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:09 AM UTC 24 |
41695302 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_errors.2608761315 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:09 AM UTC 24 |
126675761 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2629925092 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:10 AM UTC 24 |
108824101 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_intg_err.2177016743 |
|
|
Sep 11 03:37:06 AM UTC 24 |
Sep 11 03:37:10 AM UTC 24 |
638870165 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_intr_test.1973011830 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
14324883 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_rw.64003113 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
57459067 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_intr_test.2489384365 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
12280081 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.2796465394 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
27763599 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.307391036 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
30588870 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_rw.100240625 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
22034280 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_rw.1263278338 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
16866816 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.4215760658 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
70603778 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_intr_test.603611134 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:12 AM UTC 24 |
33777752 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.3818880501 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:13 AM UTC 24 |
165567505 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.1784048628 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:13 AM UTC 24 |
164354777 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2593441698 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:13 AM UTC 24 |
124802855 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.2515564702 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:13 AM UTC 24 |
82023480 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_errors.3461289243 |
|
|
Sep 11 03:37:09 AM UTC 24 |
Sep 11 03:37:13 AM UTC 24 |
367812019 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2316649810 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:13 AM UTC 24 |
319633370 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_intg_err.320561149 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:13 AM UTC 24 |
169224211 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.2322832850 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:14 AM UTC 24 |
53885877 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_intg_err.4079718223 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:14 AM UTC 24 |
148186826 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.2355498681 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:14 AM UTC 24 |
351316968 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_errors.2797222799 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:14 AM UTC 24 |
207530563 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_intr_test.1875260018 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
58412465 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_errors.3560368978 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
425754893 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_rw.2961476235 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
14568662 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.3384554169 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
70324295 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.1197296154 |
|
|
Sep 11 03:37:12 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
36373327 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.4168664411 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
94652765 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.3227104668 |
|
|
Sep 11 03:37:12 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
235842004 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3551282294 |
|
|
Sep 11 03:37:12 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
137145663 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.1756376323 |
|
|
Sep 11 03:37:10 AM UTC 24 |
Sep 11 03:37:15 AM UTC 24 |
554680904 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.2966738355 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:16 AM UTC 24 |
66912553 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_errors.2613304500 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:16 AM UTC 24 |
53658393 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_errors.3537963642 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:16 AM UTC 24 |
37824932 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.2011865107 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:16 AM UTC 24 |
94894848 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_intg_err.781056367 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:16 AM UTC 24 |
214739732 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_intg_err.1550340559 |
|
|
Sep 11 03:37:13 AM UTC 24 |
Sep 11 03:37:17 AM UTC 24 |
362222258 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_intr_test.774554227 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:20 AM UTC 24 |
22086967 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_rw.3087129823 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:20 AM UTC 24 |
72883689 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.1872753857 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:20 AM UTC 24 |
18292886 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_intr_test.3569561052 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:20 AM UTC 24 |
28041359 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_rw.3327061418 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
36160521 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.1693793474 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
50323505 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.3174442127 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
29677873 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_rw.2157459164 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
18163775 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_intr_test.51927171 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
27573974 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/20.clkmgr_intr_test.1337028368 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
27880404 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/21.clkmgr_intr_test.1365995994 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
12544486 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2236484360 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
20779641 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.1566276906 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
59945726 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_rw.1052768255 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
88918817 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/22.clkmgr_intr_test.977183365 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
38307487 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.3179766408 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
55268830 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_intg_err.3388568179 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:21 AM UTC 24 |
131762287 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_intg_err.3813697546 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
137396158 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.1706110679 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
263900939 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.80402354 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
73861330 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_intg_err.3409692527 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
142389599 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.2722573231 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
247572801 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.3380238834 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
137272755 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.3787746753 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
126044867 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_errors.2733009945 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
109943884 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.3768773537 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
256060103 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.3251750904 |
|
|
Sep 11 03:37:19 AM UTC 24 |
Sep 11 03:37:22 AM UTC 24 |
145827776 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_errors.4121932921 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:23 AM UTC 24 |
188307948 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_errors.603919960 |
|
|
Sep 11 03:37:18 AM UTC 24 |
Sep 11 03:37:23 AM UTC 24 |
162793424 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/27.clkmgr_intr_test.2172259597 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
27792407 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/23.clkmgr_intr_test.1370587867 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
18929179 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/24.clkmgr_intr_test.211080071 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
25247554 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/25.clkmgr_intr_test.1036534857 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
27166196 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/29.clkmgr_intr_test.3650880602 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
16946284 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/26.clkmgr_intr_test.3139299437 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
54892606 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/30.clkmgr_intr_test.1050951798 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
33242204 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/33.clkmgr_intr_test.48064605 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
13070433 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/37.clkmgr_intr_test.1059998250 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
16537157 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/41.clkmgr_intr_test.1525954287 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
13761172 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/28.clkmgr_intr_test.3408364184 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
28552346 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/31.clkmgr_intr_test.2336770834 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
33580327 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/32.clkmgr_intr_test.692876584 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
19169964 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/35.clkmgr_intr_test.3005082870 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
15667901 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/38.clkmgr_intr_test.3850400677 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
11487326 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/36.clkmgr_intr_test.1960897924 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
27836635 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/34.clkmgr_intr_test.209486571 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
25539727 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/39.clkmgr_intr_test.4017394979 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
12106586 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_09_10/clkmgr-sim-vcs/coverage/cover_reg_top/44.clkmgr_intr_test.1876836898 |
|
|
Sep 11 03:37:25 AM UTC 24 |
Sep 11 03:37:27 AM UTC 24 |
17574447 ps |