CLKMGR Lint Results
Thursday June 13 2024 19:02:12 UTC
Branch: os_regression
Tool: ASCENTLINT
| Build Mode |
Flow Infos |
Flow Warnings |
Flow Errors |
Lint Infos |
Lint Warnings |
Lint Errors |
| default |
0 |
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209 |
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Messages for Build Mode 'default'
Lint Infos
I FSM_DEFAULT_REQ: prim_sync_reqack.sv:253 Next state register 'gen_nrz_hs_protocol.src_fsm_ns' has no assignment in the default branch of the case statement for this finite state machine New
I FSM_DEFAULT_REQ: prim_sync_reqack.sv:297 Next state register 'gen_nrz_hs_protocol.dst_fsm_ns' has no assignment in the default branch of the case statement for this finite state machine New
I FSM_DEFAULT_REQ: prim_diff_decode.sv:158 Next state register 'gen_async.state_d' has no assignment in the default branch of the case statement for this finite state machine New
I FSM_DEFAULT_REQ: prim_clock_meas.sv:132 Next state register 'state_d' has no assignment in the default branch of the case statement for this finite state machine New
I NESTED_SUBPROG: prim_mubi_pkg.sv:132 Function 'mubi4_and' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:143 Function 'prim_mubi_pkg::mubi4_test_invalid' is called from within a function New
I CASE_INC: prim_alert_sender.sv:199 Case statement tag not specified for value 'b111 New
I CASE_INC: prim_diff_decode.sv:115 Case statement tag not specified for value 'b11 New
I CASE_INC: prim_reg_cdc_arb.sv:197 Case statement tag not specified for value 'b10 and 1 other value New
I CASE_INC: tlul_err.sv:62 Case statement tag not specified for value 'h3 New
I ONE_BIT_VEC: clkmgr.sv:171 Declaration range '[0:0]' of 'io_div2_div_scanmode' has a length of one New
I ONE_BIT_VEC: clkmgr.sv:195 Declaration range '[0:0]' of 'io_div4_div_scanmode' has a length of one New
I ONE_BIT_VEC: clkmgr.sv:425 Declaration range '[0:0]' of 'main_ens' has a length of one New
I ONE_BIT_VEC: clkmgr.sv:499 Declaration range '[0:0]' of 'usb_ens' has a length of one New
I ONE_BIT_VEC: clkmgr.sv:807 Declaration range '[0:0]' of 'clk_io_div4_peri_scanmode' has a length of one New
I ONE_BIT_VEC: clkmgr.sv:849 Declaration range '[0:0]' of 'clk_io_div2_peri_scanmode' has a length of one New
I ONE_BIT_VEC: clkmgr.sv:891 Declaration range '[0:0]' of 'clk_io_peri_scanmode' has a length of one New
I ONE_BIT_VEC: clkmgr.sv:933 Declaration range '[0:0]' of 'clk_usb_peri_scanmode' has a length of one New
I ONE_BIT_VEC: clkmgr_clk_status.sv:13 Declaration range '[NumClocks - 1:0]' ([0:0]) of 'ens_i' has a length of one, instance 'clkmgr.u_main_status' of module 'clkmgr_clk_status' (NumClocks=1) New
I ONE_BIT_VEC: clkmgr_clk_status.sv:20 Declaration range '[NumClocks - 1:0]' ([0:0]) of 'ens_sync' has a length of one, instance 'clkmgr.u_main_status' of module 'clkmgr_clk_status' (NumClocks=1) New
I ONE_BIT_VEC: clkmgr_trans.sv:59 Declaration range '[0:0]' of 'idle' has a length of one New
I ONE_BIT_VEC: clkmgr_trans.sv:92 Declaration range '[0:0]' of 'scanmode' has a length of one New
I ONE_BIT_VEC: clkmgr_reg_top.sv:1252 Declaration range '[0:0]' of 'io_meas_ctrl_en_flds_we' has a length of one New
I ONE_BIT_VEC: clkmgr_reg_top.sv:1409 Declaration range '[0:0]' of 'io_div2_meas_ctrl_en_flds_we' has a length of one New
I ONE_BIT_VEC: clkmgr_reg_top.sv:1567 Declaration range '[0:0]' of 'io_div4_meas_ctrl_en_flds_we' has a length of one New
I ONE_BIT_VEC: clkmgr_reg_top.sv:1725 Declaration range '[0:0]' of 'main_meas_ctrl_en_flds_we' has a length of one New
I ONE_BIT_VEC: clkmgr_reg_top.sv:1883 Declaration range '[0:0]' of 'usb_meas_ctrl_en_flds_we' has a length of one New
I ONE_BIT_VEC: prim_buf.sv:24 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'clkmgr.u_io_step_down_req_sync.gen_buffs[0].gen_bits[0].u_prim_buf' of module 'prim_buf' (Width=1) New
I ONE_BIT_VEC: prim_buf.sv:25 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'clkmgr.u_io_step_down_req_sync.gen_buffs[0].gen_bits[0].u_prim_buf' of module 'prim_buf' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:22 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'clkmgr.u_no_scan_io_div2_div.gen_generic.u_impl_generic.gen_div2.u_div2' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:27 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'clkmgr.u_no_scan_io_div2_div.gen_generic.u_impl_generic.gen_div2.u_div2' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:28 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'clkmgr.u_no_scan_io_div2_div.gen_generic.u_impl_generic.gen_div2.u_div2' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:19 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:25 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:26 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'clkmgr.u_io_meas.u_timeout_err_sync' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:21 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'clkmgr.u_io_meas.u_timeout_err_sync' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:22 Declaration range '[Width - 1:0]' ([0:0]) of 'q_sync_o' has a length of one, instance 'clkmgr.u_io_meas.u_timeout_err_sync' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:24 Declaration range '[Width - 1:0]' ([0:0]) of 'q_posedge_pulse_o' has a length of one, instance 'clkmgr.u_io_meas.u_timeout_err_sync' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:25 Declaration range '[Width - 1:0]' ([0:0]) of 'q_negedge_pulse_o' has a length of one, instance 'clkmgr.u_io_meas.u_timeout_err_sync' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:28 Declaration range '[Width - 1:0]' ([0:0]) of 'q_sync_d' has a length of one, instance 'clkmgr.u_io_meas.u_timeout_err_sync' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'clkmgr.u_io_step_down_req_sync.gen_buffs[0].gen_bits[0].u_prim_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:11 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'clkmgr.u_io_step_down_req_sync.gen_buffs[0].gen_bits[0].u_prim_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'inv' has a length of one, instance 'clkmgr.u_io_step_down_req_sync.gen_buffs[0].gen_bits[0].u_prim_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_clock_div.sv:78 Declaration range '[gen_div.CntWidth - 1:0]' ([0:0]) of 'gen_div.cnt' has a length of one, instance 'clkmgr.u_no_scan_io_div4_div.gen_generic.u_impl_generic' of module 'prim_generic_clock_div' (Divisor=4,gen_div.CntWidth=1 ('$clog2(gen_div.ToggleCnt)'),gen_div.ToggleCnt=2 ('Divisor / 2')) New
I ONE_BIT_VEC: prim_generic_clock_div.sv:79 Declaration range '[gen_div.CntWidth - 1:0]' ([0:0]) of 'gen_div.limit' has a length of one, instance 'clkmgr.u_no_scan_io_div4_div.gen_generic.u_impl_generic' of module 'prim_generic_clock_div' (Divisor=4,gen_div.CntWidth=1 ('$clog2(gen_div.ToggleCnt)'),gen_div.ToggleCnt=2 ('Divisor / 2')) New
I ONE_BIT_VEC: prim_generic_flop.sv:9 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'clkmgr.u_no_scan_io_div2_div.gen_generic.u_impl_generic.gen_div2.u_div2.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:13 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'clkmgr.u_no_scan_io_div2_div.gen_generic.u_impl_generic.gen_div2.u_div2.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'clkmgr.u_no_scan_io_div2_div.gen_generic.u_impl_generic.gen_div2.u_div2.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:9 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:15 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:18 Declaration range '[Width - 1:0]' ([0:0]) of 'd_o' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:19 Declaration range '[Width - 1:0]' ([0:0]) of 'intq' has a length of one, instance 'clkmgr.u_reg.u_io_meas_ctrl_en_cdc.u_src_to_dst_req.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_lc_sync.sv:30 Declaration range '[NumCopies - 1:0]' ([0:0]) of 'lc_en_o' has a length of one, instance 'clkmgr.u_clkmgr_byp.u_en_sync' of module 'prim_lc_sync' (NumCopies=1) New
I ONE_BIT_VEC: prim_mubi4_sync.sv:38 Declaration range '[NumCopies - 1:0]' ([0:0]) of 'mubi_o' has a length of one, instance 'clkmgr.u_io_step_down_req_sync' of module 'prim_mubi4_sync' (NumCopies=1) New
I ONE_BIT_VEC: prim_sec_anchor_buf.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'clkmgr.u_clkmgr_byp.u_en_sync.gen_buffs[0].gen_bits[0].u_prim_buf' of module 'prim_sec_anchor_buf' (Width=1) New
I ONE_BIT_VEC: prim_sec_anchor_buf.sv:11 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'clkmgr.u_clkmgr_byp.u_en_sync.gen_buffs[0].gen_bits[0].u_prim_buf' of module 'prim_sec_anchor_buf' (Width=1) New
I ONE_BIT_VEC: prim_subreg.sv:12 Declaration range '[DW - 1:0]' ([0:0]) of 'RESVAL' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:25 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:29 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:34 Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:35 Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:39 Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:17 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:24 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:28 Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'clkmgr.u_reg.u_extclk_ctrl_regwen.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:36 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_w.unused_q' has a length of one, instance 'clkmgr.u_reg.u_clk_enables_clk_io_div4_peri_en.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:47 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_wd' has a length of one, instance 'clkmgr.u_reg.u_clk_hints_status_clk_main_aes_val.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:48 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_q' has a length of one, instance 'clkmgr.u_reg.u_clk_hints_status_clk_main_aes_val.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:12 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'clkmgr.u_reg.u_alert_test_recov_fault' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:14 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'clkmgr.u_reg.u_alert_test_recov_fault' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:19 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'clkmgr.u_reg.u_alert_test_recov_fault' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:20 Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'clkmgr.u_reg.u_alert_test_recov_fault' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'clkmgr.u_reg.u_alert_test_recov_fault' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'd_sink' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d2h_t' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_pre' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_reg_d2h' has a length of one New
I EXPLICIT_BITLEN: prim_generic_clock_div.sv:81 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_generic_clock_div.sv:82 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_generic_clock_div.sv:82 Bit length not specified for constant '2' New
I EXPLICIT_BITLEN: prim_clock_meas.sv:166 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_util_pkg.sv:85 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_err.sv:69 Bit length not specified for constant "'h1" New
I EXPLICIT_BITLEN: tlul_err.sv:77 Bit length not specified for constant "'h2" New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:24 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:28 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:35 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:38 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:43 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:48 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:51 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:54 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:57 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:63 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:66 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:69 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:72 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:77 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:81 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:86 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:89 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:94 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:99 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:102 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:107 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:112 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:115 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:120 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:125 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:128 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:133 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:138 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:141 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:147 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:150 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:153 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:158 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:163 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:167 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:171 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:175 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:181 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:186 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:191 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:196 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:201 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:206 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:212 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:216 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:220 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:224 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:228 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:232 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:236 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:240 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:244 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:248 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:252 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:259 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:263 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: clkmgr_reg_pkg.sv:267 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:80 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:80 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:85 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:106 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:106 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:111 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:124 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:124 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:131 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:131 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:212 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:212 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:217 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:238 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:238 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:243 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:256 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:256 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:263 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:263 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:344 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:344 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:349 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:370 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:370 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:375 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:388 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:388 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:395 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:395 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:476 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:476 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:481 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:502 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:502 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:507 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:520 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:520 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:527 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:527 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg.sv:25 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg.sv:29 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_arb.sv:21 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_arb.sv:24 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_ext.sv:14 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_ext.sv:19 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_shadow.sv:30 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_shadow.sv:34 Name 'q' is shorter than minimum length 2 New
I CONST_OUTPUT: clkmgr.sv:345 Output 'cg_en_o.io_div4_powerup' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:352 Output 'cg_en_o.aon_powerup' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:359 Output 'cg_en_o.main_powerup' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:366 Output 'cg_en_o.io_powerup' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:373 Output 'cg_en_o.usb_powerup' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:380 Output 'cg_en_o.io_div2_powerup' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:387 Output 'cg_en_o.aon_secure' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:394 Output 'cg_en_o.aon_peri' is driven by constant 4'b1001 New
I CONST_OUTPUT: clkmgr.sv:401 Output 'cg_en_o.aon_timers' is driven by constant 4'b1001 New
I CONST_OUTPUT: prim_clock_meas.sv:240 Output 'timeout_clk_ref_o' is driven by constant zero in module 'prim_clock_meas' (Cnt=960,RefTimeOutChkEn=1'h0) New
I CONST_OUTPUT: prim_reg_cdc_arb.sv:287 Output 'src_update_o' is driven by constant zero in module 'prim_reg_cdc_arb' (DataWidth=20,ResetVal=20'h759ea) New
I CONST_OUTPUT: tlul_adapter_reg.sv:91 Output 'addr_o[1:0]' is driven by constant zeros in module 'tlul_adapter_reg' (RegAw=7) New
I CONST_OUTPUT: tlul_adapter_reg.sv:195 Output 'intg_error_o' is driven by constant zero in module 'tlul_adapter_reg' (RegAw=7) New
Lint Warnings
W STAR_PORT_CONN_USE: prim_flop_2sync.sv:35 '.*' wild card port connection encountered on instance 'gen_generic.u_impl_generic' New
Lint Errors
E IFDEF_CODE: prim_generic_flop_2sync.sv:35 Assignment to 'unused_sig' contained within `else block at prim_generic_flop_2sync.sv:33 prim_generic_flop_2sync.sv:33 New
Past Results