Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_env_0.1/flash_ctrl_env_cov.sv



Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 5 0 5 100.00
Crosses 6 0 6 100.00


Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
instr_type_cp 3 0 3 100.00 100 1 1 0
key_cp 2 0 2 100.00 100 1 1 2


Crosses for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
key_instr_cross 6 0 6 100.00 100 1 1 0


Summary for Variable instr_type_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for instr_type_cp

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
others 4697 1 T57 160 T11 1 T58 168
instr_types[0] 5662 1 T57 292 T58 351 T59 220
instr_types[1] 4253573 1 T3 11 T7 17366 T8 16993



Summary for Variable key_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for key_cp

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4261991 1 T3 11 T7 17366 T8 16993
auto[1] 1941 1 T57 194 T58 260 T59 218



Summary for Cross key_instr_cross

Samples crossed: key_cp instr_type_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 6 0 6 100.00


Automatically Generated Cross Bins for key_instr_cross

Bins
key_cpinstr_type_cpCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] others 4261 1 T57 93 T11 1 T58 120
auto[0] instr_types[0] 4745 1 T57 200 T58 222 T59 134
auto[0] instr_types[1] 4252985 1 T3 11 T7 17366 T8 16993
auto[1] others 436 1 T57 67 T58 48 T59 72
auto[1] instr_types[0] 917 1 T57 92 T58 129 T59 86
auto[1] instr_types[1] 588 1 T57 35 T58 83 T59 60

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%