Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
4261 |
1 |
|
T22 |
64 |
|
T45 |
91 |
|
T46 |
143 |
instr_types[0] |
5906 |
1 |
|
T22 |
185 |
|
T45 |
276 |
|
T46 |
326 |
instr_types[1] |
4108163 |
1 |
|
T2 |
8 |
|
T4 |
41589 |
|
T5 |
34 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for key_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4116384 |
1 |
|
T2 |
8 |
|
T4 |
41589 |
|
T5 |
34 |
auto[1] |
1946 |
1 |
|
T22 |
174 |
|
T45 |
208 |
|
T46 |
233 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for key_instr_cross
Bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
3943 |
1 |
|
T22 |
38 |
|
T45 |
68 |
|
T46 |
107 |
auto[0] |
instr_types[0] |
4950 |
1 |
|
T22 |
102 |
|
T45 |
213 |
|
T46 |
195 |
auto[0] |
instr_types[1] |
4107491 |
1 |
|
T2 |
8 |
|
T4 |
41589 |
|
T5 |
34 |
auto[1] |
others |
318 |
1 |
|
T22 |
26 |
|
T45 |
23 |
|
T46 |
36 |
auto[1] |
instr_types[0] |
956 |
1 |
|
T22 |
83 |
|
T45 |
63 |
|
T46 |
131 |
auto[1] |
instr_types[1] |
672 |
1 |
|
T22 |
65 |
|
T45 |
122 |
|
T46 |
66 |