Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
5256 |
1 |
|
T51 |
74 |
|
T52 |
170 |
|
T53 |
163 |
instr_types[0] |
6437 |
1 |
|
T51 |
210 |
|
T52 |
278 |
|
T53 |
277 |
instr_types[1] |
4176556 |
1 |
|
T3 |
22 |
|
T4 |
9 |
|
T5 |
40593 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for key_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4186222 |
1 |
|
T3 |
22 |
|
T4 |
9 |
|
T5 |
40593 |
auto[1] |
2027 |
1 |
|
T51 |
133 |
|
T52 |
225 |
|
T53 |
246 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for key_instr_cross
Bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4904 |
1 |
|
T51 |
53 |
|
T52 |
95 |
|
T53 |
151 |
auto[0] |
instr_types[0] |
5585 |
1 |
|
T51 |
137 |
|
T52 |
230 |
|
T53 |
142 |
auto[0] |
instr_types[1] |
4175733 |
1 |
|
T3 |
22 |
|
T4 |
9 |
|
T5 |
40593 |
auto[1] |
others |
352 |
1 |
|
T51 |
21 |
|
T52 |
75 |
|
T53 |
12 |
auto[1] |
instr_types[0] |
852 |
1 |
|
T51 |
73 |
|
T52 |
48 |
|
T53 |
135 |
auto[1] |
instr_types[1] |
823 |
1 |
|
T51 |
39 |
|
T52 |
102 |
|
T53 |
99 |