Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
4940 |
1 |
|
T51 |
95 |
|
T52 |
90 |
|
T53 |
100 |
instr_types[0] |
5857 |
1 |
|
T51 |
157 |
|
T52 |
125 |
|
T53 |
235 |
instr_types[1] |
4381873 |
1 |
|
T3 |
90 |
|
T21 |
568 |
|
T5 |
41473 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for key_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4390922 |
1 |
|
T3 |
90 |
|
T21 |
568 |
|
T5 |
41473 |
auto[1] |
1748 |
1 |
|
T51 |
100 |
|
T52 |
152 |
|
T53 |
232 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for key_instr_cross
Bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4537 |
1 |
|
T51 |
84 |
|
T52 |
42 |
|
T53 |
64 |
auto[0] |
instr_types[0] |
5166 |
1 |
|
T51 |
116 |
|
T52 |
100 |
|
T53 |
158 |
auto[0] |
instr_types[1] |
4381219 |
1 |
|
T3 |
90 |
|
T21 |
568 |
|
T5 |
41473 |
auto[1] |
others |
403 |
1 |
|
T51 |
11 |
|
T52 |
48 |
|
T53 |
36 |
auto[1] |
instr_types[0] |
691 |
1 |
|
T51 |
41 |
|
T52 |
25 |
|
T53 |
77 |
auto[1] |
instr_types[1] |
654 |
1 |
|
T51 |
48 |
|
T52 |
79 |
|
T53 |
119 |