Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
4878 |
1 |
|
T21 |
107 |
|
T60 |
82 |
|
T61 |
120 |
instr_types[0] |
5925 |
1 |
|
T21 |
217 |
|
T60 |
233 |
|
T61 |
204 |
instr_types[1] |
4251198 |
1 |
|
T1 |
41562 |
|
T5 |
24 |
|
T12 |
9 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for key_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4259955 |
1 |
|
T1 |
41562 |
|
T5 |
24 |
|
T12 |
9 |
auto[1] |
2046 |
1 |
|
T21 |
226 |
|
T60 |
144 |
|
T61 |
169 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for key_instr_cross
Bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4474 |
1 |
|
T21 |
48 |
|
T60 |
82 |
|
T61 |
109 |
auto[0] |
instr_types[0] |
5187 |
1 |
|
T21 |
152 |
|
T60 |
169 |
|
T61 |
136 |
auto[0] |
instr_types[1] |
4250294 |
1 |
|
T1 |
41562 |
|
T5 |
24 |
|
T12 |
9 |
auto[1] |
others |
404 |
1 |
|
T21 |
59 |
|
T61 |
11 |
|
T62 |
95 |
auto[1] |
instr_types[0] |
738 |
1 |
|
T21 |
65 |
|
T60 |
64 |
|
T61 |
68 |
auto[1] |
instr_types[1] |
904 |
1 |
|
T21 |
102 |
|
T60 |
80 |
|
T61 |
90 |