Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
5080 |
1 |
|
T51 |
131 |
|
T46 |
146 |
|
T61 |
130 |
instr_types[0] |
6372 |
1 |
|
T51 |
223 |
|
T46 |
262 |
|
T61 |
326 |
instr_types[1] |
4236880 |
1 |
|
T4 |
245 |
|
T5 |
41120 |
|
T6 |
10 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for key_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4245836 |
1 |
|
T4 |
245 |
|
T5 |
41120 |
|
T6 |
10 |
auto[1] |
2496 |
1 |
|
T51 |
199 |
|
T46 |
272 |
|
T61 |
301 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for key_instr_cross
Bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4604 |
1 |
|
T51 |
65 |
|
T46 |
83 |
|
T61 |
94 |
auto[0] |
instr_types[0] |
5479 |
1 |
|
T51 |
122 |
|
T46 |
173 |
|
T61 |
235 |
auto[0] |
instr_types[1] |
4235753 |
1 |
|
T4 |
245 |
|
T5 |
41120 |
|
T6 |
10 |
auto[1] |
others |
476 |
1 |
|
T51 |
66 |
|
T46 |
63 |
|
T61 |
36 |
auto[1] |
instr_types[0] |
893 |
1 |
|
T51 |
101 |
|
T46 |
89 |
|
T61 |
91 |
auto[1] |
instr_types[1] |
1127 |
1 |
|
T51 |
32 |
|
T46 |
120 |
|
T61 |
174 |