| T1082 |
/workspace/coverage/default/24.flash_ctrl_hw_sec_otp.1409750077 |
|
|
Jun 10 07:38:40 PM PDT 24 |
Jun 10 07:39:52 PM PDT 24 |
7542353300 ps |
| T1083 |
/workspace/coverage/default/13.flash_ctrl_lcmgr_intg.3720259415 |
|
|
Jun 10 07:37:13 PM PDT 24 |
Jun 10 07:37:29 PM PDT 24 |
15458000 ps |
| T1084 |
/workspace/coverage/default/5.flash_ctrl_intr_wr.1572196682 |
|
|
Jun 10 07:35:55 PM PDT 24 |
Jun 10 07:37:05 PM PDT 24 |
9613166400 ps |
| T1085 |
/workspace/coverage/default/32.flash_ctrl_sec_info_access.3459250522 |
|
|
Jun 10 07:39:28 PM PDT 24 |
Jun 10 07:40:37 PM PDT 24 |
5419127700 ps |
| T1086 |
/workspace/coverage/default/67.flash_ctrl_otp_reset.3866225259 |
|
|
Jun 10 07:40:38 PM PDT 24 |
Jun 10 07:42:51 PM PDT 24 |
44967300 ps |
| T1087 |
/workspace/coverage/default/37.flash_ctrl_smoke.1439949274 |
|
|
Jun 10 07:39:46 PM PDT 24 |
Jun 10 07:41:49 PM PDT 24 |
36827600 ps |
| T1088 |
/workspace/coverage/default/32.flash_ctrl_disable.1327744814 |
|
|
Jun 10 07:39:26 PM PDT 24 |
Jun 10 07:39:49 PM PDT 24 |
71820500 ps |
| T1089 |
/workspace/coverage/default/23.flash_ctrl_disable.806450575 |
|
|
Jun 10 07:38:41 PM PDT 24 |
Jun 10 07:39:05 PM PDT 24 |
11110400 ps |
| T1090 |
/workspace/coverage/default/3.flash_ctrl_connect.1443278351 |
|
|
Jun 10 07:35:20 PM PDT 24 |
Jun 10 07:35:38 PM PDT 24 |
53749900 ps |
| T1091 |
/workspace/coverage/default/15.flash_ctrl_lcmgr_intg.1732780706 |
|
|
Jun 10 07:37:34 PM PDT 24 |
Jun 10 07:37:48 PM PDT 24 |
208122400 ps |
| T1092 |
/workspace/coverage/default/10.flash_ctrl_connect.2226692627 |
|
|
Jun 10 07:36:39 PM PDT 24 |
Jun 10 07:36:56 PM PDT 24 |
27225600 ps |
| T1093 |
/workspace/coverage/default/13.flash_ctrl_re_evict.1063216064 |
|
|
Jun 10 07:37:14 PM PDT 24 |
Jun 10 07:37:52 PM PDT 24 |
179809200 ps |
| T160 |
/workspace/coverage/default/14.flash_ctrl_hw_rma_reset.1190862114 |
|
|
Jun 10 07:37:25 PM PDT 24 |
Jun 10 07:51:27 PM PDT 24 |
160179280700 ps |
| T1094 |
/workspace/coverage/default/1.flash_ctrl_otp_reset.634845461 |
|
|
Jun 10 07:34:43 PM PDT 24 |
Jun 10 07:36:58 PM PDT 24 |
68462300 ps |
| T1095 |
/workspace/coverage/default/3.flash_ctrl_lcmgr_intg.4160549316 |
|
|
Jun 10 07:35:21 PM PDT 24 |
Jun 10 07:35:37 PM PDT 24 |
53813900 ps |
| T1096 |
/workspace/coverage/default/14.flash_ctrl_lcmgr_intg.374593442 |
|
|
Jun 10 07:37:25 PM PDT 24 |
Jun 10 07:37:41 PM PDT 24 |
76210100 ps |
| T1097 |
/workspace/coverage/default/16.flash_ctrl_hw_read_seed_err.2344963320 |
|
|
Jun 10 07:37:59 PM PDT 24 |
Jun 10 07:38:14 PM PDT 24 |
25477200 ps |
| T1098 |
/workspace/coverage/default/16.flash_ctrl_smoke.762746617 |
|
|
Jun 10 07:37:35 PM PDT 24 |
Jun 10 07:41:44 PM PDT 24 |
3259451100 ps |
| T1099 |
/workspace/coverage/default/7.flash_ctrl_disable.3161922054 |
|
|
Jun 10 07:36:18 PM PDT 24 |
Jun 10 07:36:39 PM PDT 24 |
10555600 ps |
| T1100 |
/workspace/coverage/default/2.flash_ctrl_intr_wr_slow_flash.2779820935 |
|
|
Jun 10 07:34:59 PM PDT 24 |
Jun 10 07:37:41 PM PDT 24 |
28151235900 ps |
| T1101 |
/workspace/coverage/default/9.flash_ctrl_rand_ops.3603651002 |
|
|
Jun 10 07:36:23 PM PDT 24 |
Jun 10 07:53:05 PM PDT 24 |
2000468200 ps |
| T1102 |
/workspace/coverage/default/43.flash_ctrl_sec_info_access.3861702859 |
|
|
Jun 10 07:40:06 PM PDT 24 |
Jun 10 07:41:25 PM PDT 24 |
3387289400 ps |
| T1103 |
/workspace/coverage/default/44.flash_ctrl_smoke.731804356 |
|
|
Jun 10 07:41:21 PM PDT 24 |
Jun 10 07:44:41 PM PDT 24 |
1552783600 ps |
| T392 |
/workspace/coverage/default/47.flash_ctrl_disable.1182186148 |
|
|
Jun 10 07:40:17 PM PDT 24 |
Jun 10 07:40:40 PM PDT 24 |
23451600 ps |
| T1104 |
/workspace/coverage/default/11.flash_ctrl_smoke.4253422191 |
|
|
Jun 10 07:36:50 PM PDT 24 |
Jun 10 07:39:18 PM PDT 24 |
50716500 ps |
| T1105 |
/workspace/coverage/default/1.flash_ctrl_host_ctrl_arb.772680969 |
|
|
Jun 10 07:34:50 PM PDT 24 |
Jun 10 08:06:51 PM PDT 24 |
538952191900 ps |
| T1106 |
/workspace/coverage/default/1.flash_ctrl_rw.2505667309 |
|
|
Jun 10 07:34:41 PM PDT 24 |
Jun 10 07:45:17 PM PDT 24 |
4671260300 ps |
| T1107 |
/workspace/coverage/default/12.flash_ctrl_alert_test.1792943589 |
|
|
Jun 10 07:37:10 PM PDT 24 |
Jun 10 07:37:25 PM PDT 24 |
181424100 ps |
| T1108 |
/workspace/coverage/default/19.flash_ctrl_prog_reset.2429019514 |
|
|
Jun 10 07:38:12 PM PDT 24 |
Jun 10 07:39:34 PM PDT 24 |
6774205800 ps |
| T1109 |
/workspace/coverage/default/14.flash_ctrl_otp_reset.2878203995 |
|
|
Jun 10 07:37:25 PM PDT 24 |
Jun 10 07:39:39 PM PDT 24 |
73933500 ps |
| T1110 |
/workspace/coverage/default/16.flash_ctrl_wo.3108665495 |
|
|
Jun 10 07:38:04 PM PDT 24 |
Jun 10 07:41:29 PM PDT 24 |
2456076100 ps |
| T106 |
/workspace/coverage/default/0.flash_ctrl_phy_arb_redun.3537989331 |
|
|
Jun 10 07:34:34 PM PDT 24 |
Jun 10 07:34:58 PM PDT 24 |
745781400 ps |
| T1111 |
/workspace/coverage/default/3.flash_ctrl_disable.3837295999 |
|
|
Jun 10 07:35:20 PM PDT 24 |
Jun 10 07:35:45 PM PDT 24 |
24464500 ps |
| T1112 |
/workspace/coverage/default/47.flash_ctrl_hw_sec_otp.1006630925 |
|
|
Jun 10 07:40:19 PM PDT 24 |
Jun 10 07:42:18 PM PDT 24 |
5461655500 ps |
| T1113 |
/workspace/coverage/default/12.flash_ctrl_sec_info_access.1634320661 |
|
|
Jun 10 07:37:06 PM PDT 24 |
Jun 10 07:38:17 PM PDT 24 |
1348404000 ps |
| T1114 |
/workspace/coverage/default/4.flash_ctrl_hw_prog_rma_wipe_err.2311199973 |
|
|
Jun 10 07:35:43 PM PDT 24 |
Jun 10 07:41:28 PM PDT 24 |
10011234000 ps |
| T74 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.2118368397 |
|
|
Jun 10 07:24:32 PM PDT 24 |
Jun 10 07:25:16 PM PDT 24 |
91544100 ps |
| T227 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.3070756789 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:25:05 PM PDT 24 |
107870200 ps |
| T75 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.1683177449 |
|
|
Jun 10 07:26:37 PM PDT 24 |
Jun 10 07:27:00 PM PDT 24 |
816175500 ps |
| T76 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.3759183557 |
|
|
Jun 10 07:27:07 PM PDT 24 |
Jun 10 07:42:06 PM PDT 24 |
5534707300 ps |
| T257 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.3395752057 |
|
|
Jun 10 07:25:01 PM PDT 24 |
Jun 10 07:25:21 PM PDT 24 |
16844700 ps |
| T274 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.3622657368 |
|
|
Jun 10 07:27:07 PM PDT 24 |
Jun 10 07:27:25 PM PDT 24 |
99590300 ps |
| T228 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.1958448485 |
|
|
Jun 10 07:26:47 PM PDT 24 |
Jun 10 07:39:27 PM PDT 24 |
1825429100 ps |
| T235 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.3080888202 |
|
|
Jun 10 07:27:29 PM PDT 24 |
Jun 10 07:27:49 PM PDT 24 |
63416600 ps |
| T1115 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.2478283526 |
|
|
Jun 10 07:27:08 PM PDT 24 |
Jun 10 07:27:26 PM PDT 24 |
34202900 ps |
| T275 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.3490846027 |
|
|
Jun 10 07:25:01 PM PDT 24 |
Jun 10 07:25:25 PM PDT 24 |
131389300 ps |
| T276 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.1061340956 |
|
|
Jun 10 07:25:15 PM PDT 24 |
Jun 10 07:25:32 PM PDT 24 |
20934800 ps |
| T277 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.1167034921 |
|
|
Jun 10 07:24:37 PM PDT 24 |
Jun 10 07:25:17 PM PDT 24 |
488314100 ps |
| T1116 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.2725859136 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:25:12 PM PDT 24 |
22513700 ps |
| T1117 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.1124107812 |
|
|
Jun 10 07:26:45 PM PDT 24 |
Jun 10 07:27:03 PM PDT 24 |
13128600 ps |
| T280 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.3143464011 |
|
|
Jun 10 07:27:38 PM PDT 24 |
Jun 10 07:27:56 PM PDT 24 |
153972100 ps |
| T1118 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.3846839093 |
|
|
Jun 10 07:25:29 PM PDT 24 |
Jun 10 07:25:49 PM PDT 24 |
119932400 ps |
| T1119 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.879360603 |
|
|
Jun 10 07:25:39 PM PDT 24 |
Jun 10 07:25:56 PM PDT 24 |
32628100 ps |
| T281 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.3271232311 |
|
|
Jun 10 07:25:02 PM PDT 24 |
Jun 10 07:25:21 PM PDT 24 |
30366900 ps |
| T313 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.1649651179 |
|
|
Jun 10 07:27:18 PM PDT 24 |
Jun 10 07:27:52 PM PDT 24 |
314780800 ps |
| T1120 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.2870329262 |
|
|
Jun 10 07:27:19 PM PDT 24 |
Jun 10 07:27:56 PM PDT 24 |
68311200 ps |
| T254 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.2778300194 |
|
|
Jun 10 07:24:34 PM PDT 24 |
Jun 10 07:32:15 PM PDT 24 |
1255617000 ps |
| T1121 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.2207696582 |
|
|
Jun 10 07:25:57 PM PDT 24 |
Jun 10 07:26:16 PM PDT 24 |
12126400 ps |
| T248 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.1644519081 |
|
|
Jun 10 07:25:57 PM PDT 24 |
Jun 10 07:26:20 PM PDT 24 |
457418800 ps |
| T338 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.3560025330 |
|
|
Jun 10 07:24:30 PM PDT 24 |
Jun 10 07:24:48 PM PDT 24 |
32248500 ps |
| T339 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.2040625551 |
|
|
Jun 10 07:27:48 PM PDT 24 |
Jun 10 07:28:03 PM PDT 24 |
55883300 ps |
| T314 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.2833226867 |
|
|
Jun 10 07:24:51 PM PDT 24 |
Jun 10 07:26:09 PM PDT 24 |
3260103800 ps |
| T249 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.3693098921 |
|
|
Jun 10 07:27:20 PM PDT 24 |
Jun 10 07:27:38 PM PDT 24 |
287278600 ps |
| T250 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.3267178756 |
|
|
Jun 10 07:25:38 PM PDT 24 |
Jun 10 07:25:57 PM PDT 24 |
51768800 ps |
| T251 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.1040374030 |
|
|
Jun 10 07:26:29 PM PDT 24 |
Jun 10 07:26:50 PM PDT 24 |
334516700 ps |
| T1122 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.1856425271 |
|
|
Jun 10 07:27:20 PM PDT 24 |
Jun 10 07:27:38 PM PDT 24 |
33889400 ps |
| T428 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.2554039532 |
|
|
Jun 10 07:25:00 PM PDT 24 |
Jun 10 07:26:31 PM PDT 24 |
8762609300 ps |
| T252 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.1551516002 |
|
|
Jun 10 07:25:47 PM PDT 24 |
Jun 10 07:26:11 PM PDT 24 |
45536300 ps |
| T315 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.1777183861 |
|
|
Jun 10 07:27:27 PM PDT 24 |
Jun 10 07:27:49 PM PDT 24 |
384460900 ps |
| T1123 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.1298034110 |
|
|
Jun 10 07:24:30 PM PDT 24 |
Jun 10 07:24:50 PM PDT 24 |
48386700 ps |
| T253 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.2273333617 |
|
|
Jun 10 07:27:27 PM PDT 24 |
Jun 10 07:35:00 PM PDT 24 |
809697300 ps |
| T429 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.4142429498 |
|
|
Jun 10 07:25:29 PM PDT 24 |
Jun 10 07:25:47 PM PDT 24 |
27042400 ps |
| T340 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.1951766965 |
|
|
Jun 10 07:27:56 PM PDT 24 |
Jun 10 07:28:12 PM PDT 24 |
19552200 ps |
| T1124 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.3914202599 |
|
|
Jun 10 07:26:49 PM PDT 24 |
Jun 10 07:27:09 PM PDT 24 |
128647100 ps |
| T255 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.3203306482 |
|
|
Jun 10 07:25:39 PM PDT 24 |
Jun 10 07:25:58 PM PDT 24 |
130467400 ps |
| T291 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.1556413738 |
|
|
Jun 10 07:26:38 PM PDT 24 |
Jun 10 07:26:56 PM PDT 24 |
189862400 ps |
| T337 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.358864703 |
|
|
Jun 10 07:25:15 PM PDT 24 |
Jun 10 07:25:35 PM PDT 24 |
26471900 ps |
| T285 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.2760434053 |
|
|
Jun 10 07:26:57 PM PDT 24 |
Jun 10 07:27:16 PM PDT 24 |
53636000 ps |
| T1125 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.2505268448 |
|
|
Jun 10 07:26:13 PM PDT 24 |
Jun 10 07:26:52 PM PDT 24 |
239990600 ps |
| T316 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.2749669384 |
|
|
Jun 10 07:25:16 PM PDT 24 |
Jun 10 07:26:50 PM PDT 24 |
12869168300 ps |
| T282 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.1308106147 |
|
|
Jun 10 07:24:30 PM PDT 24 |
Jun 10 07:24:51 PM PDT 24 |
108563600 ps |
| T1126 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.2732090357 |
|
|
Jun 10 07:26:51 PM PDT 24 |
Jun 10 07:27:08 PM PDT 24 |
19770300 ps |
| T1127 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.3799848913 |
|
|
Jun 10 07:26:07 PM PDT 24 |
Jun 10 07:26:24 PM PDT 24 |
54779700 ps |
| T279 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.1679615359 |
|
|
Jun 10 07:26:10 PM PDT 24 |
Jun 10 07:26:31 PM PDT 24 |
191413300 ps |
| T258 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.1735679488 |
|
|
Jun 10 07:25:15 PM PDT 24 |
Jun 10 07:25:31 PM PDT 24 |
27906600 ps |
| T284 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.1385900035 |
|
|
Jun 10 07:25:48 PM PDT 24 |
Jun 10 07:26:08 PM PDT 24 |
358462000 ps |
| T1128 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3944706523 |
|
|
Jun 10 07:25:16 PM PDT 24 |
Jun 10 07:25:34 PM PDT 24 |
48450400 ps |
| T341 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.2649617680 |
|
|
Jun 10 07:27:55 PM PDT 24 |
Jun 10 07:28:11 PM PDT 24 |
28956700 ps |
| T1129 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.2034432754 |
|
|
Jun 10 07:27:19 PM PDT 24 |
Jun 10 07:27:39 PM PDT 24 |
57718400 ps |
| T278 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.798568680 |
|
|
Jun 10 07:25:02 PM PDT 24 |
Jun 10 07:25:29 PM PDT 24 |
254184900 ps |
| T1130 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.3707844223 |
|
|
Jun 10 07:27:37 PM PDT 24 |
Jun 10 07:27:57 PM PDT 24 |
34127400 ps |
| T1131 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.731200126 |
|
|
Jun 10 07:24:51 PM PDT 24 |
Jun 10 07:25:13 PM PDT 24 |
56845200 ps |
| T342 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.4019053984 |
|
|
Jun 10 07:27:46 PM PDT 24 |
Jun 10 07:28:02 PM PDT 24 |
51769200 ps |
| T317 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.1947003592 |
|
|
Jun 10 07:27:37 PM PDT 24 |
Jun 10 07:28:16 PM PDT 24 |
756182400 ps |
| T343 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.3947530114 |
|
|
Jun 10 07:27:18 PM PDT 24 |
Jun 10 07:27:35 PM PDT 24 |
42260900 ps |
| T318 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.4260577970 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:25:03 PM PDT 24 |
174580200 ps |
| T373 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.1782526457 |
|
|
Jun 10 07:27:48 PM PDT 24 |
Jun 10 07:28:03 PM PDT 24 |
29306100 ps |
| T1132 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.3678484176 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:25:13 PM PDT 24 |
55524500 ps |
| T283 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.1697837113 |
|
|
Jun 10 07:25:01 PM PDT 24 |
Jun 10 07:25:24 PM PDT 24 |
322873500 ps |
| T1133 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.1389359331 |
|
|
Jun 10 07:25:45 PM PDT 24 |
Jun 10 07:26:05 PM PDT 24 |
38441500 ps |
| T319 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.861235689 |
|
|
Jun 10 07:26:06 PM PDT 24 |
Jun 10 07:26:44 PM PDT 24 |
384582500 ps |
| T292 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.1561761605 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:25:16 PM PDT 24 |
66981500 ps |
| T288 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.3654189021 |
|
|
Jun 10 07:26:29 PM PDT 24 |
Jun 10 07:26:47 PM PDT 24 |
40659800 ps |
| T1134 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.2239258909 |
|
|
Jun 10 07:27:37 PM PDT 24 |
Jun 10 07:27:57 PM PDT 24 |
383050700 ps |
| T1135 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.290151840 |
|
|
Jun 10 07:27:36 PM PDT 24 |
Jun 10 07:27:54 PM PDT 24 |
44232800 ps |
| T1136 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.394914927 |
|
|
Jun 10 07:25:46 PM PDT 24 |
Jun 10 07:26:04 PM PDT 24 |
14730900 ps |
| T1137 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.779656279 |
|
|
Jun 10 07:27:27 PM PDT 24 |
Jun 10 07:27:44 PM PDT 24 |
24127100 ps |
| T1138 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.226950029 |
|
|
Jun 10 07:25:30 PM PDT 24 |
Jun 10 07:25:49 PM PDT 24 |
18127500 ps |
| T1139 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.1607142631 |
|
|
Jun 10 07:27:11 PM PDT 24 |
Jun 10 07:27:30 PM PDT 24 |
38029500 ps |
| T1140 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.387592419 |
|
|
Jun 10 07:26:39 PM PDT 24 |
Jun 10 07:26:57 PM PDT 24 |
41105800 ps |
| T1141 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.587370389 |
|
|
Jun 10 07:26:37 PM PDT 24 |
Jun 10 07:26:53 PM PDT 24 |
31153500 ps |
| T1142 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.2903627814 |
|
|
Jun 10 07:27:31 PM PDT 24 |
Jun 10 07:27:48 PM PDT 24 |
32964600 ps |
| T259 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.2736051935 |
|
|
Jun 10 07:24:38 PM PDT 24 |
Jun 10 07:24:58 PM PDT 24 |
90180100 ps |
| T1143 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.1934560567 |
|
|
Jun 10 07:26:59 PM PDT 24 |
Jun 10 07:27:18 PM PDT 24 |
19833100 ps |
| T345 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.2814012924 |
|
|
Jun 10 07:27:47 PM PDT 24 |
Jun 10 07:28:03 PM PDT 24 |
14916800 ps |
| T344 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.1654961912 |
|
|
Jun 10 07:26:58 PM PDT 24 |
Jun 10 07:27:14 PM PDT 24 |
31765600 ps |
| T1144 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.254619240 |
|
|
Jun 10 07:27:38 PM PDT 24 |
Jun 10 07:27:56 PM PDT 24 |
81672300 ps |
| T287 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.3313679585 |
|
|
Jun 10 07:25:14 PM PDT 24 |
Jun 10 07:25:36 PM PDT 24 |
66553200 ps |
| T1145 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.347303971 |
|
|
Jun 10 07:24:41 PM PDT 24 |
Jun 10 07:25:05 PM PDT 24 |
154611500 ps |
| T289 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.1980053314 |
|
|
Jun 10 07:26:40 PM PDT 24 |
Jun 10 07:27:02 PM PDT 24 |
1061546500 ps |
| T1146 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.2014582540 |
|
|
Jun 10 07:25:47 PM PDT 24 |
Jun 10 07:26:05 PM PDT 24 |
107129100 ps |
| T1147 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.4187660441 |
|
|
Jun 10 07:27:47 PM PDT 24 |
Jun 10 07:28:02 PM PDT 24 |
48392400 ps |
| T1148 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.4048092860 |
|
|
Jun 10 07:24:30 PM PDT 24 |
Jun 10 07:24:48 PM PDT 24 |
160725100 ps |
| T1149 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.1490173435 |
|
|
Jun 10 07:27:37 PM PDT 24 |
Jun 10 07:27:58 PM PDT 24 |
169469700 ps |
| T1150 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.1363525780 |
|
|
Jun 10 07:24:51 PM PDT 24 |
Jun 10 07:25:16 PM PDT 24 |
740043500 ps |
| T1151 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.1782007981 |
|
|
Jun 10 07:26:06 PM PDT 24 |
Jun 10 07:26:22 PM PDT 24 |
15921500 ps |
| T1152 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.1257949302 |
|
|
Jun 10 07:25:00 PM PDT 24 |
Jun 10 07:25:23 PM PDT 24 |
14397600 ps |
| T1153 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.994338577 |
|
|
Jun 10 07:27:37 PM PDT 24 |
Jun 10 07:27:55 PM PDT 24 |
56387800 ps |
| T1154 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.3708030169 |
|
|
Jun 10 07:24:43 PM PDT 24 |
Jun 10 07:25:53 PM PDT 24 |
16082048000 ps |
| T1155 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.2458087439 |
|
|
Jun 10 07:25:39 PM PDT 24 |
Jun 10 07:25:59 PM PDT 24 |
26943700 ps |
| T1156 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.2826368221 |
|
|
Jun 10 07:27:58 PM PDT 24 |
Jun 10 07:28:15 PM PDT 24 |
24394200 ps |
| T1157 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.2669126370 |
|
|
Jun 10 07:24:29 PM PDT 24 |
Jun 10 07:24:50 PM PDT 24 |
253481100 ps |
| T290 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.567025357 |
|
|
Jun 10 07:26:44 PM PDT 24 |
Jun 10 07:27:03 PM PDT 24 |
520139900 ps |
| T1158 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.298767988 |
|
|
Jun 10 07:25:00 PM PDT 24 |
Jun 10 07:25:23 PM PDT 24 |
18579400 ps |
| T1159 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.3040369275 |
|
|
Jun 10 07:26:57 PM PDT 24 |
Jun 10 07:27:13 PM PDT 24 |
19248400 ps |
| T374 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.176790927 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:39:56 PM PDT 24 |
2748198500 ps |
| T1160 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.1820354227 |
|
|
Jun 10 07:26:58 PM PDT 24 |
Jun 10 07:27:30 PM PDT 24 |
385529500 ps |
| T375 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.1468763767 |
|
|
Jun 10 07:26:53 PM PDT 24 |
Jun 10 07:34:33 PM PDT 24 |
693849900 ps |
| T1161 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.2554758869 |
|
|
Jun 10 07:27:35 PM PDT 24 |
Jun 10 07:27:53 PM PDT 24 |
23228200 ps |
| T1162 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.244603234 |
|
|
Jun 10 07:26:59 PM PDT 24 |
Jun 10 07:27:15 PM PDT 24 |
15194500 ps |
| T1163 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.3088335910 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:25:15 PM PDT 24 |
27331200 ps |
| T1164 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.3136966546 |
|
|
Jun 10 07:25:01 PM PDT 24 |
Jun 10 07:25:20 PM PDT 24 |
16368100 ps |
| T1165 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.1171444159 |
|
|
Jun 10 07:27:58 PM PDT 24 |
Jun 10 07:28:14 PM PDT 24 |
25801600 ps |
| T1166 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.1550457541 |
|
|
Jun 10 07:25:31 PM PDT 24 |
Jun 10 07:25:47 PM PDT 24 |
46779900 ps |
| T381 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.1136380097 |
|
|
Jun 10 07:27:17 PM PDT 24 |
Jun 10 07:35:01 PM PDT 24 |
1439530700 ps |
| T1167 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.870555054 |
|
|
Jun 10 07:26:45 PM PDT 24 |
Jun 10 07:27:04 PM PDT 24 |
138060600 ps |
| T1168 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.1808039166 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:26:25 PM PDT 24 |
3170693800 ps |
| T1169 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.2399306349 |
|
|
Jun 10 07:24:41 PM PDT 24 |
Jun 10 07:25:21 PM PDT 24 |
29804300 ps |
| T1170 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.1148432742 |
|
|
Jun 10 07:26:58 PM PDT 24 |
Jun 10 07:27:18 PM PDT 24 |
109967700 ps |
| T382 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.2106564431 |
|
|
Jun 10 07:24:57 PM PDT 24 |
Jun 10 07:32:47 PM PDT 24 |
2944285400 ps |
| T1171 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.2248007064 |
|
|
Jun 10 07:25:01 PM PDT 24 |
Jun 10 07:25:38 PM PDT 24 |
31092800 ps |
| T376 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.4160877454 |
|
|
Jun 10 07:25:02 PM PDT 24 |
Jun 10 07:39:54 PM PDT 24 |
4170605400 ps |
| T1172 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.579688801 |
|
|
Jun 10 07:27:28 PM PDT 24 |
Jun 10 07:27:47 PM PDT 24 |
63858000 ps |
| T294 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.2164764356 |
|
|
Jun 10 07:26:17 PM PDT 24 |
Jun 10 07:41:27 PM PDT 24 |
1866790800 ps |
| T286 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.1411274388 |
|
|
Jun 10 07:26:52 PM PDT 24 |
Jun 10 07:27:14 PM PDT 24 |
44017000 ps |
| T1173 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.2461912814 |
|
|
Jun 10 07:24:42 PM PDT 24 |
Jun 10 07:25:04 PM PDT 24 |
20233000 ps |
| T1174 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.4002189763 |
|
|
Jun 10 07:26:15 PM PDT 24 |
Jun 10 07:26:38 PM PDT 24 |
47131100 ps |
| T377 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.3344308702 |
|
|
Jun 10 07:26:32 PM PDT 24 |
Jun 10 07:33:05 PM PDT 24 |
2113621300 ps |
| T1175 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.2418418222 |
|
|
Jun 10 07:27:27 PM PDT 24 |
Jun 10 07:27:43 PM PDT 24 |
16121600 ps |
| T1176 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.2466529403 |
|
|
Jun 10 07:25:49 PM PDT 24 |
Jun 10 07:26:05 PM PDT 24 |
20649300 ps |
| T320 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.1562696133 |
|
|
Jun 10 07:26:16 PM PDT 24 |
Jun 10 07:26:56 PM PDT 24 |
463271000 ps |
| T1177 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.4151866829 |
|
|
Jun 10 07:27:27 PM PDT 24 |
Jun 10 07:27:44 PM PDT 24 |
36111600 ps |
| T1178 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.3859190022 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:25:00 PM PDT 24 |
17475100 ps |
| T1179 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.600400312 |
|
|
Jun 10 07:25:15 PM PDT 24 |
Jun 10 07:25:31 PM PDT 24 |
73714200 ps |
| T1180 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.609845836 |
|
|
Jun 10 07:26:16 PM PDT 24 |
Jun 10 07:26:36 PM PDT 24 |
153653300 ps |
| T1181 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.3131660170 |
|
|
Jun 10 07:27:26 PM PDT 24 |
Jun 10 07:27:45 PM PDT 24 |
188185000 ps |
| T1182 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.2550759393 |
|
|
Jun 10 07:26:06 PM PDT 24 |
Jun 10 07:26:24 PM PDT 24 |
102465200 ps |
| T1183 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.2867729604 |
|
|
Jun 10 07:26:37 PM PDT 24 |
Jun 10 07:26:57 PM PDT 24 |
258732700 ps |
| T1184 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.2196964362 |
|
|
Jun 10 07:26:30 PM PDT 24 |
Jun 10 07:26:48 PM PDT 24 |
16179900 ps |
| T293 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.3427913157 |
|
|
Jun 10 07:26:16 PM PDT 24 |
Jun 10 07:26:37 PM PDT 24 |
93918500 ps |
| T1185 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.4214812476 |
|
|
Jun 10 07:24:45 PM PDT 24 |
Jun 10 07:25:11 PM PDT 24 |
110040500 ps |
| T321 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.2117881040 |
|
|
Jun 10 07:24:51 PM PDT 24 |
Jun 10 07:25:38 PM PDT 24 |
52430400 ps |
| T383 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.1491792445 |
|
|
Jun 10 07:27:27 PM PDT 24 |
Jun 10 07:42:30 PM PDT 24 |
1343152700 ps |
| T378 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.2541198177 |
|
|
Jun 10 07:25:14 PM PDT 24 |
Jun 10 07:32:55 PM PDT 24 |
1783965400 ps |
| T1186 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.2405533216 |
|
|
Jun 10 07:27:47 PM PDT 24 |
Jun 10 07:28:02 PM PDT 24 |
47883800 ps |
| T379 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.823324944 |
|
|
Jun 10 07:25:48 PM PDT 24 |
Jun 10 07:33:22 PM PDT 24 |
649530700 ps |
| T260 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.2156962050 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:25:12 PM PDT 24 |
16263100 ps |
| T386 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.4136035979 |
|
|
Jun 10 07:26:45 PM PDT 24 |
Jun 10 07:34:21 PM PDT 24 |
300502100 ps |
| T1187 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.1759933932 |
|
|
Jun 10 07:27:37 PM PDT 24 |
Jun 10 07:27:55 PM PDT 24 |
119449700 ps |
| T1188 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.4273224358 |
|
|
Jun 10 07:27:47 PM PDT 24 |
Jun 10 07:28:03 PM PDT 24 |
45809300 ps |
| T1189 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.3465096550 |
|
|
Jun 10 07:27:39 PM PDT 24 |
Jun 10 07:27:56 PM PDT 24 |
24375700 ps |
| T1190 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.2297549609 |
|
|
Jun 10 07:25:01 PM PDT 24 |
Jun 10 07:25:41 PM PDT 24 |
1316890300 ps |
| T1191 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.571975075 |
|
|
Jun 10 07:26:38 PM PDT 24 |
Jun 10 07:27:15 PM PDT 24 |
59907100 ps |
| T1192 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.1995448496 |
|
|
Jun 10 07:26:15 PM PDT 24 |
Jun 10 07:26:36 PM PDT 24 |
22941800 ps |
| T1193 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.2185555638 |
|
|
Jun 10 07:26:29 PM PDT 24 |
Jun 10 07:26:44 PM PDT 24 |
15971400 ps |
| T1194 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.3997463359 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:25:15 PM PDT 24 |
19080200 ps |
| T1195 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.1911510778 |
|
|
Jun 10 07:25:15 PM PDT 24 |
Jun 10 07:26:04 PM PDT 24 |
519036900 ps |
| T1196 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.456114176 |
|
|
Jun 10 07:25:13 PM PDT 24 |
Jun 10 07:25:33 PM PDT 24 |
38482000 ps |
| T1197 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.689257261 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:25:08 PM PDT 24 |
317698900 ps |
| T1198 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.809385112 |
|
|
Jun 10 07:25:58 PM PDT 24 |
Jun 10 07:26:14 PM PDT 24 |
18051700 ps |
| T1199 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.433116956 |
|
|
Jun 10 07:24:40 PM PDT 24 |
Jun 10 07:25:01 PM PDT 24 |
14423200 ps |
| T1200 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.3396787259 |
|
|
Jun 10 07:25:00 PM PDT 24 |
Jun 10 07:25:22 PM PDT 24 |
31792000 ps |
| T1201 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.2669816510 |
|
|
Jun 10 07:26:06 PM PDT 24 |
Jun 10 07:26:29 PM PDT 24 |
150064200 ps |
| T1202 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.1926539618 |
|
|
Jun 10 07:27:08 PM PDT 24 |
Jun 10 07:27:46 PM PDT 24 |
159896500 ps |
| T1203 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.3023221161 |
|
|
Jun 10 07:24:30 PM PDT 24 |
Jun 10 07:25:14 PM PDT 24 |
324880500 ps |
| T1204 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.2222266845 |
|
|
Jun 10 07:25:15 PM PDT 24 |
Jun 10 07:25:34 PM PDT 24 |
43231200 ps |
| T1205 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.8219965 |
|
|
Jun 10 07:25:54 PM PDT 24 |
Jun 10 07:26:13 PM PDT 24 |
13665000 ps |
| T1206 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.1880298585 |
|
|
Jun 10 07:27:48 PM PDT 24 |
Jun 10 07:28:04 PM PDT 24 |
14922900 ps |
| T1207 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.2357370707 |
|
|
Jun 10 07:26:55 PM PDT 24 |
Jun 10 07:27:13 PM PDT 24 |
28276400 ps |
| T1208 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.2807165648 |
|
|
Jun 10 07:27:49 PM PDT 24 |
Jun 10 07:28:05 PM PDT 24 |
60013200 ps |
| T1209 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.1147974179 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:25:00 PM PDT 24 |
65183900 ps |
| T1210 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.2437443582 |
|
|
Jun 10 07:27:27 PM PDT 24 |
Jun 10 07:27:50 PM PDT 24 |
59485700 ps |
| T1211 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.757817611 |
|
|
Jun 10 07:26:17 PM PDT 24 |
Jun 10 07:26:37 PM PDT 24 |
32070700 ps |
| T1212 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.2377066769 |
|
|
Jun 10 07:26:58 PM PDT 24 |
Jun 10 07:27:17 PM PDT 24 |
46769800 ps |
| T1213 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.2020783293 |
|
|
Jun 10 07:27:08 PM PDT 24 |
Jun 10 07:27:25 PM PDT 24 |
51611100 ps |
| T1214 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.1765602549 |
|
|
Jun 10 07:27:21 PM PDT 24 |
Jun 10 07:27:41 PM PDT 24 |
109124100 ps |
| T1215 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.3583291955 |
|
|
Jun 10 07:26:07 PM PDT 24 |
Jun 10 07:26:24 PM PDT 24 |
23133400 ps |
| T1216 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.3685605680 |
|
|
Jun 10 07:27:29 PM PDT 24 |
Jun 10 07:27:46 PM PDT 24 |
50392600 ps |
| T1217 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.1524283149 |
|
|
Jun 10 07:27:10 PM PDT 24 |
Jun 10 07:27:31 PM PDT 24 |
80107700 ps |
| T1218 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.2448405525 |
|
|
Jun 10 07:27:57 PM PDT 24 |
Jun 10 07:28:13 PM PDT 24 |
43347600 ps |
| T1219 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.1325359024 |
|
|
Jun 10 07:27:38 PM PDT 24 |
Jun 10 07:27:55 PM PDT 24 |
96511200 ps |
| T1220 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.584398898 |
|
|
Jun 10 07:26:38 PM PDT 24 |
Jun 10 07:26:58 PM PDT 24 |
223697900 ps |
| T1221 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.696400035 |
|
|
Jun 10 07:26:45 PM PDT 24 |
Jun 10 07:27:04 PM PDT 24 |
437199400 ps |
| T1222 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.665563618 |
|
|
Jun 10 07:27:37 PM PDT 24 |
Jun 10 07:27:54 PM PDT 24 |
29705900 ps |
| T1223 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.3906568368 |
|
|
Jun 10 07:26:59 PM PDT 24 |
Jun 10 07:27:22 PM PDT 24 |
171581200 ps |
| T1224 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.2848020950 |
|
|
Jun 10 07:27:47 PM PDT 24 |
Jun 10 07:28:02 PM PDT 24 |
14262100 ps |
| T1225 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.1908090419 |
|
|
Jun 10 07:27:18 PM PDT 24 |
Jun 10 07:27:37 PM PDT 24 |
23576100 ps |
| T1226 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.1543002631 |
|
|
Jun 10 07:25:39 PM PDT 24 |
Jun 10 07:25:54 PM PDT 24 |
31606100 ps |
| T322 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.1548848704 |
|
|
Jun 10 07:24:50 PM PDT 24 |
Jun 10 07:25:15 PM PDT 24 |
129509300 ps |
| T1227 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.1664394241 |
|
|
Jun 10 07:24:29 PM PDT 24 |
Jun 10 07:24:49 PM PDT 24 |
55421700 ps |
| T1228 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.3279538622 |
|
|
Jun 10 07:27:47 PM PDT 24 |
Jun 10 07:28:03 PM PDT 24 |
15072600 ps |
| T1229 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.1806341814 |
|
|
Jun 10 07:27:18 PM PDT 24 |
Jun 10 07:27:37 PM PDT 24 |
168388300 ps |
| T388 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.1791678023 |
|
|
Jun 10 07:25:38 PM PDT 24 |
Jun 10 07:40:43 PM PDT 24 |
813965000 ps |
| T1230 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.688308141 |
|
|
Jun 10 07:25:57 PM PDT 24 |
Jun 10 07:26:13 PM PDT 24 |
48400200 ps |
| T385 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.1546034063 |
|
|
Jun 10 07:26:07 PM PDT 24 |
Jun 10 07:41:08 PM PDT 24 |
704179400 ps |
| T1231 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.591590142 |
|
|
Jun 10 07:25:01 PM PDT 24 |
Jun 10 07:25:25 PM PDT 24 |
66747900 ps |
| T1232 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.3369026636 |
|
|
Jun 10 07:26:16 PM PDT 24 |
Jun 10 07:26:37 PM PDT 24 |
210883000 ps |
| T1233 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.3490560882 |
|
|
Jun 10 07:26:15 PM PDT 24 |
Jun 10 07:26:33 PM PDT 24 |
25675900 ps |
| T1234 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.919268532 |
|
|
Jun 10 07:26:31 PM PDT 24 |
Jun 10 07:26:49 PM PDT 24 |
49401000 ps |
| T1235 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.4198123239 |
|
|
Jun 10 07:27:57 PM PDT 24 |
Jun 10 07:28:13 PM PDT 24 |
38233400 ps |
| T1236 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.707205259 |
|
|
Jun 10 07:26:48 PM PDT 24 |
Jun 10 07:27:08 PM PDT 24 |
44940000 ps |
| T380 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.2765403188 |
|
|
Jun 10 07:26:58 PM PDT 24 |
Jun 10 07:42:00 PM PDT 24 |
1325412600 ps |
| T1237 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.671446102 |
|
|
Jun 10 07:26:47 PM PDT 24 |
Jun 10 07:27:05 PM PDT 24 |
31232700 ps |
| T1238 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.2296551296 |
|
|
Jun 10 07:25:14 PM PDT 24 |
Jun 10 07:25:30 PM PDT 24 |
43995000 ps |
| T1239 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.1797280287 |
|
|
Jun 10 07:27:08 PM PDT 24 |
Jun 10 07:27:29 PM PDT 24 |
45126700 ps |
| T1240 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.3781796767 |
|
|
Jun 10 07:27:57 PM PDT 24 |
Jun 10 07:28:14 PM PDT 24 |
16016000 ps |
| T384 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.3364658860 |
|
|
Jun 10 07:25:57 PM PDT 24 |
Jun 10 07:41:19 PM PDT 24 |
2708020200 ps |
| T1241 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.658892246 |
|
|
Jun 10 07:27:57 PM PDT 24 |
Jun 10 07:28:13 PM PDT 24 |
22877500 ps |
| T1242 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.3020749517 |
|
|
Jun 10 07:27:45 PM PDT 24 |
Jun 10 07:28:01 PM PDT 24 |
30243700 ps |
| T1243 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.513722598 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:25:33 PM PDT 24 |
1397078800 ps |
| T323 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.4044729289 |
|
|
Jun 10 07:25:56 PM PDT 24 |
Jun 10 07:26:17 PM PDT 24 |
370776300 ps |
| T1244 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.2806109755 |
|
|
Jun 10 07:24:39 PM PDT 24 |
Jun 10 07:25:03 PM PDT 24 |
42400800 ps |
| T1245 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.1480987073 |
|
|
Jun 10 07:25:14 PM PDT 24 |
Jun 10 07:26:26 PM PDT 24 |
1634528000 ps |
| T1246 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.3154316894 |
|
|
Jun 10 07:25:54 PM PDT 24 |
Jun 10 07:26:17 PM PDT 24 |
156500300 ps |
| T1247 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.1211648840 |
|
|
Jun 10 07:27:48 PM PDT 24 |
Jun 10 07:28:04 PM PDT 24 |
16976900 ps |
| T1248 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.1434081606 |
|
|
Jun 10 07:25:30 PM PDT 24 |
Jun 10 07:25:48 PM PDT 24 |
18254300 ps |
| T1249 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.4216648197 |
|
|
Jun 10 07:25:58 PM PDT 24 |
Jun 10 07:26:19 PM PDT 24 |
27334400 ps |
| T387 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.1331764876 |
|
|
Jun 10 07:25:16 PM PDT 24 |
Jun 10 07:40:15 PM PDT 24 |
1872250700 ps |
| T261 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.410614637 |
|
|
Jun 10 07:24:30 PM PDT 24 |
Jun 10 07:24:48 PM PDT 24 |
161264600 ps |
| T1250 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.1181690070 |
|
|
Jun 10 07:27:56 PM PDT 24 |
Jun 10 07:28:13 PM PDT 24 |
29215800 ps |