Unified Coverage Report :: Group :: flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg

Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_env_0.1/flash_ctrl_env_cov.sv

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Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	5	0	5	100.00
Crosses	6	0	6	100.00

Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
instr_type_cp	3	0	3	100.00	100	1	1	0
key_cp	2	0	2	100.00	100	1	1	2

Crosses for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::fetch_code_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
key_instr_cross	6	0	6	100.00	100	1	1	0

Summary for Variable instr_type_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for instr_type_cp

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
others	5142	1		T42	180		T45	214		T46	201
instr_types[0]	6248	1		T42	200		T45	288		T46	366
instr_types[1]	4151188	1		T2	500		T6	16922		T4	16950

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Summary for Variable key_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for key_cp

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	4160437	1		T2	500		T6	16922		T4	16950
auto[1]	2141	1		T42	284		T45	295		T46	220

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Summary for Cross key_instr_cross

Samples crossed: key_cp instr_type_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	6	0	6	100.00

Automatically Generated Cross Bins for key_instr_cross

Bins

key_cp	instr_type_cp	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	others	4668	1		T42	79		T45	121		T46	134
auto[0]	instr_types[0]	5487	1		T42	138		T45	190		T46	286
auto[0]	instr_types[1]	4150282	1		T2	500		T6	16922		T4	16950
auto[1]	others	474	1		T42	101		T45	93		T46	67
auto[1]	instr_types[0]	761	1		T42	62		T45	98		T46	80
auto[1]	instr_types[1]	906	1		T42	121		T45	104		T46	73