| T1074 |
/workspace/coverage/default/13.flash_ctrl_otp_reset.2438797564 |
|
|
Jun 21 05:51:56 PM PDT 24 |
Jun 21 05:53:46 PM PDT 24 |
78648100 ps |
| T1075 |
/workspace/coverage/default/1.flash_ctrl_rw.4173068683 |
|
|
Jun 21 05:45:05 PM PDT 24 |
Jun 21 05:54:32 PM PDT 24 |
3295575900 ps |
| T62 |
/workspace/coverage/default/4.flash_ctrl_phy_host_grant_err.3681198844 |
|
|
Jun 21 05:47:25 PM PDT 24 |
Jun 21 05:47:40 PM PDT 24 |
15426700 ps |
| T1076 |
/workspace/coverage/default/60.flash_ctrl_connect.2283538242 |
|
|
Jun 21 05:57:47 PM PDT 24 |
Jun 21 05:58:03 PM PDT 24 |
104146500 ps |
| T1077 |
/workspace/coverage/default/7.flash_ctrl_hw_read_seed_err.3006979624 |
|
|
Jun 21 05:48:55 PM PDT 24 |
Jun 21 05:49:09 PM PDT 24 |
45200200 ps |
| T1078 |
/workspace/coverage/default/19.flash_ctrl_rw_evict_all_en.3670715683 |
|
|
Jun 21 05:54:17 PM PDT 24 |
Jun 21 05:54:49 PM PDT 24 |
28658900 ps |
| T1079 |
/workspace/coverage/default/6.flash_ctrl_invalid_op.4005382107 |
|
|
Jun 21 05:48:18 PM PDT 24 |
Jun 21 05:49:22 PM PDT 24 |
1988010600 ps |
| T1080 |
/workspace/coverage/default/27.flash_ctrl_alert_test.2874794253 |
|
|
Jun 21 05:55:31 PM PDT 24 |
Jun 21 05:55:46 PM PDT 24 |
123095800 ps |
| T1081 |
/workspace/coverage/default/17.flash_ctrl_otp_reset.274424186 |
|
|
Jun 21 05:53:27 PM PDT 24 |
Jun 21 05:55:39 PM PDT 24 |
67245800 ps |
| T1082 |
/workspace/coverage/default/31.flash_ctrl_alert_test.1790084133 |
|
|
Jun 21 05:55:58 PM PDT 24 |
Jun 21 05:56:12 PM PDT 24 |
56477200 ps |
| T1083 |
/workspace/coverage/default/14.flash_ctrl_disable.1275123884 |
|
|
Jun 21 05:52:26 PM PDT 24 |
Jun 21 05:52:49 PM PDT 24 |
29522400 ps |
| T70 |
/workspace/coverage/default/3.flash_ctrl_phy_arb_redun.4255436099 |
|
|
Jun 21 05:46:49 PM PDT 24 |
Jun 21 05:47:07 PM PDT 24 |
892097700 ps |
| T1084 |
/workspace/coverage/default/15.flash_ctrl_phy_arb.2301270545 |
|
|
Jun 21 05:52:35 PM PDT 24 |
Jun 21 06:02:59 PM PDT 24 |
8518127900 ps |
| T1085 |
/workspace/coverage/default/24.flash_ctrl_hw_sec_otp.1239489784 |
|
|
Jun 21 05:54:57 PM PDT 24 |
Jun 21 05:55:42 PM PDT 24 |
1969423800 ps |
| T1086 |
/workspace/coverage/default/31.flash_ctrl_intr_rd_slow_flash.1462126442 |
|
|
Jun 21 05:55:58 PM PDT 24 |
Jun 21 05:58:07 PM PDT 24 |
6063207200 ps |
| T220 |
/workspace/coverage/default/0.flash_ctrl_host_ctrl_arb.3673644649 |
|
|
Jun 21 05:44:50 PM PDT 24 |
Jun 21 06:30:46 PM PDT 24 |
261926701400 ps |
| T1087 |
/workspace/coverage/default/17.flash_ctrl_rw_evict_all_en.2155256088 |
|
|
Jun 21 05:53:37 PM PDT 24 |
Jun 21 05:54:06 PM PDT 24 |
42163500 ps |
| T1088 |
/workspace/coverage/default/3.flash_ctrl_hw_read_seed_err.779741172 |
|
|
Jun 21 05:46:53 PM PDT 24 |
Jun 21 05:47:07 PM PDT 24 |
50782300 ps |
| T190 |
/workspace/coverage/default/1.flash_ctrl_host_ctrl_arb.1622268641 |
|
|
Jun 21 05:45:05 PM PDT 24 |
Jun 21 06:36:46 PM PDT 24 |
303615482100 ps |
| T1089 |
/workspace/coverage/default/16.flash_ctrl_rw_evict.4181330209 |
|
|
Jun 21 05:53:09 PM PDT 24 |
Jun 21 05:53:41 PM PDT 24 |
43624300 ps |
| T1090 |
/workspace/coverage/default/20.flash_ctrl_connect.1406449647 |
|
|
Jun 21 05:54:22 PM PDT 24 |
Jun 21 05:54:39 PM PDT 24 |
55133300 ps |
| T1091 |
/workspace/coverage/default/29.flash_ctrl_connect.4113248503 |
|
|
Jun 21 05:55:47 PM PDT 24 |
Jun 21 05:56:04 PM PDT 24 |
27068500 ps |
| T1092 |
/workspace/coverage/default/9.flash_ctrl_rw_serr.3927224590 |
|
|
Jun 21 05:50:02 PM PDT 24 |
Jun 21 05:59:25 PM PDT 24 |
11781257800 ps |
| T1093 |
/workspace/coverage/default/4.flash_ctrl_rw_evict_all_en.3636943957 |
|
|
Jun 21 05:47:26 PM PDT 24 |
Jun 21 05:47:58 PM PDT 24 |
97859300 ps |
| T1094 |
/workspace/coverage/default/0.flash_ctrl_intr_rd.2890433003 |
|
|
Jun 21 05:44:52 PM PDT 24 |
Jun 21 05:47:19 PM PDT 24 |
1430082700 ps |
| T1095 |
/workspace/coverage/default/29.flash_ctrl_rw_evict_all_en.818077908 |
|
|
Jun 21 05:55:44 PM PDT 24 |
Jun 21 05:56:14 PM PDT 24 |
44965400 ps |
| T1096 |
/workspace/coverage/default/9.flash_ctrl_hw_rma_reset.2870451694 |
|
|
Jun 21 05:49:49 PM PDT 24 |
Jun 21 06:04:43 PM PDT 24 |
320256159700 ps |
| T1097 |
/workspace/coverage/default/13.flash_ctrl_re_evict.1816195283 |
|
|
Jun 21 05:52:03 PM PDT 24 |
Jun 21 05:52:35 PM PDT 24 |
126285700 ps |
| T1098 |
/workspace/coverage/default/2.flash_ctrl_otp_reset.426326660 |
|
|
Jun 21 05:45:28 PM PDT 24 |
Jun 21 05:47:38 PM PDT 24 |
140216100 ps |
| T1099 |
/workspace/coverage/default/3.flash_ctrl_intr_wr.2768742310 |
|
|
Jun 21 05:46:31 PM PDT 24 |
Jun 21 05:47:41 PM PDT 24 |
2230699800 ps |
| T1100 |
/workspace/coverage/default/44.flash_ctrl_smoke.2151841717 |
|
|
Jun 21 05:57:16 PM PDT 24 |
Jun 21 05:59:42 PM PDT 24 |
64188300 ps |
| T1101 |
/workspace/coverage/default/7.flash_ctrl_ro_serr.2254582521 |
|
|
Jun 21 05:48:54 PM PDT 24 |
Jun 21 05:51:34 PM PDT 24 |
1339352100 ps |
| T1102 |
/workspace/coverage/default/1.flash_ctrl_erase_suspend.3327884051 |
|
|
Jun 21 05:45:06 PM PDT 24 |
Jun 21 05:51:10 PM PDT 24 |
12658158600 ps |
| T1103 |
/workspace/coverage/default/36.flash_ctrl_otp_reset.2922703028 |
|
|
Jun 21 05:56:26 PM PDT 24 |
Jun 21 05:58:37 PM PDT 24 |
74699200 ps |
| T1104 |
/workspace/coverage/default/37.flash_ctrl_sec_info_access.1817404191 |
|
|
Jun 21 05:56:41 PM PDT 24 |
Jun 21 05:57:44 PM PDT 24 |
1224788100 ps |
| T1105 |
/workspace/coverage/default/4.flash_ctrl_serr_address.2879727011 |
|
|
Jun 21 05:47:09 PM PDT 24 |
Jun 21 05:48:19 PM PDT 24 |
677681500 ps |
| T1106 |
/workspace/coverage/default/8.flash_ctrl_rw_serr.2015999604 |
|
|
Jun 21 05:49:12 PM PDT 24 |
Jun 21 06:00:33 PM PDT 24 |
4380304300 ps |
| T1107 |
/workspace/coverage/default/54.flash_ctrl_connect.3264133707 |
|
|
Jun 21 05:57:52 PM PDT 24 |
Jun 21 05:58:06 PM PDT 24 |
26324400 ps |
| T1108 |
/workspace/coverage/default/0.flash_ctrl_read_word_sweep.1278773724 |
|
|
Jun 21 05:44:51 PM PDT 24 |
Jun 21 05:45:10 PM PDT 24 |
314929100 ps |
| T1109 |
/workspace/coverage/default/73.flash_ctrl_connect.3207833059 |
|
|
Jun 21 05:58:06 PM PDT 24 |
Jun 21 05:58:22 PM PDT 24 |
13630800 ps |
| T1110 |
/workspace/coverage/default/0.flash_ctrl_read_word_sweep_derr.3512536832 |
|
|
Jun 21 05:44:48 PM PDT 24 |
Jun 21 05:45:17 PM PDT 24 |
429313800 ps |
| T1111 |
/workspace/coverage/default/12.flash_ctrl_prog_reset.2521336692 |
|
|
Jun 21 05:51:34 PM PDT 24 |
Jun 21 05:54:22 PM PDT 24 |
7002486500 ps |
| T1112 |
/workspace/coverage/default/63.flash_ctrl_otp_reset.3710981418 |
|
|
Jun 21 05:57:49 PM PDT 24 |
Jun 21 05:59:40 PM PDT 24 |
81321000 ps |
| T1113 |
/workspace/coverage/default/74.flash_ctrl_otp_reset.3767226565 |
|
|
Jun 21 05:58:08 PM PDT 24 |
Jun 21 05:59:59 PM PDT 24 |
74447400 ps |
| T271 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.2545677044 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
22663500 ps |
| T58 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.2188518840 |
|
|
Jun 21 07:06:40 PM PDT 24 |
Jun 21 07:07:12 PM PDT 24 |
57610900 ps |
| T272 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.3545551725 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:07:08 PM PDT 24 |
15550700 ps |
| T1114 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.1456829425 |
|
|
Jun 21 07:07:12 PM PDT 24 |
Jun 21 07:07:33 PM PDT 24 |
13485100 ps |
| T59 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.1204758058 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:07:18 PM PDT 24 |
167509900 ps |
| T60 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.4253725666 |
|
|
Jun 21 07:06:59 PM PDT 24 |
Jun 21 07:14:45 PM PDT 24 |
838747200 ps |
| T101 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.592505563 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:14:34 PM PDT 24 |
3233313000 ps |
| T104 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.2000385048 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:07:27 PM PDT 24 |
8002583700 ps |
| T103 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.634732216 |
|
|
Jun 21 07:06:52 PM PDT 24 |
Jun 21 07:07:11 PM PDT 24 |
136030200 ps |
| T324 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.3674114567 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
30684800 ps |
| T326 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.8260005 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
15788600 ps |
| T205 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.2737230395 |
|
|
Jun 21 07:06:58 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
40943700 ps |
| T102 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.688688584 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:25 PM PDT 24 |
90354100 ps |
| T206 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.2342987848 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:07:32 PM PDT 24 |
153408100 ps |
| T1115 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.2957957147 |
|
|
Jun 21 07:06:42 PM PDT 24 |
Jun 21 07:06:58 PM PDT 24 |
19080000 ps |
| T240 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.441209986 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:14:37 PM PDT 24 |
748414400 ps |
| T234 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.1790765855 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:27 PM PDT 24 |
105729600 ps |
| T302 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.244291664 |
|
|
Jun 21 07:06:40 PM PDT 24 |
Jun 21 07:07:28 PM PDT 24 |
187131400 ps |
| T325 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.4269672621 |
|
|
Jun 21 07:07:16 PM PDT 24 |
Jun 21 07:07:36 PM PDT 24 |
58046600 ps |
| T338 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.3529221158 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
31550600 ps |
| T339 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.2752385729 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
39347500 ps |
| T241 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.2930883897 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:22:14 PM PDT 24 |
361117500 ps |
| T259 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.842581921 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
229745600 ps |
| T1116 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.2152062543 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:06:59 PM PDT 24 |
48967800 ps |
| T260 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.2580100272 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:28 PM PDT 24 |
71400300 ps |
| T235 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.1287562668 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:22:22 PM PDT 24 |
2739273100 ps |
| T261 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.3079571107 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:29 PM PDT 24 |
172099300 ps |
| T262 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.2593812791 |
|
|
Jun 21 07:07:15 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
35714900 ps |
| T263 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.2440909643 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:29 PM PDT 24 |
131058100 ps |
| T327 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.1471148228 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
52814100 ps |
| T236 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.1282887045 |
|
|
Jun 21 07:06:39 PM PDT 24 |
Jun 21 07:06:55 PM PDT 24 |
63571000 ps |
| T264 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.2613639379 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:07:12 PM PDT 24 |
92937500 ps |
| T340 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.384944964 |
|
|
Jun 21 07:06:42 PM PDT 24 |
Jun 21 07:06:58 PM PDT 24 |
49884800 ps |
| T237 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.3954679492 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:07:05 PM PDT 24 |
203722800 ps |
| T238 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.2581774595 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:10 PM PDT 24 |
142602600 ps |
| T1117 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.3709082341 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
14902400 ps |
| T1118 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.1078767326 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:07:01 PM PDT 24 |
22910500 ps |
| T1119 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3998860888 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
34914200 ps |
| T242 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.1453278010 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:13:42 PM PDT 24 |
178971800 ps |
| T1120 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.3047213959 |
|
|
Jun 21 07:06:54 PM PDT 24 |
Jun 21 07:07:11 PM PDT 24 |
32905300 ps |
| T1121 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.560360816 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
210098700 ps |
| T303 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.4228239792 |
|
|
Jun 21 07:06:40 PM PDT 24 |
Jun 21 07:07:17 PM PDT 24 |
195610800 ps |
| T239 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.1466303305 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:40 PM PDT 24 |
52780400 ps |
| T1122 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.3083016767 |
|
|
Jun 21 07:06:42 PM PDT 24 |
Jun 21 07:06:58 PM PDT 24 |
17825700 ps |
| T1123 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.1219880344 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
47843700 ps |
| T1124 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.3684255669 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:07:06 PM PDT 24 |
27851500 ps |
| T1125 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.687472029 |
|
|
Jun 21 07:06:57 PM PDT 24 |
Jun 21 07:07:13 PM PDT 24 |
59041300 ps |
| T1126 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.2198405411 |
|
|
Jun 21 07:07:12 PM PDT 24 |
Jun 21 07:07:31 PM PDT 24 |
35709300 ps |
| T304 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.1349650307 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:07:13 PM PDT 24 |
122210700 ps |
| T1127 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.2496514724 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
28732600 ps |
| T270 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.4230543407 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:30 PM PDT 24 |
72272700 ps |
| T1128 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.1980497591 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:25 PM PDT 24 |
149870300 ps |
| T1129 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.3146850957 |
|
|
Jun 21 07:07:11 PM PDT 24 |
Jun 21 07:07:30 PM PDT 24 |
71254400 ps |
| T1130 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.1474892663 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:31 PM PDT 24 |
177713100 ps |
| T1131 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.2299875582 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
25314200 ps |
| T1132 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.2662026451 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:07:32 PM PDT 24 |
18136900 ps |
| T269 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.3083046193 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:31 PM PDT 24 |
67971900 ps |
| T305 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.3002613566 |
|
|
Jun 21 07:06:42 PM PDT 24 |
Jun 21 07:07:03 PM PDT 24 |
106123300 ps |
| T1133 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.1317052385 |
|
|
Jun 21 07:07:02 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
28324900 ps |
| T1134 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.4009984431 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
66598800 ps |
| T1135 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.2750930998 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:07:12 PM PDT 24 |
299440600 ps |
| T1136 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.2131313961 |
|
|
Jun 21 07:07:19 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
17598000 ps |
| T1137 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.450407133 |
|
|
Jun 21 07:06:48 PM PDT 24 |
Jun 21 07:07:03 PM PDT 24 |
60463900 ps |
| T1138 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.2863349216 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:06 PM PDT 24 |
54420100 ps |
| T1139 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.949591667 |
|
|
Jun 21 07:06:44 PM PDT 24 |
Jun 21 07:07:00 PM PDT 24 |
22720600 ps |
| T278 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.3391595504 |
|
|
Jun 21 07:06:48 PM PDT 24 |
Jun 21 07:07:08 PM PDT 24 |
26665600 ps |
| T1140 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.4193127230 |
|
|
Jun 21 07:07:19 PM PDT 24 |
Jun 21 07:07:40 PM PDT 24 |
47411700 ps |
| T346 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.1730822678 |
|
|
Jun 21 07:06:59 PM PDT 24 |
Jun 21 07:19:55 PM PDT 24 |
13105249700 ps |
| T1141 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.613921478 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
49463000 ps |
| T1142 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.958052363 |
|
|
Jun 21 07:07:02 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
17464300 ps |
| T1143 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.826784506 |
|
|
Jun 21 07:06:54 PM PDT 24 |
Jun 21 07:07:11 PM PDT 24 |
51128000 ps |
| T1144 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.3353403794 |
|
|
Jun 21 07:06:48 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
52786700 ps |
| T1145 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.1902669724 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:26 PM PDT 24 |
47754700 ps |
| T1146 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.1523839412 |
|
|
Jun 21 07:06:52 PM PDT 24 |
Jun 21 07:07:16 PM PDT 24 |
581889700 ps |
| T1147 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.372724214 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:07:53 PM PDT 24 |
60397000 ps |
| T306 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.2356597567 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:11 PM PDT 24 |
91379100 ps |
| T307 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.3944032319 |
|
|
Jun 21 07:06:52 PM PDT 24 |
Jun 21 07:07:36 PM PDT 24 |
1802219900 ps |
| T342 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.649754103 |
|
|
Jun 21 07:06:40 PM PDT 24 |
Jun 21 07:13:07 PM PDT 24 |
838418800 ps |
| T245 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.3003737284 |
|
|
Jun 21 07:06:44 PM PDT 24 |
Jun 21 07:07:00 PM PDT 24 |
218667600 ps |
| T1148 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.722286962 |
|
|
Jun 21 07:06:48 PM PDT 24 |
Jun 21 07:07:03 PM PDT 24 |
17624400 ps |
| T275 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.3221187845 |
|
|
Jun 21 07:06:53 PM PDT 24 |
Jun 21 07:14:54 PM PDT 24 |
5345656900 ps |
| T1149 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.515832785 |
|
|
Jun 21 07:07:12 PM PDT 24 |
Jun 21 07:07:32 PM PDT 24 |
34735200 ps |
| T1150 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.3436135063 |
|
|
Jun 21 07:06:54 PM PDT 24 |
Jun 21 07:07:10 PM PDT 24 |
18954900 ps |
| T1151 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.1767365445 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:06:59 PM PDT 24 |
14034000 ps |
| T308 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.4023551277 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
234650700 ps |
| T274 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.3463531157 |
|
|
Jun 21 07:06:58 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
183033900 ps |
| T277 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.2294622548 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:07:14 PM PDT 24 |
63577900 ps |
| T1152 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.421554638 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:24 PM PDT 24 |
112593100 ps |
| T1153 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.2764265304 |
|
|
Jun 21 07:07:06 PM PDT 24 |
Jun 21 07:07:30 PM PDT 24 |
48981600 ps |
| T309 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.152405273 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
96232200 ps |
| T1154 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.3138825281 |
|
|
Jun 21 07:06:40 PM PDT 24 |
Jun 21 07:06:59 PM PDT 24 |
21377100 ps |
| T246 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.3097977876 |
|
|
Jun 21 07:06:44 PM PDT 24 |
Jun 21 07:07:00 PM PDT 24 |
16448500 ps |
| T1155 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.853365694 |
|
|
Jun 21 07:06:45 PM PDT 24 |
Jun 21 07:07:04 PM PDT 24 |
20504700 ps |
| T1156 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.493081575 |
|
|
Jun 21 07:06:54 PM PDT 24 |
Jun 21 07:07:16 PM PDT 24 |
147407300 ps |
| T1157 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.2197910658 |
|
|
Jun 21 07:07:11 PM PDT 24 |
Jun 21 07:07:33 PM PDT 24 |
11779300 ps |
| T1158 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.3632905156 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:07:35 PM PDT 24 |
45915700 ps |
| T1159 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.1457276952 |
|
|
Jun 21 07:07:19 PM PDT 24 |
Jun 21 07:07:40 PM PDT 24 |
107975300 ps |
| T1160 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.346202238 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:29 PM PDT 24 |
59954200 ps |
| T1161 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.2593477097 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:07 PM PDT 24 |
17737700 ps |
| T1162 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.1597132251 |
|
|
Jun 21 07:07:04 PM PDT 24 |
Jun 21 07:07:27 PM PDT 24 |
15495900 ps |
| T1163 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.1834664122 |
|
|
Jun 21 07:06:48 PM PDT 24 |
Jun 21 07:07:21 PM PDT 24 |
54462600 ps |
| T310 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.366365029 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:08:19 PM PDT 24 |
3212527600 ps |
| T1164 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.2479162516 |
|
|
Jun 21 07:07:02 PM PDT 24 |
Jun 21 07:07:25 PM PDT 24 |
13345100 ps |
| T1165 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.2898010888 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
52719900 ps |
| T1166 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.515856524 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:25 PM PDT 24 |
109037000 ps |
| T311 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.378034872 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:07:02 PM PDT 24 |
98042000 ps |
| T1167 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.1508794160 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:31 PM PDT 24 |
1284096000 ps |
| T1168 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.1420708669 |
|
|
Jun 21 07:06:48 PM PDT 24 |
Jun 21 07:07:02 PM PDT 24 |
13613300 ps |
| T1169 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.3251823879 |
|
|
Jun 21 07:07:12 PM PDT 24 |
Jun 21 07:07:34 PM PDT 24 |
75166700 ps |
| T350 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.1648436063 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:14:54 PM PDT 24 |
694662600 ps |
| T1170 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.2542109027 |
|
|
Jun 21 07:07:10 PM PDT 24 |
Jun 21 07:07:30 PM PDT 24 |
26617200 ps |
| T1171 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.330068623 |
|
|
Jun 21 07:07:14 PM PDT 24 |
Jun 21 07:07:35 PM PDT 24 |
30221600 ps |
| T1172 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.2051830401 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
172030700 ps |
| T1173 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.3083402881 |
|
|
Jun 21 07:07:14 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
48005100 ps |
| T1174 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.1806849228 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:08 PM PDT 24 |
105511400 ps |
| T312 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.1949593681 |
|
|
Jun 21 07:06:42 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
400821000 ps |
| T276 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.3992971177 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:12 PM PDT 24 |
56522500 ps |
| T341 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.2441766752 |
|
|
Jun 21 07:06:54 PM PDT 24 |
Jun 21 07:07:16 PM PDT 24 |
271252400 ps |
| T1175 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.2460659043 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
2526957100 ps |
| T244 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.2303713475 |
|
|
Jun 21 07:06:52 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
50469700 ps |
| T1176 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.2383340360 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:07:06 PM PDT 24 |
13274800 ps |
| T1177 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.38890702 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
31948100 ps |
| T1178 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.2580035876 |
|
|
Jun 21 07:06:44 PM PDT 24 |
Jun 21 07:06:59 PM PDT 24 |
55356700 ps |
| T1179 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.3641178546 |
|
|
Jun 21 07:06:58 PM PDT 24 |
Jun 21 07:07:16 PM PDT 24 |
17811200 ps |
| T1180 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.105201132 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:22 PM PDT 24 |
27233600 ps |
| T1181 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.2449993743 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:07:22 PM PDT 24 |
2607600100 ps |
| T1182 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.4229509038 |
|
|
Jun 21 07:07:04 PM PDT 24 |
Jun 21 07:07:30 PM PDT 24 |
121991700 ps |
| T1183 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.2434087022 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
151026000 ps |
| T1184 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.1584702528 |
|
|
Jun 21 07:06:54 PM PDT 24 |
Jun 21 07:07:34 PM PDT 24 |
647014700 ps |
| T1185 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.3172714367 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
51676600 ps |
| T1186 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.2047290214 |
|
|
Jun 21 07:07:02 PM PDT 24 |
Jun 21 07:07:26 PM PDT 24 |
26122900 ps |
| T1187 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.3759067270 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:22 PM PDT 24 |
293077300 ps |
| T273 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.2283332373 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:29 PM PDT 24 |
157158300 ps |
| T1188 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.2943474258 |
|
|
Jun 21 07:07:02 PM PDT 24 |
Jun 21 07:07:27 PM PDT 24 |
32039300 ps |
| T1189 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.2344996512 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
125563900 ps |
| T1190 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.2157793215 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:21 PM PDT 24 |
44018900 ps |
| T1191 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.951615324 |
|
|
Jun 21 07:07:04 PM PDT 24 |
Jun 21 07:07:26 PM PDT 24 |
122439700 ps |
| T1192 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.3637367807 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
92098100 ps |
| T1193 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.3143891175 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:07 PM PDT 24 |
143373100 ps |
| T1194 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.5969402 |
|
|
Jun 21 07:06:58 PM PDT 24 |
Jun 21 07:07:16 PM PDT 24 |
33933000 ps |
| T1195 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.686539979 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:06 PM PDT 24 |
25232500 ps |
| T351 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.1738943083 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:15:06 PM PDT 24 |
1379119100 ps |
| T1196 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.622033515 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
44952000 ps |
| T1197 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.950715057 |
|
|
Jun 21 07:06:59 PM PDT 24 |
Jun 21 07:07:24 PM PDT 24 |
174143900 ps |
| T1198 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.1938548657 |
|
|
Jun 21 07:07:12 PM PDT 24 |
Jun 21 07:07:35 PM PDT 24 |
54051800 ps |
| T1199 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.1523038885 |
|
|
Jun 21 07:07:10 PM PDT 24 |
Jun 21 07:07:33 PM PDT 24 |
510810700 ps |
| T1200 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.2409740396 |
|
|
Jun 21 07:06:47 PM PDT 24 |
Jun 21 07:07:05 PM PDT 24 |
41249400 ps |
| T1201 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.94556574 |
|
|
Jun 21 07:06:58 PM PDT 24 |
Jun 21 07:07:14 PM PDT 24 |
14893000 ps |
| T343 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.2161183758 |
|
|
Jun 21 07:07:04 PM PDT 24 |
Jun 21 07:15:03 PM PDT 24 |
321539100 ps |
| T1202 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.1645441856 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:24 PM PDT 24 |
43467800 ps |
| T1203 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.3586613728 |
|
|
Jun 21 07:07:21 PM PDT 24 |
Jun 21 07:07:41 PM PDT 24 |
67658700 ps |
| T1204 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.1222649778 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
42611900 ps |
| T1205 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.3080210963 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
43319000 ps |
| T1206 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.3504487359 |
|
|
Jun 21 07:06:46 PM PDT 24 |
Jun 21 07:07:01 PM PDT 24 |
95213900 ps |
| T1207 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.2767103817 |
|
|
Jun 21 07:07:06 PM PDT 24 |
Jun 21 07:07:28 PM PDT 24 |
38282600 ps |
| T1208 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.4114687094 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
50470000 ps |
| T1209 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.2840760945 |
|
|
Jun 21 07:07:12 PM PDT 24 |
Jun 21 07:07:33 PM PDT 24 |
35736500 ps |
| T348 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.3162663850 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:14:55 PM PDT 24 |
3407786600 ps |
| T1210 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.3258418239 |
|
|
Jun 21 07:06:53 PM PDT 24 |
Jun 21 07:07:12 PM PDT 24 |
14911900 ps |
| T1211 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.3255270519 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
14978800 ps |
| T345 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.362911874 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:22:42 PM PDT 24 |
739471200 ps |
| T1212 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.3907924538 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:07:36 PM PDT 24 |
36448100 ps |
| T1213 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.2534176490 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:07:00 PM PDT 24 |
162790500 ps |
| T1214 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.2727126656 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:47 PM PDT 24 |
227836100 ps |
| T347 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.1295160472 |
|
|
Jun 21 07:06:40 PM PDT 24 |
Jun 21 07:14:30 PM PDT 24 |
795076400 ps |
| T1215 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.1145399798 |
|
|
Jun 21 07:06:52 PM PDT 24 |
Jun 21 07:07:13 PM PDT 24 |
95663800 ps |
| T1216 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.3241926819 |
|
|
Jun 21 07:07:18 PM PDT 24 |
Jun 21 07:07:38 PM PDT 24 |
78868800 ps |
| T1217 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.2348526223 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:07:07 PM PDT 24 |
31271300 ps |
| T1218 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.690086045 |
|
|
Jun 21 07:07:11 PM PDT 24 |
Jun 21 07:07:34 PM PDT 24 |
37999100 ps |
| T1219 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.71743609 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:07:04 PM PDT 24 |
25294900 ps |
| T1220 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.3042312732 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:24 PM PDT 24 |
70236200 ps |
| T1221 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.3614067410 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:07:05 PM PDT 24 |
43657900 ps |
| T1222 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.4101587673 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:20 PM PDT 24 |
71813700 ps |
| T349 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.2625973376 |
|
|
Jun 21 07:06:47 PM PDT 24 |
Jun 21 07:22:00 PM PDT 24 |
772616900 ps |
| T1223 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.2734166666 |
|
|
Jun 21 07:06:52 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
50400300 ps |
| T1224 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.2216119848 |
|
|
Jun 21 07:07:02 PM PDT 24 |
Jun 21 07:07:26 PM PDT 24 |
12684200 ps |
| T1225 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.4208398852 |
|
|
Jun 21 07:07:14 PM PDT 24 |
Jun 21 07:07:35 PM PDT 24 |
30056300 ps |
| T279 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.3067050526 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:28 PM PDT 24 |
402885000 ps |
| T1226 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.3439752611 |
|
|
Jun 21 07:07:13 PM PDT 24 |
Jun 21 07:07:33 PM PDT 24 |
49102900 ps |
| T1227 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.2426979425 |
|
|
Jun 21 07:06:40 PM PDT 24 |
Jun 21 07:06:56 PM PDT 24 |
40731400 ps |
| T1228 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.1251666291 |
|
|
Jun 21 07:06:52 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
26450400 ps |
| T1229 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.142655221 |
|
|
Jun 21 07:07:12 PM PDT 24 |
Jun 21 07:07:31 PM PDT 24 |
18954100 ps |
| T1230 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.1897003972 |
|
|
Jun 21 07:07:14 PM PDT 24 |
Jun 21 07:07:33 PM PDT 24 |
100127200 ps |
| T1231 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.2693041849 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:24 PM PDT 24 |
161151900 ps |
| T1232 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.78379653 |
|
|
Jun 21 07:06:49 PM PDT 24 |
Jun 21 07:07:04 PM PDT 24 |
28022500 ps |
| T1233 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.4212009126 |
|
|
Jun 21 07:07:14 PM PDT 24 |
Jun 21 07:07:33 PM PDT 24 |
11758300 ps |
| T1234 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.1017940964 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:07:57 PM PDT 24 |
5922883700 ps |
| T1235 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.2221099176 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:13 PM PDT 24 |
652267700 ps |
| T1236 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.1883715814 |
|
|
Jun 21 07:07:04 PM PDT 24 |
Jun 21 07:15:02 PM PDT 24 |
1683735100 ps |
| T1237 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.1737924394 |
|
|
Jun 21 07:07:00 PM PDT 24 |
Jun 21 07:07:23 PM PDT 24 |
67278000 ps |
| T1238 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.1185735032 |
|
|
Jun 21 07:07:11 PM PDT 24 |
Jun 21 07:07:35 PM PDT 24 |
221164500 ps |
| T1239 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.2201689088 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:07:41 PM PDT 24 |
2550384500 ps |
| T1240 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.3499002450 |
|
|
Jun 21 07:06:43 PM PDT 24 |
Jun 21 07:07:06 PM PDT 24 |
88796400 ps |
| T1241 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.1434938294 |
|
|
Jun 21 07:06:59 PM PDT 24 |
Jun 21 07:07:22 PM PDT 24 |
17797400 ps |
| T1242 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.3454904061 |
|
|
Jun 21 07:06:59 PM PDT 24 |
Jun 21 07:07:22 PM PDT 24 |
21389800 ps |
| T1243 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.3307774438 |
|
|
Jun 21 07:07:01 PM PDT 24 |
Jun 21 07:07:25 PM PDT 24 |
37578000 ps |
| T247 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.2868887402 |
|
|
Jun 21 07:06:41 PM PDT 24 |
Jun 21 07:06:57 PM PDT 24 |
24688300 ps |
| T1244 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.1137475271 |
|
|
Jun 21 07:07:17 PM PDT 24 |
Jun 21 07:07:37 PM PDT 24 |
24437700 ps |
| T1245 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.1009012184 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:07:11 PM PDT 24 |
83289100 ps |
| T1246 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.1518209200 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:06 PM PDT 24 |
65692600 ps |
| T1247 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.2333874269 |
|
|
Jun 21 07:07:03 PM PDT 24 |
Jun 21 07:07:29 PM PDT 24 |
198754400 ps |
| T344 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.67479054 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:21:56 PM PDT 24 |
1381008900 ps |
| T1248 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.1366757228 |
|
|
Jun 21 07:06:51 PM PDT 24 |
Jun 21 07:07:08 PM PDT 24 |
35622200 ps |
| T352 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.326688230 |
|
|
Jun 21 07:07:14 PM PDT 24 |
Jun 21 07:20:12 PM PDT 24 |
1657909600 ps |
| T1249 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.4140593908 |
|
|
Jun 21 07:06:50 PM PDT 24 |
Jun 21 07:07:09 PM PDT 24 |
62299300 ps |
| T1250 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.3685786371 |
|
|
Jun 21 07:07:19 PM PDT 24 |
Jun 21 07:07:39 PM PDT 24 |
16380700 ps |