Unified Coverage Report :: Group :: flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
85.71	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_env_0.1/flash_ctrl_env_cov.sv

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Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	1	6	85.71

Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mp_err	1	0	1	100.00	100	1	1	0
cp_op_err	1	0	1	100.00	100	1	1	0
cp_prog_err	1	0	1	100.00	100	1	1	0
cp_prog_type_err	1	0	1	100.00	100	1	1	0
cp_prog_win_err	1	0	1	100.00	100	1	1	0
cp_rd_err	1	0	1	100.00	100	1	1	0
cp_update_err	1	1	0	0.00	100	1	1	0

Summary for Variable cp_mp_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mp_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	237304	1		T5	5652		T54	14417		T23	29

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Summary for Variable cp_op_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_op_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	4000	1		T4	200		T48	200		T151	200

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Summary for Variable cp_prog_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	15	1		T9	5		T10	5		T100	5

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Summary for Variable cp_prog_type_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_type_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	596	1		T92	142		T93	110		T94	96

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Summary for Variable cp_prog_win_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_win_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	294	1		T205	23		T206	15		T292	18

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Summary for Variable cp_rd_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_rd_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	119229	1		T5	2838		T54	8233		T28	1

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Summary for Variable cp_update_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for cp_update_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER
seen	0	1	1