Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
4494 |
1 |
|
T47 |
160 |
|
T48 |
199 |
|
T49 |
174 |
instr_types[0] |
5426 |
1 |
|
T47 |
339 |
|
T48 |
167 |
|
T49 |
291 |
instr_types[1] |
4221801 |
1 |
|
T1 |
257 |
|
T5 |
17193 |
|
T20 |
23 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for key_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4229617 |
1 |
|
T1 |
257 |
|
T5 |
17193 |
|
T20 |
23 |
auto[1] |
2104 |
1 |
|
T47 |
298 |
|
T48 |
229 |
|
T49 |
239 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for key_instr_cross
Bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4011 |
1 |
|
T47 |
51 |
|
T48 |
82 |
|
T49 |
145 |
auto[0] |
instr_types[0] |
4588 |
1 |
|
T47 |
232 |
|
T48 |
105 |
|
T49 |
177 |
auto[0] |
instr_types[1] |
4221018 |
1 |
|
T1 |
257 |
|
T5 |
17193 |
|
T20 |
23 |
auto[1] |
others |
483 |
1 |
|
T47 |
109 |
|
T48 |
117 |
|
T49 |
29 |
auto[1] |
instr_types[0] |
838 |
1 |
|
T47 |
107 |
|
T48 |
62 |
|
T49 |
114 |
auto[1] |
instr_types[1] |
783 |
1 |
|
T47 |
82 |
|
T48 |
50 |
|
T49 |
96 |