| T1078 |
/workspace/coverage/default/9.flash_ctrl_ro.1912273222 |
|
|
Jul 14 06:13:11 PM PDT 24 |
Jul 14 06:15:17 PM PDT 24 |
524889300 ps |
| T1079 |
/workspace/coverage/default/18.flash_ctrl_otp_reset.3717842324 |
|
|
Jul 14 06:15:33 PM PDT 24 |
Jul 14 06:17:46 PM PDT 24 |
143596700 ps |
| T1080 |
/workspace/coverage/default/8.flash_ctrl_mp_regions.1188665796 |
|
|
Jul 14 06:12:51 PM PDT 24 |
Jul 14 06:15:35 PM PDT 24 |
1817021400 ps |
| T1081 |
/workspace/coverage/default/31.flash_ctrl_smoke.2378048300 |
|
|
Jul 14 06:17:22 PM PDT 24 |
Jul 14 06:19:04 PM PDT 24 |
22513500 ps |
| T1082 |
/workspace/coverage/default/16.flash_ctrl_smoke.2782220195 |
|
|
Jul 14 06:15:00 PM PDT 24 |
Jul 14 06:16:18 PM PDT 24 |
46946200 ps |
| T1083 |
/workspace/coverage/default/4.flash_ctrl_prog_reset.971546399 |
|
|
Jul 14 06:11:37 PM PDT 24 |
Jul 14 06:11:51 PM PDT 24 |
24199800 ps |
| T1084 |
/workspace/coverage/default/8.flash_ctrl_rw_evict_all_en.3228145123 |
|
|
Jul 14 06:12:57 PM PDT 24 |
Jul 14 06:13:29 PM PDT 24 |
30377500 ps |
| T1085 |
/workspace/coverage/default/19.flash_ctrl_rw_evict_all_en.218730604 |
|
|
Jul 14 06:15:54 PM PDT 24 |
Jul 14 06:16:23 PM PDT 24 |
30823700 ps |
| T1086 |
/workspace/coverage/default/3.flash_ctrl_connect.2274365643 |
|
|
Jul 14 06:11:13 PM PDT 24 |
Jul 14 06:11:29 PM PDT 24 |
38658700 ps |
| T1087 |
/workspace/coverage/default/18.flash_ctrl_ro.1595062733 |
|
|
Jul 14 06:15:35 PM PDT 24 |
Jul 14 06:17:39 PM PDT 24 |
1905302400 ps |
| T1088 |
/workspace/coverage/default/28.flash_ctrl_smoke.1273688587 |
|
|
Jul 14 06:16:53 PM PDT 24 |
Jul 14 06:18:34 PM PDT 24 |
33723300 ps |
| T1089 |
/workspace/coverage/default/14.flash_ctrl_wo.2149129307 |
|
|
Jul 14 06:14:41 PM PDT 24 |
Jul 14 06:17:03 PM PDT 24 |
1883388300 ps |
| T371 |
/workspace/coverage/default/35.flash_ctrl_otp_reset.2727392931 |
|
|
Jul 14 06:17:42 PM PDT 24 |
Jul 14 06:19:54 PM PDT 24 |
133352400 ps |
| T1090 |
/workspace/coverage/default/8.flash_ctrl_error_prog_win.1239337621 |
|
|
Jul 14 06:12:52 PM PDT 24 |
Jul 14 06:25:49 PM PDT 24 |
611853900 ps |
| T1091 |
/workspace/coverage/default/6.flash_ctrl_error_mp.1037010831 |
|
|
Jul 14 06:12:15 PM PDT 24 |
Jul 14 06:49:59 PM PDT 24 |
5579267200 ps |
| T1092 |
/workspace/coverage/default/18.flash_ctrl_invalid_op.3420788733 |
|
|
Jul 14 06:15:35 PM PDT 24 |
Jul 14 06:17:10 PM PDT 24 |
3849328700 ps |
| T1093 |
/workspace/coverage/default/5.flash_ctrl_ro_derr.1256044601 |
|
|
Jul 14 06:12:00 PM PDT 24 |
Jul 14 06:14:31 PM PDT 24 |
1197951200 ps |
| T1094 |
/workspace/coverage/default/3.flash_ctrl_serr_address.4074964466 |
|
|
Jul 14 06:11:06 PM PDT 24 |
Jul 14 06:12:42 PM PDT 24 |
935861500 ps |
| T1095 |
/workspace/coverage/default/27.flash_ctrl_prog_reset.2031963172 |
|
|
Jul 14 06:16:48 PM PDT 24 |
Jul 14 06:17:03 PM PDT 24 |
39685900 ps |
| T1096 |
/workspace/coverage/default/2.flash_ctrl_mp_regions.3303033906 |
|
|
Jul 14 06:10:20 PM PDT 24 |
Jul 14 06:14:00 PM PDT 24 |
10562244000 ps |
| T1097 |
/workspace/coverage/default/2.flash_ctrl_intr_wr_slow_flash.895753571 |
|
|
Jul 14 06:10:37 PM PDT 24 |
Jul 14 06:14:00 PM PDT 24 |
38818900200 ps |
| T1098 |
/workspace/coverage/default/12.flash_ctrl_hw_read_seed_err.946887904 |
|
|
Jul 14 06:14:10 PM PDT 24 |
Jul 14 06:14:25 PM PDT 24 |
15416300 ps |
| T1099 |
/workspace/coverage/default/30.flash_ctrl_connect.1504817509 |
|
|
Jul 14 06:17:14 PM PDT 24 |
Jul 14 06:17:30 PM PDT 24 |
14931400 ps |
| T1100 |
/workspace/coverage/default/2.flash_ctrl_rd_intg.509041251 |
|
|
Jul 14 06:10:45 PM PDT 24 |
Jul 14 06:11:18 PM PDT 24 |
619163100 ps |
| T1101 |
/workspace/coverage/default/6.flash_ctrl_hw_rma_reset.3572721886 |
|
|
Jul 14 06:12:06 PM PDT 24 |
Jul 14 06:25:39 PM PDT 24 |
80138439600 ps |
| T1102 |
/workspace/coverage/default/30.flash_ctrl_smoke.2375502770 |
|
|
Jul 14 06:17:09 PM PDT 24 |
Jul 14 06:19:15 PM PDT 24 |
75806000 ps |
| T1103 |
/workspace/coverage/default/11.flash_ctrl_mp_regions.1005082098 |
|
|
Jul 14 06:13:49 PM PDT 24 |
Jul 14 06:18:46 PM PDT 24 |
42849881800 ps |
| T1104 |
/workspace/coverage/default/5.flash_ctrl_connect.1186420273 |
|
|
Jul 14 06:12:06 PM PDT 24 |
Jul 14 06:12:22 PM PDT 24 |
16746100 ps |
| T197 |
/workspace/coverage/default/0.flash_ctrl_rma_err.1572377411 |
|
|
Jul 14 06:09:59 PM PDT 24 |
Jul 14 06:25:09 PM PDT 24 |
40291979500 ps |
| T1105 |
/workspace/coverage/default/48.flash_ctrl_otp_reset.3604979307 |
|
|
Jul 14 06:18:42 PM PDT 24 |
Jul 14 06:20:56 PM PDT 24 |
51242200 ps |
| T1106 |
/workspace/coverage/default/3.flash_ctrl_mp_regions.1378525172 |
|
|
Jul 14 06:10:50 PM PDT 24 |
Jul 14 06:20:19 PM PDT 24 |
15524521500 ps |
| T1107 |
/workspace/coverage/default/58.flash_ctrl_otp_reset.2688780809 |
|
|
Jul 14 06:18:57 PM PDT 24 |
Jul 14 06:20:48 PM PDT 24 |
38073600 ps |
| T1108 |
/workspace/coverage/default/10.flash_ctrl_rand_ops.47171042 |
|
|
Jul 14 06:13:27 PM PDT 24 |
Jul 14 06:27:19 PM PDT 24 |
149842600 ps |
| T1109 |
/workspace/coverage/default/65.flash_ctrl_otp_reset.3203970558 |
|
|
Jul 14 06:19:02 PM PDT 24 |
Jul 14 06:21:15 PM PDT 24 |
67789200 ps |
| T1110 |
/workspace/coverage/default/79.flash_ctrl_otp_reset.558970154 |
|
|
Jul 14 06:19:18 PM PDT 24 |
Jul 14 06:21:28 PM PDT 24 |
41696500 ps |
| T198 |
/workspace/coverage/default/2.flash_ctrl_rma_err.2204115207 |
|
|
Jul 14 06:10:46 PM PDT 24 |
Jul 14 06:27:44 PM PDT 24 |
81487081700 ps |
| T1111 |
/workspace/coverage/default/22.flash_ctrl_sec_info_access.1713955326 |
|
|
Jul 14 06:16:17 PM PDT 24 |
Jul 14 06:17:24 PM PDT 24 |
1686384100 ps |
| T1112 |
/workspace/coverage/default/5.flash_ctrl_smoke.768662667 |
|
|
Jul 14 06:11:52 PM PDT 24 |
Jul 14 06:15:28 PM PDT 24 |
98078900 ps |
| T1113 |
/workspace/coverage/default/2.flash_ctrl_intr_wr.2078064900 |
|
|
Jul 14 06:10:32 PM PDT 24 |
Jul 14 06:11:42 PM PDT 24 |
2360861400 ps |
| T1114 |
/workspace/coverage/default/1.flash_ctrl_sw_op.3110339192 |
|
|
Jul 14 06:10:05 PM PDT 24 |
Jul 14 06:10:32 PM PDT 24 |
147799200 ps |
| T1115 |
/workspace/coverage/default/4.flash_ctrl_rw_evict_all_en.4256943486 |
|
|
Jul 14 06:11:37 PM PDT 24 |
Jul 14 06:12:08 PM PDT 24 |
61870300 ps |
| T69 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.1654101492 |
|
|
Jul 14 07:05:12 PM PDT 24 |
Jul 14 07:05:32 PM PDT 24 |
82180400 ps |
| T70 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.2796488389 |
|
|
Jul 14 07:05:03 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
194001800 ps |
| T1116 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.4013582009 |
|
|
Jul 14 07:04:45 PM PDT 24 |
Jul 14 07:04:59 PM PDT 24 |
12083900 ps |
| T260 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.865214890 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:17 PM PDT 24 |
49653000 ps |
| T1117 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.1077733932 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
25323000 ps |
| T1118 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.1504548669 |
|
|
Jul 14 07:05:20 PM PDT 24 |
Jul 14 07:05:36 PM PDT 24 |
22544400 ps |
| T100 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.3823505147 |
|
|
Jul 14 07:05:21 PM PDT 24 |
Jul 14 07:05:40 PM PDT 24 |
53895300 ps |
| T261 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.1291043110 |
|
|
Jul 14 07:05:33 PM PDT 24 |
Jul 14 07:05:48 PM PDT 24 |
29922900 ps |
| T71 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.1747282479 |
|
|
Jul 14 07:05:06 PM PDT 24 |
Jul 14 07:05:42 PM PDT 24 |
327659000 ps |
| T262 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.3829414420 |
|
|
Jul 14 07:05:28 PM PDT 24 |
Jul 14 07:05:42 PM PDT 24 |
18126300 ps |
| T101 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.4254301915 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:04:56 PM PDT 24 |
28838400 ps |
| T102 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.2997678681 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
90203200 ps |
| T103 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.3253177731 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:11:14 PM PDT 24 |
890060400 ps |
| T325 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.1451740527 |
|
|
Jul 14 07:05:27 PM PDT 24 |
Jul 14 07:05:42 PM PDT 24 |
32619200 ps |
| T258 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.2820736546 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:43 PM PDT 24 |
161412100 ps |
| T1119 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.498754374 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
64228200 ps |
| T257 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.2386038364 |
|
|
Jul 14 07:04:45 PM PDT 24 |
Jul 14 07:05:20 PM PDT 24 |
294709700 ps |
| T1120 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.3626513605 |
|
|
Jul 14 07:04:42 PM PDT 24 |
Jul 14 07:04:59 PM PDT 24 |
18002700 ps |
| T229 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.1470072013 |
|
|
Jul 14 07:04:57 PM PDT 24 |
Jul 14 07:05:16 PM PDT 24 |
138688400 ps |
| T313 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.687658639 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:15 PM PDT 24 |
56738200 ps |
| T326 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.2919321240 |
|
|
Jul 14 07:05:25 PM PDT 24 |
Jul 14 07:05:39 PM PDT 24 |
47594700 ps |
| T331 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.1611203506 |
|
|
Jul 14 07:05:27 PM PDT 24 |
Jul 14 07:05:41 PM PDT 24 |
25913900 ps |
| T329 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.863799722 |
|
|
Jul 14 07:04:55 PM PDT 24 |
Jul 14 07:05:10 PM PDT 24 |
17811800 ps |
| T1121 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.3814611481 |
|
|
Jul 14 07:04:51 PM PDT 24 |
Jul 14 07:05:08 PM PDT 24 |
23894900 ps |
| T327 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.1020095040 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:22 PM PDT 24 |
27283800 ps |
| T1122 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.2169643615 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:17 PM PDT 24 |
30693600 ps |
| T1123 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.1146987273 |
|
|
Jul 14 07:04:32 PM PDT 24 |
Jul 14 07:04:48 PM PDT 24 |
37662000 ps |
| T330 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.668992076 |
|
|
Jul 14 07:05:26 PM PDT 24 |
Jul 14 07:05:41 PM PDT 24 |
15405200 ps |
| T1124 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.4234927389 |
|
|
Jul 14 07:04:52 PM PDT 24 |
Jul 14 07:05:12 PM PDT 24 |
112904500 ps |
| T247 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.3475603773 |
|
|
Jul 14 07:04:45 PM PDT 24 |
Jul 14 07:05:00 PM PDT 24 |
19906100 ps |
| T230 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.2042902793 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
60251100 ps |
| T231 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.3930493502 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:16 PM PDT 24 |
53312900 ps |
| T1125 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.2518289860 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:11 PM PDT 24 |
32084100 ps |
| T328 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.701429419 |
|
|
Jul 14 07:05:33 PM PDT 24 |
Jul 14 07:05:47 PM PDT 24 |
25607800 ps |
| T232 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.2716813633 |
|
|
Jul 14 07:04:55 PM PDT 24 |
Jul 14 07:12:43 PM PDT 24 |
405282000 ps |
| T237 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.3834872813 |
|
|
Jul 14 07:04:44 PM PDT 24 |
Jul 14 07:05:02 PM PDT 24 |
68057900 ps |
| T1126 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.876224724 |
|
|
Jul 14 07:04:44 PM PDT 24 |
Jul 14 07:04:58 PM PDT 24 |
15262600 ps |
| T1127 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.3921072965 |
|
|
Jul 14 07:05:04 PM PDT 24 |
Jul 14 07:05:21 PM PDT 24 |
11387200 ps |
| T238 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.3986684343 |
|
|
Jul 14 07:04:39 PM PDT 24 |
Jul 14 07:04:56 PM PDT 24 |
33373400 ps |
| T301 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.3165520975 |
|
|
Jul 14 07:04:54 PM PDT 24 |
Jul 14 07:05:16 PM PDT 24 |
199218100 ps |
| T240 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.3611538637 |
|
|
Jul 14 07:04:35 PM PDT 24 |
Jul 14 07:11:04 PM PDT 24 |
688006000 ps |
| T302 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.205950453 |
|
|
Jul 14 07:04:44 PM PDT 24 |
Jul 14 07:05:00 PM PDT 24 |
204214600 ps |
| T1128 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.3597015784 |
|
|
Jul 14 07:05:06 PM PDT 24 |
Jul 14 07:05:20 PM PDT 24 |
19066300 ps |
| T1129 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.431579877 |
|
|
Jul 14 07:04:40 PM PDT 24 |
Jul 14 07:04:54 PM PDT 24 |
65765200 ps |
| T1130 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.4266158573 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:23 PM PDT 24 |
28603500 ps |
| T1131 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.1995323296 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:05:17 PM PDT 24 |
67240400 ps |
| T417 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.3077016890 |
|
|
Jul 14 07:04:34 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
27336600 ps |
| T239 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.1519041885 |
|
|
Jul 14 07:05:09 PM PDT 24 |
Jul 14 07:12:58 PM PDT 24 |
682607200 ps |
| T1132 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.349006993 |
|
|
Jul 14 07:04:44 PM PDT 24 |
Jul 14 07:05:31 PM PDT 24 |
160493600 ps |
| T242 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.4203799512 |
|
|
Jul 14 07:05:19 PM PDT 24 |
Jul 14 07:20:19 PM PDT 24 |
16938640800 ps |
| T1133 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.4235799894 |
|
|
Jul 14 07:05:04 PM PDT 24 |
Jul 14 07:05:26 PM PDT 24 |
1154146800 ps |
| T243 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.571760117 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:11:24 PM PDT 24 |
1998771200 ps |
| T241 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.2802983905 |
|
|
Jul 14 07:04:53 PM PDT 24 |
Jul 14 07:19:52 PM PDT 24 |
1331609300 ps |
| T1134 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.1923074822 |
|
|
Jul 14 07:05:04 PM PDT 24 |
Jul 14 07:05:21 PM PDT 24 |
40131900 ps |
| T259 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.3301362817 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:27 PM PDT 24 |
379728200 ps |
| T1135 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.436286984 |
|
|
Jul 14 07:05:33 PM PDT 24 |
Jul 14 07:05:47 PM PDT 24 |
14354900 ps |
| T1136 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.1591509574 |
|
|
Jul 14 07:05:04 PM PDT 24 |
Jul 14 07:05:26 PM PDT 24 |
322563700 ps |
| T350 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.2048891499 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:20:26 PM PDT 24 |
1417969500 ps |
| T1137 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.647907961 |
|
|
Jul 14 07:05:14 PM PDT 24 |
Jul 14 07:05:28 PM PDT 24 |
27566800 ps |
| T1138 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.2731814344 |
|
|
Jul 14 07:05:10 PM PDT 24 |
Jul 14 07:05:29 PM PDT 24 |
1229979700 ps |
| T1139 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.3450289344 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:23 PM PDT 24 |
21280600 ps |
| T1140 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.1368246101 |
|
|
Jul 14 07:05:31 PM PDT 24 |
Jul 14 07:05:46 PM PDT 24 |
270468400 ps |
| T1141 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.3626642492 |
|
|
Jul 14 07:05:26 PM PDT 24 |
Jul 14 07:05:41 PM PDT 24 |
25423500 ps |
| T1142 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.3595883684 |
|
|
Jul 14 07:05:06 PM PDT 24 |
Jul 14 07:05:24 PM PDT 24 |
92089400 ps |
| T1143 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.89741793 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:24 PM PDT 24 |
16311600 ps |
| T308 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.350019313 |
|
|
Jul 14 07:04:44 PM PDT 24 |
Jul 14 07:04:58 PM PDT 24 |
48092400 ps |
| T1144 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.605952797 |
|
|
Jul 14 07:04:52 PM PDT 24 |
Jul 14 07:05:06 PM PDT 24 |
20167600 ps |
| T269 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.2865930415 |
|
|
Jul 14 07:05:21 PM PDT 24 |
Jul 14 07:13:01 PM PDT 24 |
193099500 ps |
| T1145 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.2948970142 |
|
|
Jul 14 07:05:10 PM PDT 24 |
Jul 14 07:05:46 PM PDT 24 |
628263500 ps |
| T271 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.899174570 |
|
|
Jul 14 07:04:46 PM PDT 24 |
Jul 14 07:12:28 PM PDT 24 |
363959200 ps |
| T1146 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.2599425775 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:45 PM PDT 24 |
955708400 ps |
| T303 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.445380749 |
|
|
Jul 14 07:05:01 PM PDT 24 |
Jul 14 07:05:22 PM PDT 24 |
122607700 ps |
| T1147 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.3446505630 |
|
|
Jul 14 07:04:58 PM PDT 24 |
Jul 14 07:05:12 PM PDT 24 |
43098400 ps |
| T1148 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.3400329236 |
|
|
Jul 14 07:05:33 PM PDT 24 |
Jul 14 07:05:48 PM PDT 24 |
15213700 ps |
| T1149 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.380101231 |
|
|
Jul 14 07:05:20 PM PDT 24 |
Jul 14 07:05:34 PM PDT 24 |
25235500 ps |
| T1150 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.3569487137 |
|
|
Jul 14 07:05:00 PM PDT 24 |
Jul 14 07:05:15 PM PDT 24 |
32281300 ps |
| T1151 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.586904575 |
|
|
Jul 14 07:05:33 PM PDT 24 |
Jul 14 07:05:48 PM PDT 24 |
32453600 ps |
| T274 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.3913774549 |
|
|
Jul 14 07:05:09 PM PDT 24 |
Jul 14 07:05:27 PM PDT 24 |
45193200 ps |
| T1152 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.1193233024 |
|
|
Jul 14 07:04:50 PM PDT 24 |
Jul 14 07:05:08 PM PDT 24 |
25598400 ps |
| T1153 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.3249750928 |
|
|
Jul 14 07:05:22 PM PDT 24 |
Jul 14 07:05:36 PM PDT 24 |
17322600 ps |
| T267 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.199060009 |
|
|
Jul 14 07:05:15 PM PDT 24 |
Jul 14 07:20:17 PM PDT 24 |
3869682400 ps |
| T1154 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.1486635641 |
|
|
Jul 14 07:04:49 PM PDT 24 |
Jul 14 07:05:03 PM PDT 24 |
19753200 ps |
| T304 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.1418844585 |
|
|
Jul 14 07:04:51 PM PDT 24 |
Jul 14 07:05:55 PM PDT 24 |
3215430200 ps |
| T1155 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.3873114442 |
|
|
Jul 14 07:04:40 PM PDT 24 |
Jul 14 07:04:56 PM PDT 24 |
46524800 ps |
| T324 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.2271825700 |
|
|
Jul 14 07:04:59 PM PDT 24 |
Jul 14 07:05:17 PM PDT 24 |
130659800 ps |
| T1156 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.1314978897 |
|
|
Jul 14 07:04:48 PM PDT 24 |
Jul 14 07:05:04 PM PDT 24 |
12307900 ps |
| T1157 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.454428408 |
|
|
Jul 14 07:05:21 PM PDT 24 |
Jul 14 07:05:37 PM PDT 24 |
22038500 ps |
| T1158 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.3287219899 |
|
|
Jul 14 07:04:57 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
174727700 ps |
| T1159 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.4294823622 |
|
|
Jul 14 07:04:50 PM PDT 24 |
Jul 14 07:05:08 PM PDT 24 |
105327700 ps |
| T1160 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.1865249710 |
|
|
Jul 14 07:05:30 PM PDT 24 |
Jul 14 07:05:45 PM PDT 24 |
30969500 ps |
| T248 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.1032027340 |
|
|
Jul 14 07:04:40 PM PDT 24 |
Jul 14 07:04:54 PM PDT 24 |
17374700 ps |
| T1161 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.1143996521 |
|
|
Jul 14 07:05:29 PM PDT 24 |
Jul 14 07:05:47 PM PDT 24 |
466262900 ps |
| T1162 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.181121474 |
|
|
Jul 14 07:05:05 PM PDT 24 |
Jul 14 07:05:20 PM PDT 24 |
27208500 ps |
| T305 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.398242481 |
|
|
Jul 14 07:05:06 PM PDT 24 |
Jul 14 07:05:21 PM PDT 24 |
36743500 ps |
| T306 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.3831654452 |
|
|
Jul 14 07:04:51 PM PDT 24 |
Jul 14 07:05:10 PM PDT 24 |
348567300 ps |
| T1163 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.4072596215 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:10 PM PDT 24 |
54542100 ps |
| T307 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.3429588050 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
55707800 ps |
| T1164 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.1919000623 |
|
|
Jul 14 07:05:03 PM PDT 24 |
Jul 14 07:05:22 PM PDT 24 |
99184500 ps |
| T270 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.2140260631 |
|
|
Jul 14 07:04:51 PM PDT 24 |
Jul 14 07:05:10 PM PDT 24 |
329109800 ps |
| T1165 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.3394035783 |
|
|
Jul 14 07:05:09 PM PDT 24 |
Jul 14 07:05:28 PM PDT 24 |
68078200 ps |
| T1166 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.4210212196 |
|
|
Jul 14 07:05:36 PM PDT 24 |
Jul 14 07:05:50 PM PDT 24 |
18869800 ps |
| T263 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.2370185768 |
|
|
Jul 14 07:05:09 PM PDT 24 |
Jul 14 07:05:30 PM PDT 24 |
47741100 ps |
| T1167 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.2387261825 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
340570000 ps |
| T266 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.1259219193 |
|
|
Jul 14 07:05:01 PM PDT 24 |
Jul 14 07:05:18 PM PDT 24 |
30053100 ps |
| T1168 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.2801559866 |
|
|
Jul 14 07:05:14 PM PDT 24 |
Jul 14 07:05:31 PM PDT 24 |
11322300 ps |
| T1169 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.139811823 |
|
|
Jul 14 07:04:54 PM PDT 24 |
Jul 14 07:05:33 PM PDT 24 |
2591868700 ps |
| T1170 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.4171891573 |
|
|
Jul 14 07:05:37 PM PDT 24 |
Jul 14 07:05:51 PM PDT 24 |
15428000 ps |
| T1171 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.1478576258 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:05:24 PM PDT 24 |
1107045400 ps |
| T1172 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.2634525159 |
|
|
Jul 14 07:05:28 PM PDT 24 |
Jul 14 07:05:47 PM PDT 24 |
133973200 ps |
| T1173 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.1157357405 |
|
|
Jul 14 07:05:11 PM PDT 24 |
Jul 14 07:05:28 PM PDT 24 |
26079300 ps |
| T1174 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.2581417791 |
|
|
Jul 14 07:05:26 PM PDT 24 |
Jul 14 07:05:40 PM PDT 24 |
39992200 ps |
| T1175 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.261589297 |
|
|
Jul 14 07:05:05 PM PDT 24 |
Jul 14 07:05:21 PM PDT 24 |
25454800 ps |
| T1176 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.2944790385 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
13702600 ps |
| T353 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.2757649559 |
|
|
Jul 14 07:05:05 PM PDT 24 |
Jul 14 07:12:47 PM PDT 24 |
342726000 ps |
| T1177 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.824455577 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
20598500 ps |
| T264 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.2586968178 |
|
|
Jul 14 07:05:01 PM PDT 24 |
Jul 14 07:05:18 PM PDT 24 |
129104100 ps |
| T249 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.1153580857 |
|
|
Jul 14 07:04:42 PM PDT 24 |
Jul 14 07:04:56 PM PDT 24 |
81647700 ps |
| T1178 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.2009721874 |
|
|
Jul 14 07:05:34 PM PDT 24 |
Jul 14 07:05:48 PM PDT 24 |
17765200 ps |
| T265 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.4085154916 |
|
|
Jul 14 07:04:39 PM PDT 24 |
Jul 14 07:04:56 PM PDT 24 |
57225600 ps |
| T309 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.3259343158 |
|
|
Jul 14 07:05:22 PM PDT 24 |
Jul 14 07:05:40 PM PDT 24 |
76820100 ps |
| T1179 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.3109349605 |
|
|
Jul 14 07:04:58 PM PDT 24 |
Jul 14 07:05:16 PM PDT 24 |
35981800 ps |
| T1180 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.4104366272 |
|
|
Jul 14 07:05:20 PM PDT 24 |
Jul 14 07:05:35 PM PDT 24 |
197148300 ps |
| T268 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.1657558916 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:26 PM PDT 24 |
39173800 ps |
| T1181 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.1290980091 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:18 PM PDT 24 |
211595600 ps |
| T1182 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.90891169 |
|
|
Jul 14 07:04:59 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
55886700 ps |
| T1183 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.2011105497 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:05:22 PM PDT 24 |
13280300 ps |
| T1184 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.565936929 |
|
|
Jul 14 07:05:32 PM PDT 24 |
Jul 14 07:05:46 PM PDT 24 |
103975400 ps |
| T1185 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.2192543628 |
|
|
Jul 14 07:05:09 PM PDT 24 |
Jul 14 07:05:27 PM PDT 24 |
40479500 ps |
| T310 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.2184323162 |
|
|
Jul 14 07:05:04 PM PDT 24 |
Jul 14 07:05:24 PM PDT 24 |
432145500 ps |
| T1186 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.2240393557 |
|
|
Jul 14 07:05:13 PM PDT 24 |
Jul 14 07:05:29 PM PDT 24 |
12735900 ps |
| T1187 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.4690783 |
|
|
Jul 14 07:05:25 PM PDT 24 |
Jul 14 07:05:39 PM PDT 24 |
28612600 ps |
| T1188 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.742380646 |
|
|
Jul 14 07:04:52 PM PDT 24 |
Jul 14 07:05:08 PM PDT 24 |
72670900 ps |
| T311 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.1177998193 |
|
|
Jul 14 07:04:46 PM PDT 24 |
Jul 14 07:05:32 PM PDT 24 |
47478100 ps |
| T1189 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.905733760 |
|
|
Jul 14 07:04:40 PM PDT 24 |
Jul 14 07:04:57 PM PDT 24 |
51758500 ps |
| T275 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.1103512369 |
|
|
Jul 14 07:04:31 PM PDT 24 |
Jul 14 07:04:50 PM PDT 24 |
449421600 ps |
| T1190 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.3561481515 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:05:12 PM PDT 24 |
50621000 ps |
| T1191 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.2975690772 |
|
|
Jul 14 07:05:04 PM PDT 24 |
Jul 14 07:05:23 PM PDT 24 |
27272200 ps |
| T273 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.2165047108 |
|
|
Jul 14 07:05:09 PM PDT 24 |
Jul 14 07:05:27 PM PDT 24 |
81572600 ps |
| T1192 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.443297865 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:04:55 PM PDT 24 |
47193700 ps |
| T1193 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.720561229 |
|
|
Jul 14 07:04:56 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
14991500 ps |
| T1194 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.1581354088 |
|
|
Jul 14 07:04:57 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
117095500 ps |
| T1195 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.3245451390 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:17 PM PDT 24 |
14773900 ps |
| T1196 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.3525333699 |
|
|
Jul 14 07:05:09 PM PDT 24 |
Jul 14 07:05:26 PM PDT 24 |
32462400 ps |
| T1197 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.697607858 |
|
|
Jul 14 07:04:38 PM PDT 24 |
Jul 14 07:04:52 PM PDT 24 |
19644800 ps |
| T1198 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.2846186467 |
|
|
Jul 14 07:05:30 PM PDT 24 |
Jul 14 07:05:44 PM PDT 24 |
18380000 ps |
| T1199 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.2534959344 |
|
|
Jul 14 07:05:25 PM PDT 24 |
Jul 14 07:05:39 PM PDT 24 |
143873600 ps |
| T1200 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.3716491259 |
|
|
Jul 14 07:05:10 PM PDT 24 |
Jul 14 07:05:24 PM PDT 24 |
71259100 ps |
| T1201 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.826200240 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:22 PM PDT 24 |
17616500 ps |
| T1202 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.3826883425 |
|
|
Jul 14 07:05:15 PM PDT 24 |
Jul 14 07:05:32 PM PDT 24 |
18651300 ps |
| T1203 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.533492338 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:16 PM PDT 24 |
14795400 ps |
| T1204 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.1084999441 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:22 PM PDT 24 |
87261600 ps |
| T1205 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.370005630 |
|
|
Jul 14 07:04:59 PM PDT 24 |
Jul 14 07:05:14 PM PDT 24 |
51817000 ps |
| T1206 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.1070713739 |
|
|
Jul 14 07:05:23 PM PDT 24 |
Jul 14 07:05:40 PM PDT 24 |
101787000 ps |
| T1207 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.1988878694 |
|
|
Jul 14 07:05:23 PM PDT 24 |
Jul 14 07:05:44 PM PDT 24 |
153975700 ps |
| T1208 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.1120439899 |
|
|
Jul 14 07:04:32 PM PDT 24 |
Jul 14 07:04:49 PM PDT 24 |
44207100 ps |
| T272 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.1119956187 |
|
|
Jul 14 07:04:51 PM PDT 24 |
Jul 14 07:05:08 PM PDT 24 |
103544900 ps |
| T349 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.1547264627 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:12:44 PM PDT 24 |
357575700 ps |
| T1209 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.1210076017 |
|
|
Jul 14 07:04:47 PM PDT 24 |
Jul 14 07:05:05 PM PDT 24 |
197294700 ps |
| T355 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.3756542725 |
|
|
Jul 14 07:05:08 PM PDT 24 |
Jul 14 07:11:33 PM PDT 24 |
339133100 ps |
| T1210 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.3981940658 |
|
|
Jul 14 07:05:29 PM PDT 24 |
Jul 14 07:05:43 PM PDT 24 |
57884200 ps |
| T1211 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.190313270 |
|
|
Jul 14 07:04:52 PM PDT 24 |
Jul 14 07:05:09 PM PDT 24 |
21822500 ps |
| T1212 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.704882189 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:20 PM PDT 24 |
20726200 ps |
| T348 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.1920087955 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:17:51 PM PDT 24 |
3055061200 ps |
| T1213 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.4228962272 |
|
|
Jul 14 07:04:47 PM PDT 24 |
Jul 14 07:05:06 PM PDT 24 |
57849800 ps |
| T312 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.645861023 |
|
|
Jul 14 07:05:28 PM PDT 24 |
Jul 14 07:05:44 PM PDT 24 |
65857000 ps |
| T250 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.2785186610 |
|
|
Jul 14 07:04:31 PM PDT 24 |
Jul 14 07:04:46 PM PDT 24 |
20320100 ps |
| T1214 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.2503493361 |
|
|
Jul 14 07:04:34 PM PDT 24 |
Jul 14 07:04:48 PM PDT 24 |
219476300 ps |
| T1215 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.1544034418 |
|
|
Jul 14 07:05:26 PM PDT 24 |
Jul 14 07:05:40 PM PDT 24 |
29391900 ps |
| T1216 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.4252511751 |
|
|
Jul 14 07:04:35 PM PDT 24 |
Jul 14 07:04:53 PM PDT 24 |
335859100 ps |
| T1217 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.3854667936 |
|
|
Jul 14 07:05:31 PM PDT 24 |
Jul 14 07:05:45 PM PDT 24 |
171650500 ps |
| T1218 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.1847801653 |
|
|
Jul 14 07:04:46 PM PDT 24 |
Jul 14 07:05:04 PM PDT 24 |
148360200 ps |
| T347 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.1596329086 |
|
|
Jul 14 07:05:06 PM PDT 24 |
Jul 14 07:20:25 PM PDT 24 |
345830200 ps |
| T1219 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.1229537045 |
|
|
Jul 14 07:04:58 PM PDT 24 |
Jul 14 07:05:28 PM PDT 24 |
63440100 ps |
| T1220 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.1903302513 |
|
|
Jul 14 07:05:30 PM PDT 24 |
Jul 14 07:05:44 PM PDT 24 |
50460100 ps |
| T1221 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.2670916837 |
|
|
Jul 14 07:04:43 PM PDT 24 |
Jul 14 07:05:49 PM PDT 24 |
3262188300 ps |
| T1222 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.2653590693 |
|
|
Jul 14 07:05:04 PM PDT 24 |
Jul 14 07:05:19 PM PDT 24 |
15962300 ps |
| T1223 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.228894111 |
|
|
Jul 14 07:04:59 PM PDT 24 |
Jul 14 07:05:16 PM PDT 24 |
159956400 ps |
| T1224 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.1776468353 |
|
|
Jul 14 07:05:25 PM PDT 24 |
Jul 14 07:05:44 PM PDT 24 |
64851900 ps |
| T1225 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.2915856497 |
|
|
Jul 14 07:04:42 PM PDT 24 |
Jul 14 07:04:59 PM PDT 24 |
38322500 ps |
| T1226 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.1922051272 |
|
|
Jul 14 07:05:10 PM PDT 24 |
Jul 14 07:05:27 PM PDT 24 |
13223300 ps |
| T1227 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.34267837 |
|
|
Jul 14 07:04:42 PM PDT 24 |
Jul 14 07:04:56 PM PDT 24 |
40697300 ps |
| T1228 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.2095826088 |
|
|
Jul 14 07:05:33 PM PDT 24 |
Jul 14 07:05:48 PM PDT 24 |
16858900 ps |
| T351 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.3312049824 |
|
|
Jul 14 07:04:45 PM PDT 24 |
Jul 14 07:11:10 PM PDT 24 |
962985400 ps |
| T1229 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.3967688226 |
|
|
Jul 14 07:05:14 PM PDT 24 |
Jul 14 07:05:31 PM PDT 24 |
36262200 ps |
| T1230 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.2214692140 |
|
|
Jul 14 07:05:12 PM PDT 24 |
Jul 14 07:05:26 PM PDT 24 |
14348100 ps |
| T1231 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.3842749424 |
|
|
Jul 14 07:05:36 PM PDT 24 |
Jul 14 07:05:50 PM PDT 24 |
43313800 ps |
| T1232 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.4028915664 |
|
|
Jul 14 07:05:37 PM PDT 24 |
Jul 14 07:05:51 PM PDT 24 |
16186300 ps |
| T352 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.3663460898 |
|
|
Jul 14 07:05:05 PM PDT 24 |
Jul 14 07:20:01 PM PDT 24 |
1634580400 ps |
| T1233 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.1093065248 |
|
|
Jul 14 07:04:55 PM PDT 24 |
Jul 14 07:05:14 PM PDT 24 |
27783300 ps |
| T1234 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.427764711 |
|
|
Jul 14 07:04:38 PM PDT 24 |
Jul 14 07:05:13 PM PDT 24 |
69102500 ps |
| T1235 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.3250903130 |
|
|
Jul 14 07:04:33 PM PDT 24 |
Jul 14 07:04:46 PM PDT 24 |
15348100 ps |
| T1236 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.3354099966 |
|
|
Jul 14 07:05:05 PM PDT 24 |
Jul 14 07:05:25 PM PDT 24 |
99669000 ps |
| T1237 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.3899655337 |
|
|
Jul 14 07:05:21 PM PDT 24 |
Jul 14 07:05:38 PM PDT 24 |
30233900 ps |
| T1238 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.3302018746 |
|
|
Jul 14 07:04:50 PM PDT 24 |
Jul 14 07:05:08 PM PDT 24 |
65242300 ps |
| T1239 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.3879556066 |
|
|
Jul 14 07:05:30 PM PDT 24 |
Jul 14 07:05:44 PM PDT 24 |
68039400 ps |
| T1240 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.750508854 |
|
|
Jul 14 07:05:07 PM PDT 24 |
Jul 14 07:05:24 PM PDT 24 |
25507500 ps |
| T1241 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.816199541 |
|
|
Jul 14 07:04:47 PM PDT 24 |
Jul 14 07:05:01 PM PDT 24 |
56948700 ps |
| T1242 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.3036149750 |
|
|
Jul 14 07:05:15 PM PDT 24 |
Jul 14 07:05:34 PM PDT 24 |
74691600 ps |
| T1243 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.4099981789 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:04:59 PM PDT 24 |
13786700 ps |
| T1244 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.3080132468 |
|
|
Jul 14 07:05:12 PM PDT 24 |
Jul 14 07:05:29 PM PDT 24 |
662996500 ps |
| T1245 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.3337163873 |
|
|
Jul 14 07:05:05 PM PDT 24 |
Jul 14 07:05:22 PM PDT 24 |
13021300 ps |
| T1246 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.2688849737 |
|
|
Jul 14 07:04:44 PM PDT 24 |
Jul 14 07:05:49 PM PDT 24 |
1678476700 ps |
| T276 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.1696208285 |
|
|
Jul 14 07:04:58 PM PDT 24 |
Jul 14 07:12:40 PM PDT 24 |
688355600 ps |
| T1247 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.2922326390 |
|
|
Jul 14 07:04:41 PM PDT 24 |
Jul 14 07:06:00 PM PDT 24 |
8394946200 ps |
| T1248 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.4222263046 |
|
|
Jul 14 07:04:48 PM PDT 24 |
Jul 14 07:05:44 PM PDT 24 |
639855700 ps |
| T1249 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.2406078113 |
|
|
Jul 14 07:04:52 PM PDT 24 |
Jul 14 07:05:43 PM PDT 24 |
7293276700 ps |
| T1250 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.3357815370 |
|
|
Jul 14 07:05:00 PM PDT 24 |
Jul 14 07:05:16 PM PDT 24 |
14514900 ps |
| T1251 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.1795074038 |
|
|
Jul 14 07:05:02 PM PDT 24 |
Jul 14 07:05:20 PM PDT 24 |
36913500 ps |
| T1252 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.408702806 |
|
|
Jul 14 07:04:39 PM PDT 24 |
Jul 14 07:05:31 PM PDT 24 |
453462900 ps |