Summary for Variable instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for instr_type_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| others | 
4911 | 
1 | 
 | 
T49 | 
103 | 
 | 
T50 | 
193 | 
 | 
T51 | 
189 | 
| instr_types[0] | 
5987 | 
1 | 
 | 
T49 | 
202 | 
 | 
T50 | 
283 | 
 | 
T51 | 
293 | 
| instr_types[1] | 
4104182 | 
1 | 
 | 
T4 | 
16396 | 
 | 
T23 | 
24 | 
 | 
T21 | 
10 | 
Summary for Variable key_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for key_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4112892 | 
1 | 
 | 
T4 | 
16396 | 
 | 
T23 | 
24 | 
 | 
T21 | 
10 | 
| auto[1] | 
2188 | 
1 | 
 | 
T49 | 
179 | 
 | 
T50 | 
235 | 
 | 
T51 | 
255 | 
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
6 | 
0 | 
6 | 
100.00 | 
 | 
Automatically Generated Cross Bins for key_instr_cross
Bins
| key_cp | instr_type_cp | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
others | 
4463 | 
1 | 
 | 
T49 | 
49 | 
 | 
T50 | 
86 | 
 | 
T51 | 
165 | 
| auto[0] | 
instr_types[0] | 
5140 | 
1 | 
 | 
T49 | 
122 | 
 | 
T50 | 
200 | 
 | 
T51 | 
180 | 
| auto[0] | 
instr_types[1] | 
4103289 | 
1 | 
 | 
T4 | 
16396 | 
 | 
T23 | 
24 | 
 | 
T21 | 
10 | 
| auto[1] | 
others | 
448 | 
1 | 
 | 
T49 | 
54 | 
 | 
T50 | 
107 | 
 | 
T51 | 
24 | 
| auto[1] | 
instr_types[0] | 
847 | 
1 | 
 | 
T49 | 
80 | 
 | 
T50 | 
83 | 
 | 
T51 | 
113 | 
| auto[1] | 
instr_types[1] | 
893 | 
1 | 
 | 
T49 | 
45 | 
 | 
T50 | 
45 | 
 | 
T51 | 
118 |