| T1083 |
/workspace/coverage/default/12.flash_ctrl_rand_ops.1439722758 |
|
|
Aug 01 07:36:22 PM PDT 24 |
Aug 01 07:58:29 PM PDT 24 |
867456300 ps |
| T1084 |
/workspace/coverage/default/27.flash_ctrl_alert_test.3926270100 |
|
|
Aug 01 07:39:48 PM PDT 24 |
Aug 01 07:40:02 PM PDT 24 |
51279100 ps |
| T375 |
/workspace/coverage/default/7.flash_ctrl_sec_info_access.169510604 |
|
|
Aug 01 07:34:35 PM PDT 24 |
Aug 01 07:35:51 PM PDT 24 |
3012932600 ps |
| T1085 |
/workspace/coverage/default/2.flash_ctrl_rand_ops.1470561050 |
|
|
Aug 01 07:30:45 PM PDT 24 |
Aug 01 07:37:51 PM PDT 24 |
300743600 ps |
| T1086 |
/workspace/coverage/default/13.flash_ctrl_smoke.1506166398 |
|
|
Aug 01 07:36:41 PM PDT 24 |
Aug 01 07:38:44 PM PDT 24 |
85028900 ps |
| T1087 |
/workspace/coverage/default/22.flash_ctrl_sec_info_access.3050919132 |
|
|
Aug 01 07:39:30 PM PDT 24 |
Aug 01 07:40:54 PM PDT 24 |
9956515100 ps |
| T1088 |
/workspace/coverage/default/16.flash_ctrl_hw_rma_reset.479845167 |
|
|
Aug 01 07:37:22 PM PDT 24 |
Aug 01 07:51:30 PM PDT 24 |
270218335200 ps |
| T1089 |
/workspace/coverage/default/19.flash_ctrl_rw_evict_all_en.2861416054 |
|
|
Aug 01 07:38:59 PM PDT 24 |
Aug 01 07:39:28 PM PDT 24 |
44385600 ps |
| T401 |
/workspace/coverage/default/3.flash_ctrl_re_evict.4236420665 |
|
|
Aug 01 07:32:07 PM PDT 24 |
Aug 01 07:32:41 PM PDT 24 |
235082600 ps |
| T1090 |
/workspace/coverage/default/5.flash_ctrl_fetch_code.1353039389 |
|
|
Aug 01 07:33:47 PM PDT 24 |
Aug 01 07:34:14 PM PDT 24 |
933125600 ps |
| T1091 |
/workspace/coverage/default/32.flash_ctrl_smoke.3760676380 |
|
|
Aug 01 07:40:22 PM PDT 24 |
Aug 01 07:41:38 PM PDT 24 |
70103600 ps |
| T1092 |
/workspace/coverage/default/32.flash_ctrl_disable.388004591 |
|
|
Aug 01 07:40:45 PM PDT 24 |
Aug 01 07:41:08 PM PDT 24 |
84956900 ps |
| T287 |
/workspace/coverage/default/3.flash_ctrl_rd_buff_evict.1547176732 |
|
|
Aug 01 07:31:37 PM PDT 24 |
Aug 01 07:34:09 PM PDT 24 |
916319800 ps |
| T1093 |
/workspace/coverage/default/37.flash_ctrl_rw_evict_all_en.3091521136 |
|
|
Aug 01 07:41:04 PM PDT 24 |
Aug 01 07:41:35 PM PDT 24 |
27225200 ps |
| T1094 |
/workspace/coverage/default/36.flash_ctrl_intr_rd_slow_flash.580037384 |
|
|
Aug 01 07:41:03 PM PDT 24 |
Aug 01 07:46:27 PM PDT 24 |
24821059800 ps |
| T1095 |
/workspace/coverage/default/42.flash_ctrl_connect.4054750262 |
|
|
Aug 01 07:41:33 PM PDT 24 |
Aug 01 07:41:49 PM PDT 24 |
17493400 ps |
| T1096 |
/workspace/coverage/default/0.flash_ctrl_host_dir_rd.1343066745 |
|
|
Aug 01 07:27:52 PM PDT 24 |
Aug 01 07:29:54 PM PDT 24 |
273642200 ps |
| T1097 |
/workspace/coverage/default/32.flash_ctrl_otp_reset.1963654892 |
|
|
Aug 01 07:40:22 PM PDT 24 |
Aug 01 07:42:34 PM PDT 24 |
40657200 ps |
| T1098 |
/workspace/coverage/default/31.flash_ctrl_smoke.577687073 |
|
|
Aug 01 07:40:22 PM PDT 24 |
Aug 01 07:42:01 PM PDT 24 |
47102000 ps |
| T1099 |
/workspace/coverage/default/2.flash_ctrl_hw_rma_reset.2799129729 |
|
|
Aug 01 07:30:46 PM PDT 24 |
Aug 01 07:43:36 PM PDT 24 |
40123143200 ps |
| T1100 |
/workspace/coverage/default/25.flash_ctrl_alert_test.4282538942 |
|
|
Aug 01 07:39:51 PM PDT 24 |
Aug 01 07:40:04 PM PDT 24 |
49869100 ps |
| T288 |
/workspace/coverage/default/14.flash_ctrl_rw.4022604262 |
|
|
Aug 01 07:36:54 PM PDT 24 |
Aug 01 07:46:03 PM PDT 24 |
14027053100 ps |
| T209 |
/workspace/coverage/default/3.flash_ctrl_ro_derr.3111823323 |
|
|
Aug 01 07:31:51 PM PDT 24 |
Aug 01 07:34:12 PM PDT 24 |
1137005200 ps |
| T1101 |
/workspace/coverage/default/17.flash_ctrl_hw_sec_otp.2006155514 |
|
|
Aug 01 07:37:40 PM PDT 24 |
Aug 01 07:39:54 PM PDT 24 |
3724642700 ps |
| T1102 |
/workspace/coverage/default/12.flash_ctrl_re_evict.444914137 |
|
|
Aug 01 07:36:23 PM PDT 24 |
Aug 01 07:36:57 PM PDT 24 |
61744900 ps |
| T420 |
/workspace/coverage/default/1.flash_ctrl_fs_sup.4046544656 |
|
|
Aug 01 07:30:21 PM PDT 24 |
Aug 01 07:31:04 PM PDT 24 |
622930000 ps |
| T1103 |
/workspace/coverage/default/14.flash_ctrl_hw_sec_otp.1672838739 |
|
|
Aug 01 07:36:54 PM PDT 24 |
Aug 01 07:39:49 PM PDT 24 |
9713121600 ps |
| T1104 |
/workspace/coverage/default/4.flash_ctrl_lcmgr_intg.259508059 |
|
|
Aug 01 07:33:13 PM PDT 24 |
Aug 01 07:33:26 PM PDT 24 |
15768700 ps |
| T1105 |
/workspace/coverage/default/1.flash_ctrl_rw_serr.3267283357 |
|
|
Aug 01 07:29:41 PM PDT 24 |
Aug 01 07:32:52 PM PDT 24 |
2246002600 ps |
| T1106 |
/workspace/coverage/default/20.flash_ctrl_intr_rd_slow_flash.1041653031 |
|
|
Aug 01 07:39:01 PM PDT 24 |
Aug 01 07:41:27 PM PDT 24 |
5997538100 ps |
| T1107 |
/workspace/coverage/default/0.flash_ctrl_oversize_error.509610348 |
|
|
Aug 01 07:28:28 PM PDT 24 |
Aug 01 07:31:36 PM PDT 24 |
4906722900 ps |
| T1108 |
/workspace/coverage/default/0.flash_ctrl_hw_prog_rma_wipe_err.564031301 |
|
|
Aug 01 07:28:48 PM PDT 24 |
Aug 01 07:30:42 PM PDT 24 |
10012662200 ps |
| T1109 |
/workspace/coverage/default/37.flash_ctrl_hw_sec_otp.3238356686 |
|
|
Aug 01 07:41:00 PM PDT 24 |
Aug 01 07:42:23 PM PDT 24 |
2193998700 ps |
| T212 |
/workspace/coverage/default/0.flash_ctrl_integrity.2207538034 |
|
|
Aug 01 07:28:27 PM PDT 24 |
Aug 01 07:37:06 PM PDT 24 |
33238413100 ps |
| T1110 |
/workspace/coverage/default/11.flash_ctrl_rw_evict.523858561 |
|
|
Aug 01 07:36:05 PM PDT 24 |
Aug 01 07:36:35 PM PDT 24 |
93362000 ps |
| T1111 |
/workspace/coverage/default/17.flash_ctrl_invalid_op.811583617 |
|
|
Aug 01 07:37:57 PM PDT 24 |
Aug 01 07:39:35 PM PDT 24 |
4027691000 ps |
| T1112 |
/workspace/coverage/default/14.flash_ctrl_hw_read_seed_err.1751707457 |
|
|
Aug 01 07:37:07 PM PDT 24 |
Aug 01 07:37:20 PM PDT 24 |
44942000 ps |
| T1113 |
/workspace/coverage/default/1.flash_ctrl_phy_host_grant_err.491612612 |
|
|
Aug 01 07:30:21 PM PDT 24 |
Aug 01 07:30:35 PM PDT 24 |
35888500 ps |
| T1114 |
/workspace/coverage/default/3.flash_ctrl_sw_op.1214345381 |
|
|
Aug 01 07:31:34 PM PDT 24 |
Aug 01 07:32:00 PM PDT 24 |
157189600 ps |
| T1115 |
/workspace/coverage/default/0.flash_ctrl_stress_all.2402983473 |
|
|
Aug 01 07:28:43 PM PDT 24 |
Aug 01 07:31:23 PM PDT 24 |
169580100 ps |
| T1116 |
/workspace/coverage/default/25.flash_ctrl_prog_reset.395985589 |
|
|
Aug 01 07:39:51 PM PDT 24 |
Aug 01 07:40:04 PM PDT 24 |
65594400 ps |
| T1117 |
/workspace/coverage/default/44.flash_ctrl_otp_reset.772445012 |
|
|
Aug 01 07:41:32 PM PDT 24 |
Aug 01 07:43:22 PM PDT 24 |
38101000 ps |
| T1118 |
/workspace/coverage/default/0.flash_ctrl_serr_address.2111810368 |
|
|
Aug 01 07:28:26 PM PDT 24 |
Aug 01 07:29:54 PM PDT 24 |
957742200 ps |
| T1119 |
/workspace/coverage/default/9.flash_ctrl_phy_arb.1717388361 |
|
|
Aug 01 07:35:37 PM PDT 24 |
Aug 01 07:37:46 PM PDT 24 |
707126500 ps |
| T1120 |
/workspace/coverage/default/24.flash_ctrl_disable.3209977657 |
|
|
Aug 01 07:39:29 PM PDT 24 |
Aug 01 07:39:51 PM PDT 24 |
31521400 ps |
| T1121 |
/workspace/coverage/default/26.flash_ctrl_alert_test.411358616 |
|
|
Aug 01 07:39:43 PM PDT 24 |
Aug 01 07:39:57 PM PDT 24 |
115990400 ps |
| T1122 |
/workspace/coverage/default/4.flash_ctrl_re_evict.3549079269 |
|
|
Aug 01 07:33:13 PM PDT 24 |
Aug 01 07:33:48 PM PDT 24 |
226601900 ps |
| T1123 |
/workspace/coverage/default/9.flash_ctrl_smoke.876540146 |
|
|
Aug 01 07:35:21 PM PDT 24 |
Aug 01 07:36:13 PM PDT 24 |
21861300 ps |
| T1124 |
/workspace/coverage/default/3.flash_ctrl_derr_detect.3973116091 |
|
|
Aug 01 07:31:49 PM PDT 24 |
Aug 01 07:35:22 PM PDT 24 |
3419628700 ps |
| T374 |
/workspace/coverage/default/0.flash_ctrl_sec_info_access.1672873977 |
|
|
Aug 01 07:28:42 PM PDT 24 |
Aug 01 07:29:44 PM PDT 24 |
5301642600 ps |
| T1125 |
/workspace/coverage/default/5.flash_ctrl_invalid_op.1412149973 |
|
|
Aug 01 07:33:49 PM PDT 24 |
Aug 01 07:35:21 PM PDT 24 |
1007027800 ps |
| T1126 |
/workspace/coverage/default/30.flash_ctrl_hw_sec_otp.397029189 |
|
|
Aug 01 07:40:05 PM PDT 24 |
Aug 01 07:44:13 PM PDT 24 |
9393003000 ps |
| T1127 |
/workspace/coverage/default/6.flash_ctrl_hw_rma_reset.2323456264 |
|
|
Aug 01 07:34:02 PM PDT 24 |
Aug 01 07:49:40 PM PDT 24 |
80149784400 ps |
| T1128 |
/workspace/coverage/default/72.flash_ctrl_connect.3472827581 |
|
|
Aug 01 07:42:12 PM PDT 24 |
Aug 01 07:42:26 PM PDT 24 |
42746800 ps |
| T1129 |
/workspace/coverage/default/24.flash_ctrl_intr_rd_slow_flash.2052736493 |
|
|
Aug 01 07:39:31 PM PDT 24 |
Aug 01 07:42:02 PM PDT 24 |
11610728400 ps |
| T1130 |
/workspace/coverage/default/22.flash_ctrl_connect.876402286 |
|
|
Aug 01 07:39:26 PM PDT 24 |
Aug 01 07:39:42 PM PDT 24 |
52087300 ps |
| T1131 |
/workspace/coverage/default/0.flash_ctrl_hw_read_seed_err.837749667 |
|
|
Aug 01 07:28:48 PM PDT 24 |
Aug 01 07:29:02 PM PDT 24 |
15595200 ps |
| T1132 |
/workspace/coverage/default/10.flash_ctrl_ro.2003115492 |
|
|
Aug 01 07:35:54 PM PDT 24 |
Aug 01 07:37:59 PM PDT 24 |
2199074700 ps |
| T1133 |
/workspace/coverage/default/17.flash_ctrl_rw_evict.2175548714 |
|
|
Aug 01 07:37:57 PM PDT 24 |
Aug 01 07:38:26 PM PDT 24 |
29984500 ps |
| T1134 |
/workspace/coverage/default/5.flash_ctrl_rw.2001369854 |
|
|
Aug 01 07:33:50 PM PDT 24 |
Aug 01 07:42:56 PM PDT 24 |
7358137000 ps |
| T266 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.205061491 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
63795800 ps |
| T1135 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.3430834254 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
23140100 ps |
| T66 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.1221039106 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:44 PM PDT 24 |
2481629200 ps |
| T1136 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.682325743 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
26016300 ps |
| T1137 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.1658055184 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:42:15 PM PDT 24 |
32362900 ps |
| T1138 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.2287077035 |
|
|
Aug 01 06:42:20 PM PDT 24 |
Aug 01 06:42:35 PM PDT 24 |
14308300 ps |
| T67 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.3066016302 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:34 PM PDT 24 |
105817800 ps |
| T102 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.1485151755 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:21 PM PDT 24 |
37899200 ps |
| T267 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.2099344159 |
|
|
Aug 01 06:42:28 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
105465300 ps |
| T1139 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.623551354 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:03 PM PDT 24 |
45432900 ps |
| T68 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.3071563587 |
|
|
Aug 01 06:42:09 PM PDT 24 |
Aug 01 06:42:27 PM PDT 24 |
125784500 ps |
| T105 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.934155623 |
|
|
Aug 01 06:42:18 PM PDT 24 |
Aug 01 06:42:35 PM PDT 24 |
145232500 ps |
| T1140 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.760201316 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
148789300 ps |
| T103 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.43204694 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:33 PM PDT 24 |
385696700 ps |
| T104 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.2370457280 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:49:55 PM PDT 24 |
474041900 ps |
| T268 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.363215930 |
|
|
Aug 01 06:42:40 PM PDT 24 |
Aug 01 06:42:53 PM PDT 24 |
26332400 ps |
| T330 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.600150468 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:04 PM PDT 24 |
26029600 ps |
| T206 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.3444149003 |
|
|
Aug 01 06:41:55 PM PDT 24 |
Aug 01 06:57:04 PM PDT 24 |
7917160000 ps |
| T207 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.3928828450 |
|
|
Aug 01 06:42:24 PM PDT 24 |
Aug 01 06:50:08 PM PDT 24 |
1077825300 ps |
| T1141 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.3654535298 |
|
|
Aug 01 06:42:13 PM PDT 24 |
Aug 01 06:42:29 PM PDT 24 |
14808300 ps |
| T241 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.3211451970 |
|
|
Aug 01 06:41:49 PM PDT 24 |
Aug 01 06:42:07 PM PDT 24 |
91856200 ps |
| T208 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.2169295672 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:56:39 PM PDT 24 |
1269339000 ps |
| T353 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.4195427992 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:04 PM PDT 24 |
59730300 ps |
| T425 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.1904689168 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
1629000900 ps |
| T242 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.2436397732 |
|
|
Aug 01 06:41:57 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
141224200 ps |
| T255 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.763387298 |
|
|
Aug 01 06:42:12 PM PDT 24 |
Aug 01 06:42:30 PM PDT 24 |
43288700 ps |
| T331 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.4058675121 |
|
|
Aug 01 06:42:47 PM PDT 24 |
Aug 01 06:43:01 PM PDT 24 |
223148800 ps |
| T332 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.2182796335 |
|
|
Aug 01 06:42:17 PM PDT 24 |
Aug 01 06:42:31 PM PDT 24 |
23108600 ps |
| T243 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.427331577 |
|
|
Aug 01 06:42:05 PM PDT 24 |
Aug 01 06:42:22 PM PDT 24 |
39308700 ps |
| T1142 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.1888665897 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:39 PM PDT 24 |
12627800 ps |
| T244 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.2043149846 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:42:45 PM PDT 24 |
39289300 ps |
| T1143 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.1900992976 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:07 PM PDT 24 |
22283100 ps |
| T1144 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.1616880570 |
|
|
Aug 01 06:41:51 PM PDT 24 |
Aug 01 06:42:07 PM PDT 24 |
71178800 ps |
| T245 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.312568279 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:34 PM PDT 24 |
99820300 ps |
| T1145 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.4280262088 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:42:39 PM PDT 24 |
27377600 ps |
| T1146 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.3402685378 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:43:06 PM PDT 24 |
662986000 ps |
| T246 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.1626275808 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:50:02 PM PDT 24 |
176263400 ps |
| T256 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.3608143903 |
|
|
Aug 01 06:42:07 PM PDT 24 |
Aug 01 06:42:26 PM PDT 24 |
115024200 ps |
| T1147 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.2240083676 |
|
|
Aug 01 06:42:17 PM PDT 24 |
Aug 01 06:42:33 PM PDT 24 |
14379000 ps |
| T1148 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.4032719029 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:39 PM PDT 24 |
18021100 ps |
| T1149 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.1143995882 |
|
|
Aug 01 06:42:43 PM PDT 24 |
Aug 01 06:42:57 PM PDT 24 |
14323300 ps |
| T1150 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.2371451771 |
|
|
Aug 01 06:42:07 PM PDT 24 |
Aug 01 06:42:23 PM PDT 24 |
19696800 ps |
| T247 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.1220982003 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:42:45 PM PDT 24 |
52836100 ps |
| T357 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.2156847762 |
|
|
Aug 01 06:42:28 PM PDT 24 |
Aug 01 06:50:03 PM PDT 24 |
695329300 ps |
| T1151 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.2120989125 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:40 PM PDT 24 |
66831400 ps |
| T1152 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.3462305440 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
17369000 ps |
| T304 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.449529481 |
|
|
Aug 01 06:42:30 PM PDT 24 |
Aug 01 06:49:00 PM PDT 24 |
1720164800 ps |
| T1153 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.1041116813 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:43:15 PM PDT 24 |
5888947300 ps |
| T1154 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.3249307710 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:20 PM PDT 24 |
118915400 ps |
| T1155 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.823315766 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:29 PM PDT 24 |
25297000 ps |
| T305 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.2740521094 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:43 PM PDT 24 |
100448500 ps |
| T263 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.2879427660 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:24 PM PDT 24 |
67347000 ps |
| T274 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.4000784617 |
|
|
Aug 01 06:42:20 PM PDT 24 |
Aug 01 06:55:02 PM PDT 24 |
1304805500 ps |
| T1156 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3936370866 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
13373900 ps |
| T1157 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.2975089354 |
|
|
Aug 01 06:42:30 PM PDT 24 |
Aug 01 06:42:44 PM PDT 24 |
72797000 ps |
| T1158 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.1899897183 |
|
|
Aug 01 06:42:07 PM PDT 24 |
Aug 01 06:42:20 PM PDT 24 |
19269200 ps |
| T257 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.1779720069 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:34 PM PDT 24 |
191084500 ps |
| T1159 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.3298600658 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:20 PM PDT 24 |
12735900 ps |
| T1160 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.1809946470 |
|
|
Aug 01 06:41:49 PM PDT 24 |
Aug 01 06:42:34 PM PDT 24 |
82676300 ps |
| T1161 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.2238463205 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:27 PM PDT 24 |
2488828300 ps |
| T276 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.1230184976 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:57:11 PM PDT 24 |
984907900 ps |
| T258 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.2662332173 |
|
|
Aug 01 06:42:20 PM PDT 24 |
Aug 01 06:42:37 PM PDT 24 |
86041900 ps |
| T264 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.3669891567 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:37 PM PDT 24 |
684587600 ps |
| T1162 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.95534071 |
|
|
Aug 01 06:42:13 PM PDT 24 |
Aug 01 06:42:27 PM PDT 24 |
16848600 ps |
| T1163 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.3399264063 |
|
|
Aug 01 06:42:44 PM PDT 24 |
Aug 01 06:42:58 PM PDT 24 |
86590800 ps |
| T259 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.3763755747 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
325849100 ps |
| T1164 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.2157060943 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:05 PM PDT 24 |
24034300 ps |
| T260 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.2026453504 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
86983600 ps |
| T261 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.1645493675 |
|
|
Aug 01 06:42:18 PM PDT 24 |
Aug 01 06:42:36 PM PDT 24 |
104701400 ps |
| T269 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.3680054349 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:57:23 PM PDT 24 |
537139900 ps |
| T262 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.2329344163 |
|
|
Aug 01 06:42:24 PM PDT 24 |
Aug 01 06:42:38 PM PDT 24 |
76621200 ps |
| T1165 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.2633150623 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
45388700 ps |
| T270 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.2580585929 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
86740500 ps |
| T271 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.3532724710 |
|
|
Aug 01 06:41:53 PM PDT 24 |
Aug 01 06:42:10 PM PDT 24 |
85022200 ps |
| T1166 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.2549883074 |
|
|
Aug 01 06:41:56 PM PDT 24 |
Aug 01 06:42:13 PM PDT 24 |
124454200 ps |
| T306 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.199179467 |
|
|
Aug 01 06:42:13 PM PDT 24 |
Aug 01 06:42:31 PM PDT 24 |
1052177300 ps |
| T307 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.984108044 |
|
|
Aug 01 06:42:10 PM PDT 24 |
Aug 01 06:42:31 PM PDT 24 |
235516100 ps |
| T1167 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.593368987 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:27 PM PDT 24 |
59056900 ps |
| T1168 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.3904319775 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:06 PM PDT 24 |
16007200 ps |
| T333 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.2716924641 |
|
|
Aug 01 06:42:43 PM PDT 24 |
Aug 01 06:42:57 PM PDT 24 |
57110300 ps |
| T265 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.2073151096 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:42:47 PM PDT 24 |
66543600 ps |
| T359 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.377366111 |
|
|
Aug 01 06:42:13 PM PDT 24 |
Aug 01 06:57:13 PM PDT 24 |
1412646500 ps |
| T1169 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.1080137420 |
|
|
Aug 01 06:42:46 PM PDT 24 |
Aug 01 06:43:00 PM PDT 24 |
22238400 ps |
| T273 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.3259473253 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:07 PM PDT 24 |
117846100 ps |
| T272 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.568408107 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:35 PM PDT 24 |
56322600 ps |
| T1170 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.3318564689 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:30 PM PDT 24 |
19714800 ps |
| T354 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.1248804496 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:45 PM PDT 24 |
108159500 ps |
| T308 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.681312867 |
|
|
Aug 01 06:41:53 PM PDT 24 |
Aug 01 06:43:00 PM PDT 24 |
7124206100 ps |
| T1171 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.330595451 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:29 PM PDT 24 |
60854500 ps |
| T1172 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.3930217806 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:31 PM PDT 24 |
27385100 ps |
| T1173 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.664603513 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
26092900 ps |
| T1174 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.2864495579 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:42:46 PM PDT 24 |
49589900 ps |
| T309 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.3374364923 |
|
|
Aug 01 06:41:58 PM PDT 24 |
Aug 01 06:42:15 PM PDT 24 |
113738900 ps |
| T1175 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.1110882128 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
67219500 ps |
| T310 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.2314033126 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:22 PM PDT 24 |
105601800 ps |
| T1176 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.2686494762 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:33 PM PDT 24 |
40219800 ps |
| T1177 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.519456755 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:34 PM PDT 24 |
82351200 ps |
| T1178 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.1485688932 |
|
|
Aug 01 06:42:07 PM PDT 24 |
Aug 01 06:42:21 PM PDT 24 |
17772600 ps |
| T355 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.91263835 |
|
|
Aug 01 06:41:49 PM PDT 24 |
Aug 01 06:42:07 PM PDT 24 |
39228600 ps |
| T1179 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.2323050717 |
|
|
Aug 01 06:41:51 PM PDT 24 |
Aug 01 06:42:07 PM PDT 24 |
16678800 ps |
| T360 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.1718066301 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:50:03 PM PDT 24 |
347174600 ps |
| T1180 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.1313401078 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:55 PM PDT 24 |
218009600 ps |
| T1181 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.2594495817 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:36 PM PDT 24 |
111217900 ps |
| T1182 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.297341789 |
|
|
Aug 01 06:42:44 PM PDT 24 |
Aug 01 06:42:58 PM PDT 24 |
15054000 ps |
| T1183 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.4245697658 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:42:39 PM PDT 24 |
23616500 ps |
| T363 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.4126417746 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:54:41 PM PDT 24 |
771870900 ps |
| T1184 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.2539959537 |
|
|
Aug 01 06:42:31 PM PDT 24 |
Aug 01 06:42:45 PM PDT 24 |
16603600 ps |
| T311 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.2309960872 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:10 PM PDT 24 |
407175800 ps |
| T250 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.1255205055 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
51809400 ps |
| T1185 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.2039973979 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:21 PM PDT 24 |
22446800 ps |
| T1186 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.422475858 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:49 PM PDT 24 |
46042500 ps |
| T312 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.917721568 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:43:14 PM PDT 24 |
3410051900 ps |
| T251 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.3446977180 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:03 PM PDT 24 |
144644500 ps |
| T1187 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.898950188 |
|
|
Aug 01 06:42:44 PM PDT 24 |
Aug 01 06:42:58 PM PDT 24 |
53531900 ps |
| T1188 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.1653652421 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:49:49 PM PDT 24 |
665921200 ps |
| T1189 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.191351146 |
|
|
Aug 01 06:42:10 PM PDT 24 |
Aug 01 06:42:27 PM PDT 24 |
25864200 ps |
| T1190 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.2423140345 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:29 PM PDT 24 |
53899000 ps |
| T1191 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.1957320116 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
32461700 ps |
| T277 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.79037315 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:56:33 PM PDT 24 |
1077079600 ps |
| T1192 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.2407600978 |
|
|
Aug 01 06:42:39 PM PDT 24 |
Aug 01 06:42:53 PM PDT 24 |
17873900 ps |
| T1193 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.192276577 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
652547700 ps |
| T1194 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.367475531 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:31 PM PDT 24 |
12579000 ps |
| T313 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.2360775997 |
|
|
Aug 01 06:42:17 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
243413000 ps |
| T1195 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.257967067 |
|
|
Aug 01 06:41:49 PM PDT 24 |
Aug 01 06:42:40 PM PDT 24 |
1585514900 ps |
| T1196 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.726170293 |
|
|
Aug 01 06:42:40 PM PDT 24 |
Aug 01 06:42:54 PM PDT 24 |
47540500 ps |
| T1197 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.1333334422 |
|
|
Aug 01 06:42:38 PM PDT 24 |
Aug 01 06:42:52 PM PDT 24 |
55227000 ps |
| T1198 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.1554121419 |
|
|
Aug 01 06:42:09 PM PDT 24 |
Aug 01 06:42:26 PM PDT 24 |
60578800 ps |
| T1199 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.1306678894 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:26 PM PDT 24 |
941979400 ps |
| T1200 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.834105446 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:06 PM PDT 24 |
15470300 ps |
| T356 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.4149005116 |
|
|
Aug 01 06:42:23 PM PDT 24 |
Aug 01 06:42:40 PM PDT 24 |
70061900 ps |
| T1201 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.1494225505 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:19 PM PDT 24 |
45824600 ps |
| T1202 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.2378396496 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:06 PM PDT 24 |
29004300 ps |
| T1203 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.1721729490 |
|
|
Aug 01 06:42:07 PM PDT 24 |
Aug 01 06:42:20 PM PDT 24 |
15469300 ps |
| T1204 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.3131707065 |
|
|
Aug 01 06:41:50 PM PDT 24 |
Aug 01 06:42:06 PM PDT 24 |
13237000 ps |
| T252 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.2940868794 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:42:16 PM PDT 24 |
40401300 ps |
| T1205 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.3748389958 |
|
|
Aug 01 06:41:51 PM PDT 24 |
Aug 01 06:42:05 PM PDT 24 |
16318100 ps |
| T1206 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.1454706871 |
|
|
Aug 01 06:42:23 PM PDT 24 |
Aug 01 06:42:37 PM PDT 24 |
45257500 ps |
| T1207 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.3668367628 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:28 PM PDT 24 |
27084400 ps |
| T1208 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.256634035 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:32 PM PDT 24 |
67027200 ps |
| T253 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.2875302318 |
|
|
Aug 01 06:41:51 PM PDT 24 |
Aug 01 06:42:05 PM PDT 24 |
16430300 ps |
| T1209 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.4035044618 |
|
|
Aug 01 06:41:57 PM PDT 24 |
Aug 01 06:42:13 PM PDT 24 |
33939900 ps |
| T1210 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.3074562135 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:31 PM PDT 24 |
14732500 ps |
| T1211 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.650031660 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:56:45 PM PDT 24 |
1604822500 ps |
| T1212 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.2747083709 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:36 PM PDT 24 |
331062400 ps |
| T1213 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.3510563373 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
30571100 ps |
| T1214 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.2537782149 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:29 PM PDT 24 |
58335100 ps |
| T1215 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.938506172 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:08 PM PDT 24 |
71382900 ps |
| T1216 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.1237748703 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:42:43 PM PDT 24 |
619865200 ps |
| T1217 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.1197884320 |
|
|
Aug 01 06:42:47 PM PDT 24 |
Aug 01 06:43:00 PM PDT 24 |
49107600 ps |
| T1218 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.1101682514 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:42:48 PM PDT 24 |
42731400 ps |
| T1219 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.3368201549 |
|
|
Aug 01 06:42:05 PM PDT 24 |
Aug 01 06:42:23 PM PDT 24 |
39482300 ps |
| T1220 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.3136439007 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:20 PM PDT 24 |
19764200 ps |
| T314 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.1963227869 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:42 PM PDT 24 |
177013800 ps |
| T1221 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.255711906 |
|
|
Aug 01 06:42:03 PM PDT 24 |
Aug 01 06:42:19 PM PDT 24 |
24821400 ps |
| T1222 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.188481455 |
|
|
Aug 01 06:42:31 PM PDT 24 |
Aug 01 06:42:47 PM PDT 24 |
53814600 ps |
| T1223 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.567102225 |
|
|
Aug 01 06:41:51 PM PDT 24 |
Aug 01 06:42:06 PM PDT 24 |
16629500 ps |
| T1224 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.4209078376 |
|
|
Aug 01 06:42:19 PM PDT 24 |
Aug 01 06:42:37 PM PDT 24 |
157627000 ps |
| T1225 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.314833501 |
|
|
Aug 01 06:42:19 PM PDT 24 |
Aug 01 06:42:34 PM PDT 24 |
44666200 ps |
| T1226 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.2907538694 |
|
|
Aug 01 06:42:30 PM PDT 24 |
Aug 01 06:42:43 PM PDT 24 |
54681600 ps |
| T1227 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.3323283395 |
|
|
Aug 01 06:42:38 PM PDT 24 |
Aug 01 06:42:52 PM PDT 24 |
59320500 ps |
| T1228 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.3007997725 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:42:42 PM PDT 24 |
18631200 ps |
| T1229 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.1464645196 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
123663500 ps |
| T1230 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.901547081 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:33 PM PDT 24 |
204692300 ps |
| T275 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.3742853355 |
|
|
Aug 01 06:42:24 PM PDT 24 |
Aug 01 06:42:41 PM PDT 24 |
56517800 ps |
| T1231 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.4096554216 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:10 PM PDT 24 |
26534500 ps |
| T315 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.77730047 |
|
|
Aug 01 06:42:23 PM PDT 24 |
Aug 01 06:42:45 PM PDT 24 |
403836300 ps |
| T1232 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.1982250402 |
|
|
Aug 01 06:41:56 PM PDT 24 |
Aug 01 06:42:14 PM PDT 24 |
146069900 ps |
| T1233 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.3398275534 |
|
|
Aug 01 06:41:51 PM PDT 24 |
Aug 01 06:42:07 PM PDT 24 |
97448100 ps |
| T1234 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.8014198 |
|
|
Aug 01 06:42:31 PM PDT 24 |
Aug 01 06:42:45 PM PDT 24 |
17394900 ps |
| T1235 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.441062961 |
|
|
Aug 01 06:42:27 PM PDT 24 |
Aug 01 06:42:44 PM PDT 24 |
234032300 ps |
| T1236 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.3196006923 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:44 PM PDT 24 |
144149900 ps |
| T1237 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.453740674 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:38 PM PDT 24 |
15132500 ps |
| T1238 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.1267997377 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:42:16 PM PDT 24 |
16051100 ps |
| T1239 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.3928991247 |
|
|
Aug 01 06:42:26 PM PDT 24 |
Aug 01 06:42:40 PM PDT 24 |
28072400 ps |
| T1240 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.472842014 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:29 PM PDT 24 |
65990600 ps |
| T1241 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.764351132 |
|
|
Aug 01 06:42:25 PM PDT 24 |
Aug 01 06:42:39 PM PDT 24 |
24326100 ps |
| T1242 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.957700551 |
|
|
Aug 01 06:42:19 PM PDT 24 |
Aug 01 06:42:38 PM PDT 24 |
172441300 ps |
| T1243 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.3463887006 |
|
|
Aug 01 06:42:19 PM PDT 24 |
Aug 01 06:42:36 PM PDT 24 |
84929300 ps |
| T1244 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.15076618 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:42:34 PM PDT 24 |
214364300 ps |
| T1245 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.3336213535 |
|
|
Aug 01 06:42:43 PM PDT 24 |
Aug 01 06:42:57 PM PDT 24 |
21633800 ps |
| T1246 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.1011210907 |
|
|
Aug 01 06:42:02 PM PDT 24 |
Aug 01 06:42:18 PM PDT 24 |
11668300 ps |
| T1247 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.3822741499 |
|
|
Aug 01 06:42:40 PM PDT 24 |
Aug 01 06:42:54 PM PDT 24 |
173309600 ps |
| T358 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.3548289223 |
|
|
Aug 01 06:42:14 PM PDT 24 |
Aug 01 06:57:09 PM PDT 24 |
5019227000 ps |
| T1248 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.3885027104 |
|
|
Aug 01 06:41:52 PM PDT 24 |
Aug 01 06:42:09 PM PDT 24 |
99493600 ps |
| T1249 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.3796364064 |
|
|
Aug 01 06:42:17 PM PDT 24 |
Aug 01 06:42:33 PM PDT 24 |
79540700 ps |
| T1250 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.2970306846 |
|
|
Aug 01 06:42:46 PM PDT 24 |
Aug 01 06:43:00 PM PDT 24 |
24981400 ps |
| T1251 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.1587674629 |
|
|
Aug 01 06:42:15 PM PDT 24 |
Aug 01 06:42:29 PM PDT 24 |
164362600 ps |
| T1252 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.2183466729 |
|
|
Aug 01 06:42:16 PM PDT 24 |
Aug 01 06:42:36 PM PDT 24 |
160175900 ps |
| T316 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.3390351427 |
|
|
Aug 01 06:42:04 PM PDT 24 |
Aug 01 06:42:24 PM PDT 24 |
207719300 ps |
| T361 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.3689399750 |
|
|
Aug 01 06:41:53 PM PDT 24 |
Aug 01 06:49:33 PM PDT 24 |
782777200 ps |