Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
4662 |
1 |
|
T50 |
129 |
|
T51 |
87 |
|
T52 |
117 |
instr_types[0] |
6128 |
1 |
|
T50 |
328 |
|
T51 |
210 |
|
T52 |
251 |
instr_types[1] |
4106909 |
1 |
|
T2 |
16857 |
|
T3 |
15807 |
|
T6 |
16331 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for key_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4115468 |
1 |
|
T2 |
16857 |
|
T3 |
15807 |
|
T6 |
16331 |
auto[1] |
2231 |
1 |
|
T50 |
285 |
|
T51 |
136 |
|
T52 |
123 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for key_instr_cross
Bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4236 |
1 |
|
T50 |
86 |
|
T51 |
72 |
|
T52 |
64 |
auto[0] |
instr_types[0] |
5294 |
1 |
|
T50 |
185 |
|
T51 |
187 |
|
T52 |
210 |
auto[0] |
instr_types[1] |
4105938 |
1 |
|
T2 |
16857 |
|
T3 |
15807 |
|
T6 |
16331 |
auto[1] |
others |
426 |
1 |
|
T50 |
43 |
|
T51 |
15 |
|
T52 |
53 |
auto[1] |
instr_types[0] |
834 |
1 |
|
T50 |
143 |
|
T51 |
23 |
|
T52 |
41 |
auto[1] |
instr_types[1] |
971 |
1 |
|
T50 |
99 |
|
T51 |
98 |
|
T52 |
29 |