| T1074 |
/workspace/coverage/default/32.flash_ctrl_sec_info_access.3984978670 |
|
|
Aug 04 07:03:54 PM PDT 24 |
Aug 04 07:04:54 PM PDT 24 |
1543727500 ps |
| T1075 |
/workspace/coverage/default/19.flash_ctrl_wo.3798074559 |
|
|
Aug 04 07:01:50 PM PDT 24 |
Aug 04 07:04:50 PM PDT 24 |
19975681000 ps |
| T1076 |
/workspace/coverage/default/31.flash_ctrl_sec_info_access.1808145673 |
|
|
Aug 04 07:03:45 PM PDT 24 |
Aug 04 07:04:55 PM PDT 24 |
8025170700 ps |
| T1077 |
/workspace/coverage/default/8.flash_ctrl_connect.2886397525 |
|
|
Aug 04 06:57:37 PM PDT 24 |
Aug 04 06:57:53 PM PDT 24 |
154977400 ps |
| T1078 |
/workspace/coverage/default/24.flash_ctrl_smoke.98613823 |
|
|
Aug 04 07:02:44 PM PDT 24 |
Aug 04 07:04:48 PM PDT 24 |
115358000 ps |
| T1079 |
/workspace/coverage/default/18.flash_ctrl_ro.3488207754 |
|
|
Aug 04 07:01:34 PM PDT 24 |
Aug 04 07:03:36 PM PDT 24 |
2076214600 ps |
| T1080 |
/workspace/coverage/default/17.flash_ctrl_prog_reset.807381460 |
|
|
Aug 04 07:01:04 PM PDT 24 |
Aug 04 07:01:17 PM PDT 24 |
36226500 ps |
| T1081 |
/workspace/coverage/default/4.flash_ctrl_re_evict.789967453 |
|
|
Aug 04 06:54:33 PM PDT 24 |
Aug 04 06:55:07 PM PDT 24 |
73940000 ps |
| T1082 |
/workspace/coverage/default/10.flash_ctrl_rand_ops.2420406215 |
|
|
Aug 04 06:58:21 PM PDT 24 |
Aug 04 07:01:46 PM PDT 24 |
265304600 ps |
| T1083 |
/workspace/coverage/default/28.flash_ctrl_sec_info_access.2025316515 |
|
|
Aug 04 07:03:18 PM PDT 24 |
Aug 04 07:04:14 PM PDT 24 |
349920600 ps |
| T76 |
/workspace/coverage/default/2.flash_ctrl_phy_arb_redun.1516473368 |
|
|
Aug 04 06:51:57 PM PDT 24 |
Aug 04 06:52:21 PM PDT 24 |
895908500 ps |
| T1084 |
/workspace/coverage/default/41.flash_ctrl_hw_sec_otp.3279128352 |
|
|
Aug 04 07:04:45 PM PDT 24 |
Aug 04 07:08:57 PM PDT 24 |
3925929000 ps |
| T1085 |
/workspace/coverage/default/29.flash_ctrl_otp_reset.2631341794 |
|
|
Aug 04 07:03:22 PM PDT 24 |
Aug 04 07:05:34 PM PDT 24 |
164158500 ps |
| T1086 |
/workspace/coverage/default/57.flash_ctrl_connect.3056884412 |
|
|
Aug 04 07:05:34 PM PDT 24 |
Aug 04 07:05:47 PM PDT 24 |
51751700 ps |
| T1087 |
/workspace/coverage/default/59.flash_ctrl_connect.1940829986 |
|
|
Aug 04 07:05:33 PM PDT 24 |
Aug 04 07:05:48 PM PDT 24 |
26123600 ps |
| T1088 |
/workspace/coverage/default/34.flash_ctrl_rw_evict_all_en.3975743182 |
|
|
Aug 04 07:04:01 PM PDT 24 |
Aug 04 07:04:32 PM PDT 24 |
54058000 ps |
| T1089 |
/workspace/coverage/default/43.flash_ctrl_sec_info_access.1942958492 |
|
|
Aug 04 07:04:54 PM PDT 24 |
Aug 04 07:05:59 PM PDT 24 |
873605100 ps |
| T1090 |
/workspace/coverage/default/2.flash_ctrl_oversize_error.3778661772 |
|
|
Aug 04 06:51:28 PM PDT 24 |
Aug 04 06:54:48 PM PDT 24 |
2948645400 ps |
| T1091 |
/workspace/coverage/default/19.flash_ctrl_alert_test.1722189853 |
|
|
Aug 04 07:02:02 PM PDT 24 |
Aug 04 07:02:16 PM PDT 24 |
56693500 ps |
| T1092 |
/workspace/coverage/default/14.flash_ctrl_ro.2325848986 |
|
|
Aug 04 07:00:01 PM PDT 24 |
Aug 04 07:01:58 PM PDT 24 |
565316300 ps |
| T1093 |
/workspace/coverage/default/6.flash_ctrl_phy_arb.2497591866 |
|
|
Aug 04 06:55:35 PM PDT 24 |
Aug 04 07:03:23 PM PDT 24 |
2865018400 ps |
| T1094 |
/workspace/coverage/default/3.flash_ctrl_erase_suspend.3649633297 |
|
|
Aug 04 06:52:15 PM PDT 24 |
Aug 04 06:58:18 PM PDT 24 |
5790246200 ps |
| T1095 |
/workspace/coverage/default/12.flash_ctrl_hw_prog_rma_wipe_err.4115190237 |
|
|
Aug 04 06:59:32 PM PDT 24 |
Aug 04 07:00:56 PM PDT 24 |
10024814900 ps |
| T1096 |
/workspace/coverage/default/6.flash_ctrl_hw_rma_reset.1660226812 |
|
|
Aug 04 06:55:38 PM PDT 24 |
Aug 04 07:09:27 PM PDT 24 |
40122237900 ps |
| T1097 |
/workspace/coverage/default/13.flash_ctrl_prog_reset.1727202657 |
|
|
Aug 04 06:59:50 PM PDT 24 |
Aug 04 07:04:02 PM PDT 24 |
52225126400 ps |
| T1098 |
/workspace/coverage/default/69.flash_ctrl_connect.935331502 |
|
|
Aug 04 07:05:44 PM PDT 24 |
Aug 04 07:06:00 PM PDT 24 |
15102000 ps |
| T1099 |
/workspace/coverage/default/9.flash_ctrl_smoke.1512149465 |
|
|
Aug 04 06:57:47 PM PDT 24 |
Aug 04 06:59:28 PM PDT 24 |
109833900 ps |
| T1100 |
/workspace/coverage/default/35.flash_ctrl_sec_info_access.2806646468 |
|
|
Aug 04 07:04:09 PM PDT 24 |
Aug 04 07:05:11 PM PDT 24 |
481564000 ps |
| T1101 |
/workspace/coverage/default/4.flash_ctrl_prog_reset.990627060 |
|
|
Aug 04 06:54:30 PM PDT 24 |
Aug 04 06:54:44 PM PDT 24 |
20114000 ps |
| T1102 |
/workspace/coverage/default/1.flash_ctrl_rand_ops.2314440201 |
|
|
Aug 04 06:49:19 PM PDT 24 |
Aug 04 06:58:26 PM PDT 24 |
133090100 ps |
| T1103 |
/workspace/coverage/default/26.flash_ctrl_disable.3589708634 |
|
|
Aug 04 07:03:10 PM PDT 24 |
Aug 04 07:03:32 PM PDT 24 |
16716200 ps |
| T1104 |
/workspace/coverage/default/10.flash_ctrl_lcmgr_intg.1872870492 |
|
|
Aug 04 06:58:42 PM PDT 24 |
Aug 04 06:58:56 PM PDT 24 |
44967500 ps |
| T1105 |
/workspace/coverage/default/16.flash_ctrl_rw.1247462653 |
|
|
Aug 04 07:00:56 PM PDT 24 |
Aug 04 07:11:24 PM PDT 24 |
7665532700 ps |
| T1106 |
/workspace/coverage/default/1.flash_ctrl_sw_op.3149463789 |
|
|
Aug 04 06:49:21 PM PDT 24 |
Aug 04 06:49:48 PM PDT 24 |
22365400 ps |
| T1107 |
/workspace/coverage/default/3.flash_ctrl_derr_detect.1027452271 |
|
|
Aug 04 06:52:55 PM PDT 24 |
Aug 04 06:56:05 PM PDT 24 |
2992083900 ps |
| T1108 |
/workspace/coverage/default/18.flash_ctrl_intr_rd_slow_flash.2935647543 |
|
|
Aug 04 07:01:39 PM PDT 24 |
Aug 04 07:06:25 PM PDT 24 |
51706484000 ps |
| T1109 |
/workspace/coverage/default/4.flash_ctrl_otp_reset.3401458395 |
|
|
Aug 04 06:53:50 PM PDT 24 |
Aug 04 06:56:03 PM PDT 24 |
116403000 ps |
| T1110 |
/workspace/coverage/default/25.flash_ctrl_disable.3795764565 |
|
|
Aug 04 07:02:57 PM PDT 24 |
Aug 04 07:03:19 PM PDT 24 |
30376400 ps |
| T1111 |
/workspace/coverage/default/28.flash_ctrl_intr_rd.1788103446 |
|
|
Aug 04 07:03:14 PM PDT 24 |
Aug 04 07:06:45 PM PDT 24 |
3107482200 ps |
| T1112 |
/workspace/coverage/default/18.flash_ctrl_prog_reset.746786369 |
|
|
Aug 04 07:01:40 PM PDT 24 |
Aug 04 07:04:28 PM PDT 24 |
12671886400 ps |
| T1113 |
/workspace/coverage/default/4.flash_ctrl_rw_evict_all_en.3096339461 |
|
|
Aug 04 06:54:34 PM PDT 24 |
Aug 04 06:55:02 PM PDT 24 |
45754100 ps |
| T1114 |
/workspace/coverage/default/55.flash_ctrl_connect.2755698665 |
|
|
Aug 04 07:05:28 PM PDT 24 |
Aug 04 07:05:45 PM PDT 24 |
51126700 ps |
| T1115 |
/workspace/coverage/default/27.flash_ctrl_prog_reset.3690482102 |
|
|
Aug 04 07:03:09 PM PDT 24 |
Aug 04 07:03:23 PM PDT 24 |
23091400 ps |
| T1116 |
/workspace/coverage/default/0.flash_ctrl_host_addr_infection.1399215240 |
|
|
Aug 04 06:49:05 PM PDT 24 |
Aug 04 06:49:32 PM PDT 24 |
40411700 ps |
| T1117 |
/workspace/coverage/default/1.flash_ctrl_disable.603427343 |
|
|
Aug 04 06:50:08 PM PDT 24 |
Aug 04 06:50:29 PM PDT 24 |
31959400 ps |
| T1118 |
/workspace/coverage/default/3.flash_ctrl_rw_evict_all_en.2684966620 |
|
|
Aug 04 06:53:11 PM PDT 24 |
Aug 04 06:53:42 PM PDT 24 |
92864700 ps |
| T1119 |
/workspace/coverage/default/4.flash_ctrl_phy_host_grant_err.3027642531 |
|
|
Aug 04 06:54:41 PM PDT 24 |
Aug 04 06:54:54 PM PDT 24 |
48381800 ps |
| T1120 |
/workspace/coverage/default/10.flash_ctrl_invalid_op.209200692 |
|
|
Aug 04 06:58:27 PM PDT 24 |
Aug 04 06:59:37 PM PDT 24 |
8419746700 ps |
| T1121 |
/workspace/coverage/default/1.flash_ctrl_intr_rd_slow_flash.3769759000 |
|
|
Aug 04 06:49:55 PM PDT 24 |
Aug 04 06:54:18 PM PDT 24 |
12006124300 ps |
| T1122 |
/workspace/coverage/default/3.flash_ctrl_serr_address.2435639724 |
|
|
Aug 04 06:52:51 PM PDT 24 |
Aug 04 06:53:51 PM PDT 24 |
2563213900 ps |
| T1123 |
/workspace/coverage/default/0.flash_ctrl_ro_serr.677608196 |
|
|
Aug 04 06:47:40 PM PDT 24 |
Aug 04 06:49:37 PM PDT 24 |
1255759500 ps |
| T1124 |
/workspace/coverage/default/36.flash_ctrl_intr_rd_slow_flash.789888861 |
|
|
Aug 04 07:04:41 PM PDT 24 |
Aug 04 07:07:24 PM PDT 24 |
7361164700 ps |
| T1125 |
/workspace/coverage/default/76.flash_ctrl_connect.749999543 |
|
|
Aug 04 07:05:46 PM PDT 24 |
Aug 04 07:06:02 PM PDT 24 |
26417700 ps |
| T1126 |
/workspace/coverage/default/10.flash_ctrl_re_evict.462716501 |
|
|
Aug 04 06:58:32 PM PDT 24 |
Aug 04 06:59:07 PM PDT 24 |
142105200 ps |
| T1127 |
/workspace/coverage/default/4.flash_ctrl_oversize_error.3995386625 |
|
|
Aug 04 06:54:18 PM PDT 24 |
Aug 04 06:57:15 PM PDT 24 |
3769812600 ps |
| T1128 |
/workspace/coverage/default/11.flash_ctrl_sec_info_access.1018923655 |
|
|
Aug 04 06:59:05 PM PDT 24 |
Aug 04 07:00:19 PM PDT 24 |
4460688500 ps |
| T250 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.3942730617 |
|
|
Aug 04 05:34:14 PM PDT 24 |
Aug 04 05:34:28 PM PDT 24 |
24748400 ps |
| T1129 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.2203958106 |
|
|
Aug 04 05:34:20 PM PDT 24 |
Aug 04 05:34:33 PM PDT 24 |
30491500 ps |
| T65 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.461500278 |
|
|
Aug 04 05:34:08 PM PDT 24 |
Aug 04 05:34:25 PM PDT 24 |
62685200 ps |
| T251 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.100790963 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
29763900 ps |
| T66 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.2023616666 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
101527000 ps |
| T67 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.2742920465 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
487944700 ps |
| T104 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.2685468447 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:47:13 PM PDT 24 |
370665500 ps |
| T235 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.3793644778 |
|
|
Aug 04 05:34:25 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
112092200 ps |
| T1130 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.4068884518 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
24339500 ps |
| T105 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.1181530920 |
|
|
Aug 04 05:34:08 PM PDT 24 |
Aug 04 05:49:12 PM PDT 24 |
762664000 ps |
| T1131 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.1948446449 |
|
|
Aug 04 05:34:21 PM PDT 24 |
Aug 04 05:34:34 PM PDT 24 |
42992700 ps |
| T252 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.4001657196 |
|
|
Aug 04 05:34:36 PM PDT 24 |
Aug 04 05:34:49 PM PDT 24 |
47482900 ps |
| T1132 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.2891317844 |
|
|
Aug 04 05:34:14 PM PDT 24 |
Aug 04 05:34:27 PM PDT 24 |
21654100 ps |
| T191 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.3113653143 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
118523000 ps |
| T192 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.3095260681 |
|
|
Aug 04 05:34:00 PM PDT 24 |
Aug 04 05:34:17 PM PDT 24 |
43289600 ps |
| T248 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.2377431037 |
|
|
Aug 04 05:34:20 PM PDT 24 |
Aug 04 05:35:05 PM PDT 24 |
8132706100 ps |
| T310 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.760289910 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:37 PM PDT 24 |
29347800 ps |
| T311 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.3935258906 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
122005000 ps |
| T219 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.3873884280 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:41 PM PDT 24 |
283309700 ps |
| T236 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.61141113 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:46 PM PDT 24 |
93409400 ps |
| T220 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.3618410760 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:34:50 PM PDT 24 |
60156300 ps |
| T313 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.3549429195 |
|
|
Aug 04 05:34:04 PM PDT 24 |
Aug 04 05:34:18 PM PDT 24 |
45418200 ps |
| T237 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.1360669449 |
|
|
Aug 04 05:34:38 PM PDT 24 |
Aug 04 05:34:57 PM PDT 24 |
156627300 ps |
| T238 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.3898516738 |
|
|
Aug 04 05:34:12 PM PDT 24 |
Aug 04 05:34:46 PM PDT 24 |
79424500 ps |
| T1133 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.1559523334 |
|
|
Aug 04 05:34:08 PM PDT 24 |
Aug 04 05:34:22 PM PDT 24 |
23285700 ps |
| T1134 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.1535040192 |
|
|
Aug 04 05:34:37 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
39789800 ps |
| T221 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.3013129677 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
215574300 ps |
| T1135 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.3302440186 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:44 PM PDT 24 |
44193500 ps |
| T1136 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.2616521953 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
17444400 ps |
| T1137 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.3933234723 |
|
|
Aug 04 05:34:17 PM PDT 24 |
Aug 04 05:34:31 PM PDT 24 |
14733000 ps |
| T314 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.1044692192 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
26174000 ps |
| T1138 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.3588453275 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
13636600 ps |
| T222 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.2946974901 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:34:50 PM PDT 24 |
46848900 ps |
| T315 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.2344161838 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
64920600 ps |
| T1139 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.3349702200 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
55594900 ps |
| T1140 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.1818795935 |
|
|
Aug 04 05:34:44 PM PDT 24 |
Aug 04 05:35:00 PM PDT 24 |
28774800 ps |
| T225 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.2293061371 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:42:10 PM PDT 24 |
361064000 ps |
| T239 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.1290500186 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
220599200 ps |
| T240 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.930156199 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:40 PM PDT 24 |
282203600 ps |
| T241 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.1364618950 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:35:06 PM PDT 24 |
119288200 ps |
| T223 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.4093692416 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:44 PM PDT 24 |
60157200 ps |
| T242 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.2037839332 |
|
|
Aug 04 05:34:42 PM PDT 24 |
Aug 04 05:35:03 PM PDT 24 |
159840600 ps |
| T1141 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.4141541017 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:42 PM PDT 24 |
98693400 ps |
| T276 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.1395587984 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
437716300 ps |
| T1142 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.1098242136 |
|
|
Aug 04 05:34:21 PM PDT 24 |
Aug 04 05:34:37 PM PDT 24 |
23330700 ps |
| T312 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.324515710 |
|
|
Aug 04 05:34:44 PM PDT 24 |
Aug 04 05:34:58 PM PDT 24 |
28065700 ps |
| T1143 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.3033063498 |
|
|
Aug 04 05:34:37 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
136657400 ps |
| T226 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.2043862059 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:49:11 PM PDT 24 |
757086100 ps |
| T224 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.3197378269 |
|
|
Aug 04 05:34:09 PM PDT 24 |
Aug 04 05:34:28 PM PDT 24 |
214707800 ps |
| T1144 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.1211821509 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
141568700 ps |
| T329 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.1034134686 |
|
|
Aug 04 05:34:43 PM PDT 24 |
Aug 04 05:34:57 PM PDT 24 |
24892400 ps |
| T259 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.2490404563 |
|
|
Aug 04 05:34:22 PM PDT 24 |
Aug 04 05:42:04 PM PDT 24 |
205201300 ps |
| T249 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.362688055 |
|
|
Aug 04 05:34:37 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
213507300 ps |
| T1145 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.915285223 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
70811900 ps |
| T277 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.1329183774 |
|
|
Aug 04 05:34:25 PM PDT 24 |
Aug 04 05:34:41 PM PDT 24 |
131143600 ps |
| T1146 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.2594767316 |
|
|
Aug 04 05:34:36 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
193402800 ps |
| T1147 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.742952303 |
|
|
Aug 04 05:34:08 PM PDT 24 |
Aug 04 05:35:23 PM PDT 24 |
9830095800 ps |
| T332 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.385088867 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:40:59 PM PDT 24 |
1466702000 ps |
| T309 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.3866421859 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:41 PM PDT 24 |
81393300 ps |
| T1148 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.1860066691 |
|
|
Aug 04 05:34:25 PM PDT 24 |
Aug 04 05:34:38 PM PDT 24 |
11567200 ps |
| T253 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.1021415014 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:46 PM PDT 24 |
60738900 ps |
| T1149 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.2326117390 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
40233900 ps |
| T1150 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.3294913010 |
|
|
Aug 04 05:34:27 PM PDT 24 |
Aug 04 05:35:02 PM PDT 24 |
373328000 ps |
| T1151 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.2495245786 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
58537400 ps |
| T257 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.1344455209 |
|
|
Aug 04 05:34:22 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
134821200 ps |
| T278 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.56390988 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
224878100 ps |
| T1152 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.1303640895 |
|
|
Aug 04 05:34:22 PM PDT 24 |
Aug 04 05:34:38 PM PDT 24 |
32399400 ps |
| T1153 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.2092628250 |
|
|
Aug 04 05:34:34 PM PDT 24 |
Aug 04 05:35:03 PM PDT 24 |
62357500 ps |
| T1154 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.3515215833 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:40 PM PDT 24 |
17961600 ps |
| T1155 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.4229667082 |
|
|
Aug 04 05:34:23 PM PDT 24 |
Aug 04 05:34:54 PM PDT 24 |
42572000 ps |
| T1156 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.878158688 |
|
|
Aug 04 05:34:41 PM PDT 24 |
Aug 04 05:34:54 PM PDT 24 |
61020000 ps |
| T255 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.3476809450 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
70249200 ps |
| T1157 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.1070366702 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:34:49 PM PDT 24 |
241336000 ps |
| T256 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.1632206064 |
|
|
Aug 04 05:34:07 PM PDT 24 |
Aug 04 05:34:24 PM PDT 24 |
38028800 ps |
| T1158 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.2845518785 |
|
|
Aug 04 05:34:06 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
83974100 ps |
| T1159 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.3972063008 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
27794700 ps |
| T1160 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.1488030144 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:46 PM PDT 24 |
47843000 ps |
| T1161 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.2630853914 |
|
|
Aug 04 05:34:22 PM PDT 24 |
Aug 04 05:34:38 PM PDT 24 |
24430600 ps |
| T1162 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.1287453565 |
|
|
Aug 04 05:34:43 PM PDT 24 |
Aug 04 05:34:57 PM PDT 24 |
92210100 ps |
| T258 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.3006858617 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
120093100 ps |
| T279 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.2858812400 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:40 PM PDT 24 |
104114700 ps |
| T280 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.179404020 |
|
|
Aug 04 05:34:44 PM PDT 24 |
Aug 04 05:35:06 PM PDT 24 |
433044800 ps |
| T330 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.3965642390 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:42 PM PDT 24 |
18242100 ps |
| T1163 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.2007394267 |
|
|
Aug 04 05:34:45 PM PDT 24 |
Aug 04 05:35:02 PM PDT 24 |
275303200 ps |
| T261 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.1607022972 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:49 PM PDT 24 |
158312200 ps |
| T1164 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.3710175599 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
45001200 ps |
| T1165 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.3553870586 |
|
|
Aug 04 05:34:34 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
125126100 ps |
| T1166 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.2202686923 |
|
|
Aug 04 05:34:43 PM PDT 24 |
Aug 04 05:34:57 PM PDT 24 |
29961100 ps |
| T1167 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.3832645133 |
|
|
Aug 04 05:34:37 PM PDT 24 |
Aug 04 05:34:51 PM PDT 24 |
51548700 ps |
| T1168 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.3372105323 |
|
|
Aug 04 05:34:20 PM PDT 24 |
Aug 04 05:34:33 PM PDT 24 |
25828800 ps |
| T1169 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.3854274983 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:44 PM PDT 24 |
17534000 ps |
| T1170 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.3830208800 |
|
|
Aug 04 05:34:42 PM PDT 24 |
Aug 04 05:34:59 PM PDT 24 |
134269400 ps |
| T1171 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.2124813468 |
|
|
Aug 04 05:34:45 PM PDT 24 |
Aug 04 05:34:59 PM PDT 24 |
16271900 ps |
| T254 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.4278416577 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
63869900 ps |
| T281 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.834637181 |
|
|
Aug 04 05:34:27 PM PDT 24 |
Aug 04 05:34:46 PM PDT 24 |
192077700 ps |
| T1172 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.1666798020 |
|
|
Aug 04 05:34:33 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
137624200 ps |
| T1173 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.2702961875 |
|
|
Aug 04 05:34:21 PM PDT 24 |
Aug 04 05:34:34 PM PDT 24 |
35618200 ps |
| T282 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.660876569 |
|
|
Aug 04 05:34:22 PM PDT 24 |
Aug 04 05:34:42 PM PDT 24 |
527649100 ps |
| T333 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.557383760 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:40:56 PM PDT 24 |
1657275800 ps |
| T1174 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.2376073363 |
|
|
Aug 04 05:34:06 PM PDT 24 |
Aug 04 05:34:22 PM PDT 24 |
20193100 ps |
| T1175 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.1746883157 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
87029500 ps |
| T1176 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.1488286867 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:46 PM PDT 24 |
54970200 ps |
| T1177 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.1203777312 |
|
|
Aug 04 05:34:20 PM PDT 24 |
Aug 04 05:34:39 PM PDT 24 |
72735500 ps |
| T283 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.3526621320 |
|
|
Aug 04 05:34:12 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
847370200 ps |
| T230 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.415443787 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:44 PM PDT 24 |
69260800 ps |
| T1178 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.1910805876 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
137377400 ps |
| T1179 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.1244075618 |
|
|
Aug 04 05:34:21 PM PDT 24 |
Aug 04 05:34:37 PM PDT 24 |
12793500 ps |
| T1180 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.2371689021 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:42 PM PDT 24 |
307865300 ps |
| T231 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.1360949759 |
|
|
Aug 04 05:34:18 PM PDT 24 |
Aug 04 05:34:32 PM PDT 24 |
16981100 ps |
| T1181 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.3998017633 |
|
|
Aug 04 05:34:18 PM PDT 24 |
Aug 04 05:35:04 PM PDT 24 |
89188700 ps |
| T1182 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.1015297245 |
|
|
Aug 04 05:34:41 PM PDT 24 |
Aug 04 05:34:54 PM PDT 24 |
24998100 ps |
| T1183 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.238040319 |
|
|
Aug 04 05:34:13 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
60680000 ps |
| T336 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.750764178 |
|
|
Aug 04 05:34:25 PM PDT 24 |
Aug 04 05:49:35 PM PDT 24 |
352576600 ps |
| T1184 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.2585811284 |
|
|
Aug 04 05:34:36 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
13205200 ps |
| T334 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.1014207961 |
|
|
Aug 04 05:34:37 PM PDT 24 |
Aug 04 05:42:16 PM PDT 24 |
397581200 ps |
| T1185 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.3473825955 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:42 PM PDT 24 |
39555500 ps |
| T1186 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.2916445249 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
124407400 ps |
| T1187 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.737701110 |
|
|
Aug 04 05:34:38 PM PDT 24 |
Aug 04 05:34:51 PM PDT 24 |
30569700 ps |
| T1188 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.3760331813 |
|
|
Aug 04 05:34:26 PM PDT 24 |
Aug 04 05:34:39 PM PDT 24 |
24346800 ps |
| T284 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.2841636624 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:50 PM PDT 24 |
110198100 ps |
| T1189 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.4133658026 |
|
|
Aug 04 05:34:16 PM PDT 24 |
Aug 04 05:34:34 PM PDT 24 |
84239700 ps |
| T1190 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.2236853151 |
|
|
Aug 04 05:34:08 PM PDT 24 |
Aug 04 05:34:24 PM PDT 24 |
17594500 ps |
| T1191 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.4240169102 |
|
|
Aug 04 05:34:36 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
62680200 ps |
| T341 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.1801077750 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:42:13 PM PDT 24 |
4717449300 ps |
| T1192 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.582904807 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:39 PM PDT 24 |
149606200 ps |
| T1193 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.1022739118 |
|
|
Aug 04 05:34:40 PM PDT 24 |
Aug 04 05:34:56 PM PDT 24 |
53112400 ps |
| T1194 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.1425075195 |
|
|
Aug 04 05:34:38 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
833636900 ps |
| T1195 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.3954510349 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:56 PM PDT 24 |
75510800 ps |
| T1196 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.2699188256 |
|
|
Aug 04 05:34:33 PM PDT 24 |
Aug 04 05:34:46 PM PDT 24 |
13734500 ps |
| T1197 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.3530513431 |
|
|
Aug 04 05:34:18 PM PDT 24 |
Aug 04 05:34:34 PM PDT 24 |
44001200 ps |
| T1198 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.1666087623 |
|
|
Aug 04 05:34:19 PM PDT 24 |
Aug 04 05:34:36 PM PDT 24 |
195635600 ps |
| T1199 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.185907947 |
|
|
Aug 04 05:34:11 PM PDT 24 |
Aug 04 05:34:27 PM PDT 24 |
19375100 ps |
| T1200 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.2426827187 |
|
|
Aug 04 05:34:42 PM PDT 24 |
Aug 04 05:34:56 PM PDT 24 |
18127800 ps |
| T1201 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.2455179750 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
123112200 ps |
| T260 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.3094879721 |
|
|
Aug 04 05:34:34 PM PDT 24 |
Aug 04 05:34:54 PM PDT 24 |
428921200 ps |
| T1202 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.934968475 |
|
|
Aug 04 05:34:28 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
14040600 ps |
| T338 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.3990114146 |
|
|
Aug 04 05:34:43 PM PDT 24 |
Aug 04 05:47:26 PM PDT 24 |
684061400 ps |
| T339 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.1621436777 |
|
|
Aug 04 05:34:44 PM PDT 24 |
Aug 04 05:42:32 PM PDT 24 |
2222839400 ps |
| T1203 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.1379824528 |
|
|
Aug 04 05:34:13 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
639989800 ps |
| T1204 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.1266039472 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
437796300 ps |
| T1205 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.2855091342 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:35:41 PM PDT 24 |
11649695000 ps |
| T1206 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.1710377207 |
|
|
Aug 04 05:34:42 PM PDT 24 |
Aug 04 05:34:59 PM PDT 24 |
21200400 ps |
| T1207 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.2468319432 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
26221200 ps |
| T1208 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.453673638 |
|
|
Aug 04 05:34:22 PM PDT 24 |
Aug 04 05:34:36 PM PDT 24 |
222456300 ps |
| T1209 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.1917145573 |
|
|
Aug 04 05:34:36 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
62967800 ps |
| T1210 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.3550671539 |
|
|
Aug 04 05:34:22 PM PDT 24 |
Aug 04 05:49:16 PM PDT 24 |
1200999800 ps |
| T1211 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.291387148 |
|
|
Aug 04 05:34:23 PM PDT 24 |
Aug 04 05:34:41 PM PDT 24 |
1380909800 ps |
| T1212 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.670376878 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
27079600 ps |
| T1213 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.120291886 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
40740900 ps |
| T1214 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.1121990505 |
|
|
Aug 04 05:34:20 PM PDT 24 |
Aug 04 05:34:36 PM PDT 24 |
82511400 ps |
| T1215 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.2542056617 |
|
|
Aug 04 05:34:35 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
258582500 ps |
| T1216 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.2158028447 |
|
|
Aug 04 05:34:16 PM PDT 24 |
Aug 04 05:35:14 PM PDT 24 |
4209676300 ps |
| T1217 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.2169705084 |
|
|
Aug 04 05:34:15 PM PDT 24 |
Aug 04 05:34:31 PM PDT 24 |
58278300 ps |
| T1218 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.2897079777 |
|
|
Aug 04 05:34:38 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
55400700 ps |
| T1219 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.2461528218 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
23835800 ps |
| T1220 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.1880456969 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
216024700 ps |
| T1221 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.2281775101 |
|
|
Aug 04 05:34:20 PM PDT 24 |
Aug 04 05:35:19 PM PDT 24 |
5020666800 ps |
| T1222 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.459351204 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
39461700 ps |
| T1223 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.3565610957 |
|
|
Aug 04 05:34:42 PM PDT 24 |
Aug 04 05:35:02 PM PDT 24 |
67394700 ps |
| T1224 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.3151097732 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
32023100 ps |
| T1225 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.3894959829 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:47 PM PDT 24 |
11818800 ps |
| T1226 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.2146787419 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:49:46 PM PDT 24 |
693861900 ps |
| T1227 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.893048553 |
|
|
Aug 04 05:34:37 PM PDT 24 |
Aug 04 05:34:51 PM PDT 24 |
15621400 ps |
| T1228 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.521819314 |
|
|
Aug 04 05:34:41 PM PDT 24 |
Aug 04 05:34:55 PM PDT 24 |
27076100 ps |
| T1229 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.1323473368 |
|
|
Aug 04 05:34:27 PM PDT 24 |
Aug 04 05:34:40 PM PDT 24 |
15040800 ps |
| T1230 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.1528145225 |
|
|
Aug 04 05:34:08 PM PDT 24 |
Aug 04 05:34:23 PM PDT 24 |
12866000 ps |
| T1231 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.832990339 |
|
|
Aug 04 05:34:44 PM PDT 24 |
Aug 04 05:34:57 PM PDT 24 |
22786900 ps |
| T232 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.3295461291 |
|
|
Aug 04 05:34:21 PM PDT 24 |
Aug 04 05:34:35 PM PDT 24 |
33367600 ps |
| T1232 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.1512898417 |
|
|
Aug 04 05:34:36 PM PDT 24 |
Aug 04 05:34:49 PM PDT 24 |
18430200 ps |
| T233 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.2134960254 |
|
|
Aug 04 05:34:02 PM PDT 24 |
Aug 04 05:34:16 PM PDT 24 |
19170400 ps |
| T1233 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.3522341147 |
|
|
Aug 04 05:34:42 PM PDT 24 |
Aug 04 05:34:55 PM PDT 24 |
25143000 ps |
| T1234 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.1679304283 |
|
|
Aug 04 05:34:43 PM PDT 24 |
Aug 04 05:34:57 PM PDT 24 |
14786800 ps |
| T1235 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.428810203 |
|
|
Aug 04 05:34:27 PM PDT 24 |
Aug 04 05:35:07 PM PDT 24 |
819943700 ps |
| T1236 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.2474193587 |
|
|
Aug 04 05:34:38 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
17284800 ps |
| T1237 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.3774002379 |
|
|
Aug 04 05:34:42 PM PDT 24 |
Aug 04 05:34:56 PM PDT 24 |
17812200 ps |
| T331 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.3652673164 |
|
|
Aug 04 05:34:17 PM PDT 24 |
Aug 04 05:42:03 PM PDT 24 |
376522300 ps |
| T335 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.2944664914 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:41:00 PM PDT 24 |
1717338300 ps |
| T1238 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.1281844657 |
|
|
Aug 04 05:34:27 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
25528900 ps |
| T1239 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.3746136420 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:35:06 PM PDT 24 |
3629842300 ps |
| T1240 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.3477394771 |
|
|
Aug 04 05:34:33 PM PDT 24 |
Aug 04 05:34:52 PM PDT 24 |
83106100 ps |
| T1241 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.3578348632 |
|
|
Aug 04 05:34:26 PM PDT 24 |
Aug 04 05:34:43 PM PDT 24 |
63668300 ps |
| T1242 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.329243661 |
|
|
Aug 04 05:34:14 PM PDT 24 |
Aug 04 05:35:03 PM PDT 24 |
5439215200 ps |
| T1243 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.3449498243 |
|
|
Aug 04 05:34:39 PM PDT 24 |
Aug 04 05:34:53 PM PDT 24 |
51057500 ps |
| T234 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.2792647982 |
|
|
Aug 04 05:34:20 PM PDT 24 |
Aug 04 05:34:34 PM PDT 24 |
32123100 ps |
| T342 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.4141885000 |
|
|
Aug 04 05:34:23 PM PDT 24 |
Aug 04 05:40:59 PM PDT 24 |
8467357200 ps |
| T1244 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.1924768980 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:34:45 PM PDT 24 |
167939100 ps |
| T1245 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.1445912264 |
|
|
Aug 04 05:34:29 PM PDT 24 |
Aug 04 05:35:14 PM PDT 24 |
99231800 ps |
| T1246 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.3216636754 |
|
|
Aug 04 05:34:31 PM PDT 24 |
Aug 04 05:34:51 PM PDT 24 |
62369900 ps |
| T1247 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.3688391547 |
|
|
Aug 04 05:34:26 PM PDT 24 |
Aug 04 05:34:44 PM PDT 24 |
34825900 ps |
| T1248 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.2319071159 |
|
|
Aug 04 05:34:32 PM PDT 24 |
Aug 04 05:34:48 PM PDT 24 |
194109200 ps |
| T1249 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.1543224676 |
|
|
Aug 04 05:34:30 PM PDT 24 |
Aug 04 05:34:44 PM PDT 24 |
65868000 ps |
| T1250 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.2313061597 |
|
|
Aug 04 05:34:40 PM PDT 24 |
Aug 04 05:34:54 PM PDT 24 |
19406100 ps |
| T1251 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.3331484897 |
|
|
Aug 04 05:34:24 PM PDT 24 |
Aug 04 05:34:40 PM PDT 24 |
24698000 ps |
| T1252 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.950273822 |
|
|
Aug 04 05:34:44 PM PDT 24 |
Aug 04 05:34:58 PM PDT 24 |
102611000 ps |