Unified Coverage Report :: Group :: flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg

Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
91.67	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_env_0.1/flash_ctrl_env_cov.sv

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Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	12	1	11	91.67

Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_arb_err	1	0	1	100.00	100	1	1	0
cp_host_gnt_err	1	1	0	0.00	100	1	1	0
cp_mp_err	1	0	1	100.00	100	1	1	0
cp_op_err	1	0	1	100.00	100	1	1	0
cp_phy_relbl_err	1	0	1	100.00	100	1	1	0
cp_phy_storage_err	1	0	1	100.00	100	1	1	0
cp_prog_err	1	0	1	100.00	100	1	1	0
cp_prog_type_err	1	0	1	100.00	100	1	1	0
cp_prog_win_err	1	0	1	100.00	100	1	1	0
cp_rd_err	1	0	1	100.00	100	1	1	0
cp_seed_err	1	0	1	100.00	100	1	1	0
cp_spurious_ack	1	0	1	100.00	100	1	1	0

Summary for Variable cp_arb_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_arb_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	4	1		T211	1		T212	1		T166	1

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Summary for Variable cp_host_gnt_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for cp_host_gnt_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER
seen	0	1	1

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Summary for Variable cp_mp_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mp_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	11	1		T24	1		T13	1		T145	1

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Summary for Variable cp_op_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_op_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	5	1		T152	1		T268	1		T269	1

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Summary for Variable cp_phy_relbl_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_phy_relbl_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	23	1		T270	1		T302	5		T335	1

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Summary for Variable cp_phy_storage_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_phy_storage_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	5	1		T70	1		T213	1		T214	1

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Summary for Variable cp_prog_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	6	1		T13	1		T182	1		T272	1

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Summary for Variable cp_prog_type_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_type_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	8	1		T22	1		T48	1		T98	1

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Summary for Variable cp_prog_win_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_win_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	6	1		T56	1		T273	1		T127	1

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Summary for Variable cp_rd_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_rd_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	10	1		T270	1		T335	1		T307	1

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Summary for Variable cp_seed_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_seed_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	10	1		T270	1		T335	1		T307	1

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Summary for Variable cp_spurious_ack

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_spurious_ack

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	5	1		T86	1		T89	1		T87	1