Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
 
Summary for Group   flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 
12 | 
1 | 
11 | 
91.67  | 
Variables for Group  flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
 
 
Summary for Variable cp_arb_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_arb_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
5 | 
1 | 
 | 
T53 | 
1 | 
 | 
T201 | 
1 | 
 | 
T215 | 
1 | 
Summary for Variable cp_host_gnt_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
1 | 
0 | 
0.00   | 
User Defined Bins for cp_host_gnt_err
Uncovered bins
| NAME | COUNT | AT LEAST | NUMBER | 
| seen | 
0 | 
1 | 
1 | 
Summary for Variable cp_mp_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_mp_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
18 | 
1 | 
 | 
T177 | 
1 | 
 | 
T86 | 
1 | 
 | 
T193 | 
1 | 
Summary for Variable cp_op_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_op_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
7 | 
1 | 
 | 
T265 | 
1 | 
 | 
T266 | 
1 | 
 | 
T267 | 
1 | 
Summary for Variable cp_phy_relbl_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_phy_relbl_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
22 | 
1 | 
 | 
T51 | 
5 | 
 | 
T312 | 
1 | 
 | 
T313 | 
1 | 
Summary for Variable cp_phy_storage_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_phy_storage_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
5 | 
1 | 
 | 
T61 | 
1 | 
 | 
T62 | 
1 | 
 | 
T216 | 
1 | 
Summary for Variable cp_prog_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_prog_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
12 | 
1 | 
 | 
T177 | 
1 | 
 | 
T193 | 
1 | 
 | 
T195 | 
1 | 
Summary for Variable cp_prog_type_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_prog_type_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
2 | 
1 | 
 | 
T107 | 
1 | 
 | 
T92 | 
1 | 
Summary for Variable cp_prog_win_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_prog_win_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
6 | 
1 | 
 | 
T178 | 
1 | 
 | 
T268 | 
1 | 
 | 
T269 | 
1 | 
Summary for Variable cp_rd_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_rd_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
7 | 
1 | 
 | 
T312 | 
1 | 
 | 
T313 | 
1 | 
 | 
T314 | 
1 | 
Summary for Variable cp_seed_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_seed_err
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
8 | 
1 | 
 | 
T312 | 
1 | 
 | 
T313 | 
1 | 
 | 
T314 | 
1 | 
Summary for Variable cp_spurious_ack
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_spurious_ack
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| seen | 
5 | 
1 | 
 | 
T162 | 
1 | 
 | 
T164 | 
1 | 
 | 
T163 | 
1 | 
 
 
 
| 0% | 
10% | 
20% | 
30% | 
40% | 
50% | 
60% | 
70% | 
80% | 
90% | 
100% |