| T1074 |
/workspace/coverage/default/23.flash_ctrl_otp_reset.1728010727 |
|
|
Aug 11 06:58:08 PM PDT 24 |
Aug 11 07:00:19 PM PDT 24 |
107663000 ps |
| T201 |
/workspace/coverage/default/4.flash_ctrl_rw_derr.461143059 |
|
|
Aug 11 06:54:25 PM PDT 24 |
Aug 11 06:58:23 PM PDT 24 |
1414945700 ps |
| T1075 |
/workspace/coverage/default/25.flash_ctrl_rw_evict.1952790912 |
|
|
Aug 11 06:58:27 PM PDT 24 |
Aug 11 06:58:58 PM PDT 24 |
94034200 ps |
| T429 |
/workspace/coverage/default/32.flash_ctrl_rw_evict.2879557674 |
|
|
Aug 11 06:59:03 PM PDT 24 |
Aug 11 06:59:37 PM PDT 24 |
138700000 ps |
| T1076 |
/workspace/coverage/default/1.flash_ctrl_rw.1557246264 |
|
|
Aug 11 06:53:14 PM PDT 24 |
Aug 11 07:01:54 PM PDT 24 |
12735070600 ps |
| T1077 |
/workspace/coverage/default/39.flash_ctrl_intr_rd_slow_flash.4203250583 |
|
|
Aug 11 06:59:38 PM PDT 24 |
Aug 11 07:04:28 PM PDT 24 |
25070851400 ps |
| T1078 |
/workspace/coverage/default/52.flash_ctrl_otp_reset.3381337245 |
|
|
Aug 11 07:00:06 PM PDT 24 |
Aug 11 07:02:19 PM PDT 24 |
40495300 ps |
| T1079 |
/workspace/coverage/default/7.flash_ctrl_fetch_code.3027771505 |
|
|
Aug 11 06:55:13 PM PDT 24 |
Aug 11 06:55:34 PM PDT 24 |
887865200 ps |
| T1080 |
/workspace/coverage/default/44.flash_ctrl_disable.3147188578 |
|
|
Aug 11 06:59:50 PM PDT 24 |
Aug 11 07:00:12 PM PDT 24 |
10009500 ps |
| T1081 |
/workspace/coverage/default/28.flash_ctrl_intr_rd_slow_flash.2511615948 |
|
|
Aug 11 06:58:40 PM PDT 24 |
Aug 11 07:04:09 PM PDT 24 |
47817250300 ps |
| T1082 |
/workspace/coverage/default/72.flash_ctrl_otp_reset.97005436 |
|
|
Aug 11 07:00:25 PM PDT 24 |
Aug 11 07:02:38 PM PDT 24 |
41950500 ps |
| T1083 |
/workspace/coverage/default/5.flash_ctrl_phy_arb.2223603181 |
|
|
Aug 11 06:54:42 PM PDT 24 |
Aug 11 06:57:16 PM PDT 24 |
78864000 ps |
| T1084 |
/workspace/coverage/default/34.flash_ctrl_disable.2422494786 |
|
|
Aug 11 06:59:14 PM PDT 24 |
Aug 11 06:59:34 PM PDT 24 |
24603300 ps |
| T1085 |
/workspace/coverage/default/2.flash_ctrl_serr_address.878410796 |
|
|
Aug 11 06:53:32 PM PDT 24 |
Aug 11 06:54:30 PM PDT 24 |
823523900 ps |
| T1086 |
/workspace/coverage/default/2.flash_ctrl_alert_test.2624032838 |
|
|
Aug 11 06:53:34 PM PDT 24 |
Aug 11 06:53:48 PM PDT 24 |
64963100 ps |
| T231 |
/workspace/coverage/default/2.flash_ctrl_wr_intg.3866634866 |
|
|
Aug 11 06:53:27 PM PDT 24 |
Aug 11 06:53:42 PM PDT 24 |
132648200 ps |
| T1087 |
/workspace/coverage/default/14.flash_ctrl_disable.641149071 |
|
|
Aug 11 06:56:53 PM PDT 24 |
Aug 11 06:57:16 PM PDT 24 |
17483400 ps |
| T1088 |
/workspace/coverage/default/12.flash_ctrl_rw.687530554 |
|
|
Aug 11 06:56:29 PM PDT 24 |
Aug 11 07:07:50 PM PDT 24 |
8107655300 ps |
| T1089 |
/workspace/coverage/default/0.flash_ctrl_rw_serr.1978121407 |
|
|
Aug 11 06:53:05 PM PDT 24 |
Aug 11 06:55:50 PM PDT 24 |
2446700700 ps |
| T1090 |
/workspace/coverage/default/0.flash_ctrl_rd_intg.564928777 |
|
|
Aug 11 06:53:09 PM PDT 24 |
Aug 11 06:53:41 PM PDT 24 |
65310800 ps |
| T1091 |
/workspace/coverage/default/4.flash_ctrl_re_evict.2020102408 |
|
|
Aug 11 06:54:30 PM PDT 24 |
Aug 11 06:55:06 PM PDT 24 |
215729500 ps |
| T1092 |
/workspace/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.363038850 |
|
|
Aug 11 06:56:47 PM PDT 24 |
Aug 11 06:57:46 PM PDT 24 |
10038065200 ps |
| T1093 |
/workspace/coverage/default/26.flash_ctrl_disable.3747060799 |
|
|
Aug 11 06:58:35 PM PDT 24 |
Aug 11 06:58:57 PM PDT 24 |
13245700 ps |
| T1094 |
/workspace/coverage/default/16.flash_ctrl_prog_reset.2589809352 |
|
|
Aug 11 06:57:28 PM PDT 24 |
Aug 11 06:57:41 PM PDT 24 |
39299000 ps |
| T1095 |
/workspace/coverage/default/10.flash_ctrl_phy_arb.2214395638 |
|
|
Aug 11 06:55:55 PM PDT 24 |
Aug 11 07:00:10 PM PDT 24 |
1413375200 ps |
| T1096 |
/workspace/coverage/default/3.flash_ctrl_lcmgr_intg.2930289985 |
|
|
Aug 11 06:54:07 PM PDT 24 |
Aug 11 06:54:21 PM PDT 24 |
79142500 ps |
| T1097 |
/workspace/coverage/default/11.flash_ctrl_prog_reset.3748667414 |
|
|
Aug 11 06:56:20 PM PDT 24 |
Aug 11 06:56:34 PM PDT 24 |
18815200 ps |
| T1098 |
/workspace/coverage/default/7.flash_ctrl_sec_info_access.3345094169 |
|
|
Aug 11 06:55:34 PM PDT 24 |
Aug 11 06:56:42 PM PDT 24 |
1737215100 ps |
| T1099 |
/workspace/coverage/default/11.flash_ctrl_lcmgr_intg.2137089101 |
|
|
Aug 11 06:56:17 PM PDT 24 |
Aug 11 06:56:31 PM PDT 24 |
70484100 ps |
| T1100 |
/workspace/coverage/default/2.flash_ctrl_intr_wr.4109992611 |
|
|
Aug 11 06:53:28 PM PDT 24 |
Aug 11 06:54:38 PM PDT 24 |
5640922900 ps |
| T1101 |
/workspace/coverage/default/6.flash_ctrl_intr_rd.1638608246 |
|
|
Aug 11 06:55:04 PM PDT 24 |
Aug 11 06:58:50 PM PDT 24 |
3340994000 ps |
| T1102 |
/workspace/coverage/default/74.flash_ctrl_connect.98145871 |
|
|
Aug 11 07:00:23 PM PDT 24 |
Aug 11 07:00:39 PM PDT 24 |
14534500 ps |
| T1103 |
/workspace/coverage/default/8.flash_ctrl_mp_regions.1632704759 |
|
|
Aug 11 06:55:32 PM PDT 24 |
Aug 11 07:04:19 PM PDT 24 |
30816491100 ps |
| T320 |
/workspace/coverage/default/46.flash_ctrl_hw_sec_otp.155358810 |
|
|
Aug 11 06:59:55 PM PDT 24 |
Aug 11 07:02:09 PM PDT 24 |
1865436000 ps |
| T1104 |
/workspace/coverage/default/32.flash_ctrl_disable.2126112740 |
|
|
Aug 11 06:59:02 PM PDT 24 |
Aug 11 06:59:24 PM PDT 24 |
10770700 ps |
| T1105 |
/workspace/coverage/default/38.flash_ctrl_smoke.2087273018 |
|
|
Aug 11 06:59:32 PM PDT 24 |
Aug 11 07:00:50 PM PDT 24 |
25161500 ps |
| T1106 |
/workspace/coverage/default/34.flash_ctrl_alert_test.708234862 |
|
|
Aug 11 06:59:14 PM PDT 24 |
Aug 11 06:59:28 PM PDT 24 |
39946900 ps |
| T1107 |
/workspace/coverage/default/13.flash_ctrl_intr_rd_slow_flash.2073038656 |
|
|
Aug 11 06:56:43 PM PDT 24 |
Aug 11 06:58:52 PM PDT 24 |
11601925600 ps |
| T1108 |
/workspace/coverage/default/1.flash_ctrl_rd_buff_evict.295032142 |
|
|
Aug 11 06:53:09 PM PDT 24 |
Aug 11 06:54:54 PM PDT 24 |
492375400 ps |
| T1109 |
/workspace/coverage/default/0.flash_ctrl_read_word_sweep_serr.743439038 |
|
|
Aug 11 06:53:05 PM PDT 24 |
Aug 11 06:53:27 PM PDT 24 |
29927800 ps |
| T1110 |
/workspace/coverage/default/49.flash_ctrl_connect.2099452174 |
|
|
Aug 11 07:00:07 PM PDT 24 |
Aug 11 07:00:24 PM PDT 24 |
13459900 ps |
| T1111 |
/workspace/coverage/default/18.flash_ctrl_connect.1282884807 |
|
|
Aug 11 06:57:46 PM PDT 24 |
Aug 11 06:58:02 PM PDT 24 |
49810700 ps |
| T1112 |
/workspace/coverage/default/1.flash_ctrl_prog_reset.3645097908 |
|
|
Aug 11 06:53:15 PM PDT 24 |
Aug 11 06:53:29 PM PDT 24 |
24020800 ps |
| T1113 |
/workspace/coverage/default/8.flash_ctrl_intr_wr_slow_flash.3704393807 |
|
|
Aug 11 06:55:36 PM PDT 24 |
Aug 11 06:58:11 PM PDT 24 |
31454845100 ps |
| T1114 |
/workspace/coverage/default/11.flash_ctrl_smoke.1717104899 |
|
|
Aug 11 06:56:06 PM PDT 24 |
Aug 11 06:59:23 PM PDT 24 |
37167600 ps |
| T1115 |
/workspace/coverage/default/10.flash_ctrl_hw_rma_reset.1757673277 |
|
|
Aug 11 06:56:02 PM PDT 24 |
Aug 11 07:15:01 PM PDT 24 |
230221574300 ps |
| T1116 |
/workspace/coverage/default/42.flash_ctrl_hw_sec_otp.103360250 |
|
|
Aug 11 06:59:50 PM PDT 24 |
Aug 11 07:04:02 PM PDT 24 |
3298948900 ps |
| T268 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.217818999 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:56 PM PDT 24 |
44910500 ps |
| T62 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.2517401096 |
|
|
Aug 11 06:24:52 PM PDT 24 |
Aug 11 06:25:10 PM PDT 24 |
1532736900 ps |
| T269 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.4025243831 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:56 PM PDT 24 |
15843300 ps |
| T270 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.3802185079 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
186612600 ps |
| T63 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.3550901027 |
|
|
Aug 11 06:24:49 PM PDT 24 |
Aug 11 06:25:07 PM PDT 24 |
53682800 ps |
| T1117 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.984477050 |
|
|
Aug 11 06:24:41 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
23178900 ps |
| T100 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.2885916764 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
103103300 ps |
| T325 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.3394175948 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
16072800 ps |
| T1118 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.1708470049 |
|
|
Aug 11 06:24:37 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
50299300 ps |
| T244 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.3338891167 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:24:50 PM PDT 24 |
50770100 ps |
| T1119 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.658103935 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
13972900 ps |
| T327 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.2834453250 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
18073800 ps |
| T1120 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.3298569705 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:24:59 PM PDT 24 |
10960500 ps |
| T1121 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.3164163225 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
38878100 ps |
| T326 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.3319572438 |
|
|
Aug 11 06:25:12 PM PDT 24 |
Aug 11 06:25:26 PM PDT 24 |
72500100 ps |
| T64 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.2445615649 |
|
|
Aug 11 06:24:30 PM PDT 24 |
Aug 11 06:24:47 PM PDT 24 |
52149400 ps |
| T101 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.576707457 |
|
|
Aug 11 06:24:50 PM PDT 24 |
Aug 11 06:32:30 PM PDT 24 |
365399700 ps |
| T102 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.1169993156 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:25:03 PM PDT 24 |
157787700 ps |
| T215 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.1441052146 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:24:55 PM PDT 24 |
41807400 ps |
| T216 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.1364527324 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:31:08 PM PDT 24 |
663570800 ps |
| T219 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.2311086749 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
235190400 ps |
| T1122 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.2481506228 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
36205800 ps |
| T220 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.2314061117 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
139676100 ps |
| T1123 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.1849227591 |
|
|
Aug 11 06:24:55 PM PDT 24 |
Aug 11 06:25:11 PM PDT 24 |
56260100 ps |
| T217 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.1547962166 |
|
|
Aug 11 06:24:47 PM PDT 24 |
Aug 11 06:25:07 PM PDT 24 |
41692700 ps |
| T1124 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.465705865 |
|
|
Aug 11 06:24:49 PM PDT 24 |
Aug 11 06:25:06 PM PDT 24 |
12474000 ps |
| T1125 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.1010369142 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
36116000 ps |
| T1126 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.676077575 |
|
|
Aug 11 06:24:29 PM PDT 24 |
Aug 11 06:24:42 PM PDT 24 |
13103600 ps |
| T328 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.4269900277 |
|
|
Aug 11 06:25:03 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
17503100 ps |
| T1127 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.754751047 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
138400800 ps |
| T218 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.1750763842 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:37:22 PM PDT 24 |
865550100 ps |
| T1128 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.1378544 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:25:24 PM PDT 24 |
26392900 ps |
| T1129 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.1984910142 |
|
|
Aug 11 06:24:30 PM PDT 24 |
Aug 11 06:24:44 PM PDT 24 |
58694500 ps |
| T345 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.2579925983 |
|
|
Aug 11 06:25:20 PM PDT 24 |
Aug 11 06:25:33 PM PDT 24 |
30107100 ps |
| T238 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.3857314908 |
|
|
Aug 11 06:24:35 PM PDT 24 |
Aug 11 06:37:26 PM PDT 24 |
1780086500 ps |
| T239 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.3758858626 |
|
|
Aug 11 06:24:47 PM PDT 24 |
Aug 11 06:25:04 PM PDT 24 |
41425200 ps |
| T249 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.537014377 |
|
|
Aug 11 06:24:54 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
605731300 ps |
| T346 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.3775757609 |
|
|
Aug 11 06:24:49 PM PDT 24 |
Aug 11 06:25:02 PM PDT 24 |
172542600 ps |
| T240 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.1700068098 |
|
|
Aug 11 06:24:54 PM PDT 24 |
Aug 11 06:25:11 PM PDT 24 |
67106700 ps |
| T1130 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.2668153560 |
|
|
Aug 11 06:24:37 PM PDT 24 |
Aug 11 06:24:50 PM PDT 24 |
14454800 ps |
| T1131 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.901932092 |
|
|
Aug 11 06:24:49 PM PDT 24 |
Aug 11 06:25:02 PM PDT 24 |
21601500 ps |
| T1132 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.277823180 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
65798000 ps |
| T250 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.1450389307 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
27474500 ps |
| T1133 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.3173351494 |
|
|
Aug 11 06:25:16 PM PDT 24 |
Aug 11 06:25:30 PM PDT 24 |
57945600 ps |
| T241 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.249278930 |
|
|
Aug 11 06:24:57 PM PDT 24 |
Aug 11 06:25:15 PM PDT 24 |
103294400 ps |
| T251 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.2942794465 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
35689100 ps |
| T252 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.322221488 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:05 PM PDT 24 |
172009600 ps |
| T253 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.1829180049 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
26129500 ps |
| T304 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.3715968932 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:02 PM PDT 24 |
123694800 ps |
| T242 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.146188926 |
|
|
Aug 11 06:24:28 PM PDT 24 |
Aug 11 06:32:11 PM PDT 24 |
452055000 ps |
| T305 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.4210783227 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
116606800 ps |
| T306 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.2004150928 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:25:19 PM PDT 24 |
193351500 ps |
| T1134 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.742482610 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:13 PM PDT 24 |
71331200 ps |
| T1135 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.845230847 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:15 PM PDT 24 |
46632800 ps |
| T1136 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.528034136 |
|
|
Aug 11 06:25:00 PM PDT 24 |
Aug 11 06:25:14 PM PDT 24 |
17947800 ps |
| T1137 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.2440703430 |
|
|
Aug 11 06:24:48 PM PDT 24 |
Aug 11 06:25:04 PM PDT 24 |
19321600 ps |
| T1138 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.2001599998 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:24:49 PM PDT 24 |
64265100 ps |
| T1139 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.3102618348 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:15 PM PDT 24 |
35547100 ps |
| T281 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.4210202462 |
|
|
Aug 11 06:24:52 PM PDT 24 |
Aug 11 06:37:33 PM PDT 24 |
3277997200 ps |
| T1140 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.4151153455 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
56476200 ps |
| T1141 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.2785191154 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:13 PM PDT 24 |
95210800 ps |
| T1142 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.3299828682 |
|
|
Aug 11 06:24:49 PM PDT 24 |
Aug 11 06:25:05 PM PDT 24 |
11938100 ps |
| T1143 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.580337810 |
|
|
Aug 11 06:24:47 PM PDT 24 |
Aug 11 06:25:04 PM PDT 24 |
75457500 ps |
| T1144 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.1648558259 |
|
|
Aug 11 06:25:04 PM PDT 24 |
Aug 11 06:25:18 PM PDT 24 |
91524900 ps |
| T243 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.3732501016 |
|
|
Aug 11 06:24:34 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
226603300 ps |
| T307 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.1012542291 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:25:07 PM PDT 24 |
111627200 ps |
| T1145 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.52995912 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
118949000 ps |
| T1146 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.2963936479 |
|
|
Aug 11 06:24:41 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
594917000 ps |
| T1147 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.2536792238 |
|
|
Aug 11 06:24:53 PM PDT 24 |
Aug 11 06:25:06 PM PDT 24 |
29127500 ps |
| T1148 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.1578496302 |
|
|
Aug 11 06:24:34 PM PDT 24 |
Aug 11 06:24:48 PM PDT 24 |
21775500 ps |
| T1149 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.489812933 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:24:56 PM PDT 24 |
157909500 ps |
| T1150 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.3701866300 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:24:55 PM PDT 24 |
38861600 ps |
| T1151 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.1466771127 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
21711400 ps |
| T267 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.1943447177 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
60941100 ps |
| T274 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.2776631012 |
|
|
Aug 11 06:24:25 PM PDT 24 |
Aug 11 06:32:01 PM PDT 24 |
1651629500 ps |
| T1152 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.3061596273 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
56577900 ps |
| T277 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.1102866975 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:39:42 PM PDT 24 |
343256200 ps |
| T347 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.2743039409 |
|
|
Aug 11 06:24:58 PM PDT 24 |
Aug 11 06:25:17 PM PDT 24 |
62437800 ps |
| T1153 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.322247923 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:24:51 PM PDT 24 |
355252600 ps |
| T276 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.4143239099 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:02 PM PDT 24 |
36673800 ps |
| T1154 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.3666433307 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
15357000 ps |
| T263 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.2080435941 |
|
|
Aug 11 06:24:34 PM PDT 24 |
Aug 11 06:24:51 PM PDT 24 |
42212500 ps |
| T350 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.1218767840 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:39:36 PM PDT 24 |
1177410800 ps |
| T1155 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.2357219296 |
|
|
Aug 11 06:24:43 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
26764900 ps |
| T1156 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.1403763181 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:15 PM PDT 24 |
17516900 ps |
| T1157 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.2479982056 |
|
|
Aug 11 06:25:01 PM PDT 24 |
Aug 11 06:25:14 PM PDT 24 |
31925900 ps |
| T266 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.1275932413 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
321692500 ps |
| T1158 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.613113784 |
|
|
Aug 11 06:24:48 PM PDT 24 |
Aug 11 06:37:27 PM PDT 24 |
2113965700 ps |
| T1159 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.373990085 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
151128800 ps |
| T1160 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.2830334258 |
|
|
Aug 11 06:24:33 PM PDT 24 |
Aug 11 06:24:47 PM PDT 24 |
38968400 ps |
| T1161 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.2754688615 |
|
|
Aug 11 06:24:47 PM PDT 24 |
Aug 11 06:25:17 PM PDT 24 |
638990600 ps |
| T308 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.375144149 |
|
|
Aug 11 06:24:43 PM PDT 24 |
Aug 11 06:39:30 PM PDT 24 |
857470800 ps |
| T1162 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.4052238692 |
|
|
Aug 11 06:24:23 PM PDT 24 |
Aug 11 06:24:38 PM PDT 24 |
42457700 ps |
| T275 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.3839516781 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:25:00 PM PDT 24 |
119588300 ps |
| T309 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.2042344689 |
|
|
Aug 11 06:24:44 PM PDT 24 |
Aug 11 06:25:55 PM PDT 24 |
12128247600 ps |
| T1163 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.4251846164 |
|
|
Aug 11 06:24:41 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
44649300 ps |
| T1164 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.1044696275 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
24671000 ps |
| T280 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.2437902280 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:59 PM PDT 24 |
47552900 ps |
| T1165 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.183492966 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:04 PM PDT 24 |
84837000 ps |
| T1166 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.2372392966 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:25:10 PM PDT 24 |
30290200 ps |
| T1167 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.2862298067 |
|
|
Aug 11 06:24:46 PM PDT 24 |
Aug 11 06:25:00 PM PDT 24 |
29837800 ps |
| T1168 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.453699769 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
28083300 ps |
| T1169 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.3946382980 |
|
|
Aug 11 06:24:44 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
30694100 ps |
| T1170 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.2827321648 |
|
|
Aug 11 06:24:52 PM PDT 24 |
Aug 11 06:25:05 PM PDT 24 |
12489100 ps |
| T245 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.61929624 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
18268600 ps |
| T310 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.2387026454 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:24:49 PM PDT 24 |
748009400 ps |
| T311 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.4081238422 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:04 PM PDT 24 |
110742800 ps |
| T1171 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.1958229963 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:24:45 PM PDT 24 |
80155400 ps |
| T1172 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.4053523661 |
|
|
Aug 11 06:24:50 PM PDT 24 |
Aug 11 06:25:05 PM PDT 24 |
56179700 ps |
| T1173 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.529012948 |
|
|
Aug 11 06:24:44 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
23372900 ps |
| T1174 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.586317565 |
|
|
Aug 11 06:25:04 PM PDT 24 |
Aug 11 06:25:18 PM PDT 24 |
16750100 ps |
| T1175 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.4143038942 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:24:50 PM PDT 24 |
18243200 ps |
| T353 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.4007197104 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:39:45 PM PDT 24 |
1551458500 ps |
| T1176 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.3065042916 |
|
|
Aug 11 06:24:52 PM PDT 24 |
Aug 11 06:25:09 PM PDT 24 |
201635700 ps |
| T246 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.2431990074 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:24:45 PM PDT 24 |
76494300 ps |
| T1177 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.643603867 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:24:46 PM PDT 24 |
76272400 ps |
| T1178 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.748209531 |
|
|
Aug 11 06:24:37 PM PDT 24 |
Aug 11 06:25:28 PM PDT 24 |
812006500 ps |
| T1179 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.2284618555 |
|
|
Aug 11 06:24:32 PM PDT 24 |
Aug 11 06:24:46 PM PDT 24 |
19111300 ps |
| T1180 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.1214262430 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
24256000 ps |
| T1181 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.2069001383 |
|
|
Aug 11 06:24:43 PM PDT 24 |
Aug 11 06:24:59 PM PDT 24 |
51866100 ps |
| T1182 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.459226817 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:18 PM PDT 24 |
153125800 ps |
| T1183 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.3518511361 |
|
|
Aug 11 06:24:25 PM PDT 24 |
Aug 11 06:24:42 PM PDT 24 |
12674000 ps |
| T1184 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.2765075243 |
|
|
Aug 11 06:24:48 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
24845000 ps |
| T1185 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.1023009450 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
73552500 ps |
| T348 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.4258305241 |
|
|
Aug 11 06:24:29 PM PDT 24 |
Aug 11 06:32:13 PM PDT 24 |
663220100 ps |
| T1186 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.951355012 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:59 PM PDT 24 |
80385300 ps |
| T273 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.350144409 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
37806400 ps |
| T1187 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.429859335 |
|
|
Aug 11 06:25:01 PM PDT 24 |
Aug 11 06:25:15 PM PDT 24 |
17340400 ps |
| T1188 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.1042598000 |
|
|
Aug 11 06:24:30 PM PDT 24 |
Aug 11 06:25:20 PM PDT 24 |
584332800 ps |
| T1189 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.117519163 |
|
|
Aug 11 06:24:53 PM PDT 24 |
Aug 11 06:25:07 PM PDT 24 |
38421400 ps |
| T1190 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.3783976820 |
|
|
Aug 11 06:24:37 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
2906844400 ps |
| T1191 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.1120681754 |
|
|
Aug 11 06:24:35 PM PDT 24 |
Aug 11 06:25:05 PM PDT 24 |
61208300 ps |
| T1192 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.1831733941 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:18 PM PDT 24 |
125394900 ps |
| T1193 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.2979885352 |
|
|
Aug 11 06:24:39 PM PDT 24 |
Aug 11 06:24:52 PM PDT 24 |
14121000 ps |
| T1194 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.123552669 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:24:50 PM PDT 24 |
26929400 ps |
| T1195 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.4187908673 |
|
|
Aug 11 06:24:34 PM PDT 24 |
Aug 11 06:24:48 PM PDT 24 |
17204000 ps |
| T1196 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.3119955267 |
|
|
Aug 11 06:25:01 PM PDT 24 |
Aug 11 06:25:14 PM PDT 24 |
22823000 ps |
| T1197 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.3843484525 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:25:07 PM PDT 24 |
691718700 ps |
| T1198 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.916152424 |
|
|
Aug 11 06:25:00 PM PDT 24 |
Aug 11 06:25:14 PM PDT 24 |
26706500 ps |
| T1199 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.3861192388 |
|
|
Aug 11 06:24:50 PM PDT 24 |
Aug 11 06:25:08 PM PDT 24 |
45148400 ps |
| T1200 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.1779525182 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:25:54 PM PDT 24 |
2229388200 ps |
| T1201 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.4004624607 |
|
|
Aug 11 06:24:41 PM PDT 24 |
Aug 11 06:24:59 PM PDT 24 |
284008900 ps |
| T1202 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.870061071 |
|
|
Aug 11 06:25:05 PM PDT 24 |
Aug 11 06:25:18 PM PDT 24 |
46214000 ps |
| T1203 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.1534335970 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
36935400 ps |
| T1204 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.1092296684 |
|
|
Aug 11 06:24:30 PM PDT 24 |
Aug 11 06:24:43 PM PDT 24 |
57116100 ps |
| T272 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.954770943 |
|
|
Aug 11 06:24:27 PM PDT 24 |
Aug 11 06:24:46 PM PDT 24 |
87582600 ps |
| T1205 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.407661422 |
|
|
Aug 11 06:24:49 PM PDT 24 |
Aug 11 06:25:07 PM PDT 24 |
104683900 ps |
| T1206 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.3866295422 |
|
|
Aug 11 06:24:28 PM PDT 24 |
Aug 11 06:24:59 PM PDT 24 |
679466000 ps |
| T1207 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.3499703328 |
|
|
Aug 11 06:24:47 PM PDT 24 |
Aug 11 06:37:31 PM PDT 24 |
1654981400 ps |
| T1208 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.794451134 |
|
|
Aug 11 06:25:04 PM PDT 24 |
Aug 11 06:25:17 PM PDT 24 |
23573200 ps |
| T1209 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.4107130927 |
|
|
Aug 11 06:24:34 PM PDT 24 |
Aug 11 06:24:48 PM PDT 24 |
63609700 ps |
| T1210 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.922203581 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:39:51 PM PDT 24 |
726763200 ps |
| T1211 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.727539175 |
|
|
Aug 11 06:24:48 PM PDT 24 |
Aug 11 06:25:04 PM PDT 24 |
89553500 ps |
| T1212 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.2608809152 |
|
|
Aug 11 06:24:37 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
18416200 ps |
| T354 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.2590045854 |
|
|
Aug 11 06:24:57 PM PDT 24 |
Aug 11 06:39:54 PM PDT 24 |
2033149300 ps |
| T271 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.171723311 |
|
|
Aug 11 06:24:43 PM PDT 24 |
Aug 11 06:25:03 PM PDT 24 |
228360400 ps |
| T1213 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.1262364570 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:25:29 PM PDT 24 |
1292474900 ps |
| T1214 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.2317885348 |
|
|
Aug 11 06:25:00 PM PDT 24 |
Aug 11 06:25:14 PM PDT 24 |
168715200 ps |
| T1215 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.3561646776 |
|
|
Aug 11 06:24:34 PM PDT 24 |
Aug 11 06:25:37 PM PDT 24 |
650550700 ps |
| T264 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.2063015933 |
|
|
Aug 11 06:24:46 PM PDT 24 |
Aug 11 06:25:04 PM PDT 24 |
152870700 ps |
| T247 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.1234372452 |
|
|
Aug 11 06:24:28 PM PDT 24 |
Aug 11 06:24:42 PM PDT 24 |
75255000 ps |
| T1216 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.3178046256 |
|
|
Aug 11 06:24:47 PM PDT 24 |
Aug 11 06:25:06 PM PDT 24 |
36332000 ps |
| T1217 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.4083614375 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:19 PM PDT 24 |
430196500 ps |
| T265 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.1814676096 |
|
|
Aug 11 06:24:52 PM PDT 24 |
Aug 11 06:25:13 PM PDT 24 |
276583100 ps |
| T278 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.2318660433 |
|
|
Aug 11 06:24:54 PM PDT 24 |
Aug 11 06:25:12 PM PDT 24 |
145258200 ps |
| T1218 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.1078653382 |
|
|
Aug 11 06:24:36 PM PDT 24 |
Aug 11 06:24:52 PM PDT 24 |
51623300 ps |
| T1219 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.4091756469 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
22471400 ps |
| T1220 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.2220210611 |
|
|
Aug 11 06:24:48 PM PDT 24 |
Aug 11 06:25:02 PM PDT 24 |
47745400 ps |
| T1221 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.1315092341 |
|
|
Aug 11 06:24:54 PM PDT 24 |
Aug 11 06:25:10 PM PDT 24 |
303453300 ps |
| T1222 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.3969317914 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:13 PM PDT 24 |
18609200 ps |
| T1223 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.3243533861 |
|
|
Aug 11 06:24:25 PM PDT 24 |
Aug 11 06:24:42 PM PDT 24 |
45759300 ps |
| T1224 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.219760208 |
|
|
Aug 11 06:24:31 PM PDT 24 |
Aug 11 06:24:47 PM PDT 24 |
41456200 ps |
| T279 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.3201981975 |
|
|
Aug 11 06:24:41 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
82308200 ps |
| T1225 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.1619783470 |
|
|
Aug 11 06:24:48 PM PDT 24 |
Aug 11 06:25:02 PM PDT 24 |
46010400 ps |
| T1226 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.3330632919 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
48094500 ps |
| T1227 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.2188596842 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:56 PM PDT 24 |
15524800 ps |
| T1228 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.1242435127 |
|
|
Aug 11 06:25:02 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
111372400 ps |
| T1229 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.208029812 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:13 PM PDT 24 |
55679200 ps |
| T1230 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.3641129762 |
|
|
Aug 11 06:24:43 PM PDT 24 |
Aug 11 06:25:01 PM PDT 24 |
34635400 ps |
| T1231 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.1567355226 |
|
|
Aug 11 06:24:59 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
27149000 ps |
| T1232 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.17731776 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:56 PM PDT 24 |
42811500 ps |
| T351 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.3202116999 |
|
|
Aug 11 06:24:44 PM PDT 24 |
Aug 11 06:39:36 PM PDT 24 |
1383730500 ps |
| T1233 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.302057561 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
56307800 ps |
| T1234 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.1002956750 |
|
|
Aug 11 06:24:49 PM PDT 24 |
Aug 11 06:25:02 PM PDT 24 |
19315500 ps |
| T1235 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.2631372059 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:24:55 PM PDT 24 |
14568700 ps |
| T1236 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.2012247713 |
|
|
Aug 11 06:25:05 PM PDT 24 |
Aug 11 06:25:19 PM PDT 24 |
15874500 ps |
| T1237 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3612951899 |
|
|
Aug 11 06:24:35 PM PDT 24 |
Aug 11 06:24:51 PM PDT 24 |
53488900 ps |
| T1238 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.188043937 |
|
|
Aug 11 06:25:07 PM PDT 24 |
Aug 11 06:25:21 PM PDT 24 |
15317000 ps |
| T1239 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.3612145775 |
|
|
Aug 11 06:25:05 PM PDT 24 |
Aug 11 06:25:19 PM PDT 24 |
25140300 ps |
| T352 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.3792695781 |
|
|
Aug 11 06:24:54 PM PDT 24 |
Aug 11 06:37:34 PM PDT 24 |
1311861400 ps |
| T1240 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.1390775183 |
|
|
Aug 11 06:24:42 PM PDT 24 |
Aug 11 06:24:58 PM PDT 24 |
12769900 ps |
| T1241 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.68934985 |
|
|
Aug 11 06:24:57 PM PDT 24 |
Aug 11 06:25:10 PM PDT 24 |
12891600 ps |
| T1242 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.1517019661 |
|
|
Aug 11 06:25:01 PM PDT 24 |
Aug 11 06:25:17 PM PDT 24 |
57723300 ps |
| T1243 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.2464107213 |
|
|
Aug 11 06:24:34 PM PDT 24 |
Aug 11 06:24:53 PM PDT 24 |
191446300 ps |
| T1244 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.3007706881 |
|
|
Aug 11 06:24:30 PM PDT 24 |
Aug 11 06:24:44 PM PDT 24 |
39571000 ps |
| T1245 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.2181966383 |
|
|
Aug 11 06:24:40 PM PDT 24 |
Aug 11 06:25:16 PM PDT 24 |
317697100 ps |
| T1246 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.1513960946 |
|
|
Aug 11 06:25:03 PM PDT 24 |
Aug 11 06:25:22 PM PDT 24 |
1020543900 ps |
| T1247 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.2321710150 |
|
|
Aug 11 06:24:38 PM PDT 24 |
Aug 11 06:24:54 PM PDT 24 |
46387400 ps |
| T1248 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.3565367044 |
|
|
Aug 11 06:24:30 PM PDT 24 |
Aug 11 06:24:57 PM PDT 24 |
38965100 ps |
| T248 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.1320122784 |
|
|
Aug 11 06:24:43 PM PDT 24 |
Aug 11 06:24:56 PM PDT 24 |
17203000 ps |
| T349 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.3240308308 |
|
|
Aug 11 06:24:47 PM PDT 24 |
Aug 11 06:39:36 PM PDT 24 |
1247638400 ps |
| T1249 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.1746934832 |
|
|
Aug 11 06:24:43 PM PDT 24 |
Aug 11 06:25:00 PM PDT 24 |
25558700 ps |
| T1250 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.3060099725 |
|
|
Aug 11 06:24:45 PM PDT 24 |
Aug 11 06:25:05 PM PDT 24 |
316047400 ps |