| T323 |
/workspace/coverage/default/49.flash_ctrl_hw_sec_otp.2922048592 |
|
|
Aug 14 05:38:16 PM PDT 24 |
Aug 14 05:39:31 PM PDT 24 |
12942359900 ps |
| T1082 |
/workspace/coverage/default/35.flash_ctrl_connect.388924413 |
|
|
Aug 14 05:37:43 PM PDT 24 |
Aug 14 05:37:57 PM PDT 24 |
153638500 ps |
| T1083 |
/workspace/coverage/default/6.flash_ctrl_mp_regions.1328361436 |
|
|
Aug 14 05:35:10 PM PDT 24 |
Aug 14 05:40:52 PM PDT 24 |
35275502500 ps |
| T1084 |
/workspace/coverage/default/6.flash_ctrl_disable.2941987342 |
|
|
Aug 14 05:35:12 PM PDT 24 |
Aug 14 05:35:34 PM PDT 24 |
11980200 ps |
| T1085 |
/workspace/coverage/default/9.flash_ctrl_connect.3181953951 |
|
|
Aug 14 05:35:15 PM PDT 24 |
Aug 14 05:35:28 PM PDT 24 |
31223500 ps |
| T1086 |
/workspace/coverage/default/0.flash_ctrl_connect.221838088 |
|
|
Aug 14 05:34:19 PM PDT 24 |
Aug 14 05:34:33 PM PDT 24 |
44131700 ps |
| T118 |
/workspace/coverage/default/2.flash_ctrl_sec_cm.1850114519 |
|
|
Aug 14 05:34:42 PM PDT 24 |
Aug 14 06:56:35 PM PDT 24 |
1598849300 ps |
| T1087 |
/workspace/coverage/default/39.flash_ctrl_alert_test.1360433310 |
|
|
Aug 14 05:37:53 PM PDT 24 |
Aug 14 05:38:08 PM PDT 24 |
499239400 ps |
| T192 |
/workspace/coverage/default/2.flash_ctrl_rma_err.3421209513 |
|
|
Aug 14 05:34:47 PM PDT 24 |
Aug 14 05:50:33 PM PDT 24 |
82137545800 ps |
| T389 |
/workspace/coverage/default/12.flash_ctrl_disable.1948695288 |
|
|
Aug 14 05:36:05 PM PDT 24 |
Aug 14 05:36:28 PM PDT 24 |
48939200 ps |
| T1088 |
/workspace/coverage/default/8.flash_ctrl_ro_derr.787368556 |
|
|
Aug 14 05:35:18 PM PDT 24 |
Aug 14 05:37:37 PM PDT 24 |
2468876300 ps |
| T1089 |
/workspace/coverage/default/5.flash_ctrl_lcmgr_intg.490990578 |
|
|
Aug 14 05:34:51 PM PDT 24 |
Aug 14 05:35:05 PM PDT 24 |
31695500 ps |
| T1090 |
/workspace/coverage/default/0.flash_ctrl_alert_test.3586577890 |
|
|
Aug 14 05:34:35 PM PDT 24 |
Aug 14 05:34:50 PM PDT 24 |
43525000 ps |
| T1091 |
/workspace/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.1262298758 |
|
|
Aug 14 05:36:02 PM PDT 24 |
Aug 14 05:36:35 PM PDT 24 |
10129484900 ps |
| T1092 |
/workspace/coverage/default/79.flash_ctrl_connect.1005579524 |
|
|
Aug 14 05:38:34 PM PDT 24 |
Aug 14 05:38:48 PM PDT 24 |
122765900 ps |
| T1093 |
/workspace/coverage/default/3.flash_ctrl_mid_op_rst.2397764932 |
|
|
Aug 14 05:34:53 PM PDT 24 |
Aug 14 05:36:03 PM PDT 24 |
3770404100 ps |
| T1094 |
/workspace/coverage/default/9.flash_ctrl_ro_derr.551888571 |
|
|
Aug 14 05:35:10 PM PDT 24 |
Aug 14 05:37:53 PM PDT 24 |
1431869500 ps |
| T1095 |
/workspace/coverage/default/9.flash_ctrl_rw_evict_all_en.2790094187 |
|
|
Aug 14 05:35:15 PM PDT 24 |
Aug 14 05:35:46 PM PDT 24 |
36035400 ps |
| T1096 |
/workspace/coverage/default/8.flash_ctrl_ro.1823782303 |
|
|
Aug 14 05:35:17 PM PDT 24 |
Aug 14 05:37:29 PM PDT 24 |
592843800 ps |
| T1097 |
/workspace/coverage/default/5.flash_ctrl_error_mp.2740479018 |
|
|
Aug 14 05:35:03 PM PDT 24 |
Aug 14 06:18:31 PM PDT 24 |
4441042200 ps |
| T1098 |
/workspace/coverage/default/10.flash_ctrl_alert_test.3668864173 |
|
|
Aug 14 05:35:28 PM PDT 24 |
Aug 14 05:35:42 PM PDT 24 |
63057700 ps |
| T1099 |
/workspace/coverage/default/60.flash_ctrl_otp_reset.1509981628 |
|
|
Aug 14 05:38:16 PM PDT 24 |
Aug 14 05:40:30 PM PDT 24 |
85382400 ps |
| T204 |
/workspace/coverage/default/2.flash_ctrl_rw_derr.2456849191 |
|
|
Aug 14 05:34:49 PM PDT 24 |
Aug 14 05:39:14 PM PDT 24 |
7495743300 ps |
| T1100 |
/workspace/coverage/default/39.flash_ctrl_intr_rd_slow_flash.696860434 |
|
|
Aug 14 05:37:57 PM PDT 24 |
Aug 14 05:42:29 PM PDT 24 |
25627115400 ps |
| T1101 |
/workspace/coverage/default/18.flash_ctrl_prog_reset.448011675 |
|
|
Aug 14 05:36:18 PM PDT 24 |
Aug 14 05:39:39 PM PDT 24 |
8791998000 ps |
| T1102 |
/workspace/coverage/default/67.flash_ctrl_connect.3056617592 |
|
|
Aug 14 05:38:35 PM PDT 24 |
Aug 14 05:38:51 PM PDT 24 |
23753900 ps |
| T1103 |
/workspace/coverage/default/2.flash_ctrl_intr_wr_slow_flash.2107513659 |
|
|
Aug 14 05:34:50 PM PDT 24 |
Aug 14 05:38:08 PM PDT 24 |
43961976600 ps |
| T1104 |
/workspace/coverage/default/2.flash_ctrl_hw_rma_reset.279747430 |
|
|
Aug 14 05:34:49 PM PDT 24 |
Aug 14 05:49:44 PM PDT 24 |
40122968400 ps |
| T1105 |
/workspace/coverage/default/47.flash_ctrl_smoke.4250673177 |
|
|
Aug 14 05:38:10 PM PDT 24 |
Aug 14 05:40:15 PM PDT 24 |
40268600 ps |
| T411 |
/workspace/coverage/default/0.flash_ctrl_disable.2816028234 |
|
|
Aug 14 05:34:25 PM PDT 24 |
Aug 14 05:34:48 PM PDT 24 |
14049100 ps |
| T1106 |
/workspace/coverage/default/16.flash_ctrl_connect.402287697 |
|
|
Aug 14 05:36:04 PM PDT 24 |
Aug 14 05:36:20 PM PDT 24 |
25383600 ps |
| T1107 |
/workspace/coverage/default/50.flash_ctrl_connect.483449217 |
|
|
Aug 14 05:38:17 PM PDT 24 |
Aug 14 05:38:34 PM PDT 24 |
46550700 ps |
| T1108 |
/workspace/coverage/default/1.flash_ctrl_ro_derr.396478975 |
|
|
Aug 14 05:34:45 PM PDT 24 |
Aug 14 05:37:08 PM PDT 24 |
9823356400 ps |
| T1109 |
/workspace/coverage/default/22.flash_ctrl_intr_rd_slow_flash.3685596623 |
|
|
Aug 14 05:36:45 PM PDT 24 |
Aug 14 05:38:57 PM PDT 24 |
10817115300 ps |
| T1110 |
/workspace/coverage/default/6.flash_ctrl_wo.1163916811 |
|
|
Aug 14 05:35:06 PM PDT 24 |
Aug 14 05:39:11 PM PDT 24 |
13086206700 ps |
| T236 |
/workspace/coverage/default/2.flash_ctrl_wr_intg.2921697290 |
|
|
Aug 14 05:34:50 PM PDT 24 |
Aug 14 05:35:05 PM PDT 24 |
469590500 ps |
| T1111 |
/workspace/coverage/default/7.flash_ctrl_rw_evict.2702499430 |
|
|
Aug 14 05:34:59 PM PDT 24 |
Aug 14 05:35:31 PM PDT 24 |
31667400 ps |
| T1112 |
/workspace/coverage/default/65.flash_ctrl_connect.3687515994 |
|
|
Aug 14 05:38:25 PM PDT 24 |
Aug 14 05:38:38 PM PDT 24 |
105817700 ps |
| T1113 |
/workspace/coverage/default/75.flash_ctrl_otp_reset.3800137374 |
|
|
Aug 14 05:38:33 PM PDT 24 |
Aug 14 05:40:48 PM PDT 24 |
131486000 ps |
| T1114 |
/workspace/coverage/default/0.flash_ctrl_hw_rma.1017219488 |
|
|
Aug 14 05:34:24 PM PDT 24 |
Aug 14 06:06:42 PM PDT 24 |
85450264600 ps |
| T1115 |
/workspace/coverage/default/16.flash_ctrl_hw_sec_otp.4017862028 |
|
|
Aug 14 05:36:01 PM PDT 24 |
Aug 14 05:37:29 PM PDT 24 |
2179745700 ps |
| T1116 |
/workspace/coverage/default/7.flash_ctrl_wo.2897220244 |
|
|
Aug 14 05:35:12 PM PDT 24 |
Aug 14 05:37:09 PM PDT 24 |
6051510900 ps |
| T70 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.796232145 |
|
|
Aug 14 05:11:58 PM PDT 24 |
Aug 14 05:12:53 PM PDT 24 |
651105300 ps |
| T71 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.3548255389 |
|
|
Aug 14 05:11:43 PM PDT 24 |
Aug 14 05:11:57 PM PDT 24 |
155243800 ps |
| T271 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.2751918415 |
|
|
Aug 14 05:12:20 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
30692700 ps |
| T72 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.175845892 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:17 PM PDT 24 |
32032200 ps |
| T1117 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.563924344 |
|
|
Aug 14 05:12:10 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
11338400 ps |
| T272 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.2795694339 |
|
|
Aug 14 05:12:26 PM PDT 24 |
Aug 14 05:12:40 PM PDT 24 |
53841500 ps |
| T1118 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.3305802183 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:21 PM PDT 24 |
22567100 ps |
| T107 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.4185702170 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:19:55 PM PDT 24 |
373112100 ps |
| T108 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.984130892 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:10 PM PDT 24 |
435543900 ps |
| T335 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.164251454 |
|
|
Aug 14 05:11:58 PM PDT 24 |
Aug 14 05:12:11 PM PDT 24 |
73725000 ps |
| T109 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.4047853706 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:19:52 PM PDT 24 |
1650635700 ps |
| T1119 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3875094113 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:02 PM PDT 24 |
98406700 ps |
| T252 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.2561426902 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
248786400 ps |
| T1120 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.1066470467 |
|
|
Aug 14 05:12:16 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
45015300 ps |
| T224 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.4220709814 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:03 PM PDT 24 |
91582000 ps |
| T1121 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.1594173437 |
|
|
Aug 14 05:11:46 PM PDT 24 |
Aug 14 05:12:02 PM PDT 24 |
41877600 ps |
| T1122 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.1107639643 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:22 PM PDT 24 |
61949100 ps |
| T1123 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.2104541246 |
|
|
Aug 14 05:11:54 PM PDT 24 |
Aug 14 05:12:09 PM PDT 24 |
22715000 ps |
| T1124 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.4178397591 |
|
|
Aug 14 05:11:54 PM PDT 24 |
Aug 14 05:12:10 PM PDT 24 |
32499600 ps |
| T1125 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.3361991601 |
|
|
Aug 14 05:11:58 PM PDT 24 |
Aug 14 05:12:14 PM PDT 24 |
83045500 ps |
| T336 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.3481950419 |
|
|
Aug 14 05:12:20 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
32508300 ps |
| T338 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.290464417 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:19 PM PDT 24 |
169243400 ps |
| T225 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.2223093473 |
|
|
Aug 14 05:11:57 PM PDT 24 |
Aug 14 05:12:13 PM PDT 24 |
71642400 ps |
| T1126 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.2291169154 |
|
|
Aug 14 05:11:54 PM PDT 24 |
Aug 14 05:12:11 PM PDT 24 |
30730500 ps |
| T1127 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.1251018131 |
|
|
Aug 14 05:12:10 PM PDT 24 |
Aug 14 05:12:24 PM PDT 24 |
22742200 ps |
| T1128 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.4292377740 |
|
|
Aug 14 05:11:57 PM PDT 24 |
Aug 14 05:12:11 PM PDT 24 |
63208600 ps |
| T1129 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.1546159585 |
|
|
Aug 14 05:11:56 PM PDT 24 |
Aug 14 05:12:12 PM PDT 24 |
45894400 ps |
| T247 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.1153696959 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:11:59 PM PDT 24 |
53416900 ps |
| T226 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.260598428 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:25 PM PDT 24 |
173331800 ps |
| T1130 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.3231553409 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:24 PM PDT 24 |
13590700 ps |
| T1131 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.3419719986 |
|
|
Aug 14 05:12:13 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
45065900 ps |
| T339 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.476451650 |
|
|
Aug 14 05:12:22 PM PDT 24 |
Aug 14 05:12:36 PM PDT 24 |
17843700 ps |
| T340 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.2685672532 |
|
|
Aug 14 05:12:19 PM PDT 24 |
Aug 14 05:12:33 PM PDT 24 |
25808700 ps |
| T337 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.1540591122 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
64368700 ps |
| T241 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.2876112910 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:32 PM PDT 24 |
46406200 ps |
| T1132 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.4011528562 |
|
|
Aug 14 05:11:47 PM PDT 24 |
Aug 14 05:12:01 PM PDT 24 |
47460100 ps |
| T1133 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.3202445156 |
|
|
Aug 14 05:11:40 PM PDT 24 |
Aug 14 05:11:56 PM PDT 24 |
15301600 ps |
| T227 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.196872336 |
|
|
Aug 14 05:11:59 PM PDT 24 |
Aug 14 05:18:32 PM PDT 24 |
1228630500 ps |
| T1134 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.2006265574 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:19 PM PDT 24 |
23766300 ps |
| T253 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.1741082260 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:25 PM PDT 24 |
111051600 ps |
| T228 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.349607016 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
60554200 ps |
| T1135 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.4282670519 |
|
|
Aug 14 05:12:20 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
29756000 ps |
| T242 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.264024777 |
|
|
Aug 14 05:12:16 PM PDT 24 |
Aug 14 05:25:00 PM PDT 24 |
1758645600 ps |
| T244 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.2200867096 |
|
|
Aug 14 05:12:16 PM PDT 24 |
Aug 14 05:19:59 PM PDT 24 |
443053500 ps |
| T254 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.2643769996 |
|
|
Aug 14 05:12:02 PM PDT 24 |
Aug 14 05:12:19 PM PDT 24 |
38824300 ps |
| T1136 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.982060207 |
|
|
Aug 14 05:12:13 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
13936400 ps |
| T243 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.227979692 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:24:40 PM PDT 24 |
703071000 ps |
| T1137 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.2068118029 |
|
|
Aug 14 05:11:46 PM PDT 24 |
Aug 14 05:12:13 PM PDT 24 |
53985400 ps |
| T245 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.4019964185 |
|
|
Aug 14 05:11:53 PM PDT 24 |
Aug 14 05:12:13 PM PDT 24 |
59093100 ps |
| T1138 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.3425257261 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:23 PM PDT 24 |
46326300 ps |
| T1139 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.1628487568 |
|
|
Aug 14 05:11:38 PM PDT 24 |
Aug 14 05:11:54 PM PDT 24 |
15472800 ps |
| T1140 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.359026868 |
|
|
Aug 14 05:12:18 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
24235600 ps |
| T1141 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.281393801 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:21 PM PDT 24 |
53263400 ps |
| T288 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.3441083638 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:18:34 PM PDT 24 |
806781100 ps |
| T1142 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.2893469264 |
|
|
Aug 14 05:12:14 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
15048100 ps |
| T255 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.3870404099 |
|
|
Aug 14 05:12:17 PM PDT 24 |
Aug 14 05:12:32 PM PDT 24 |
189369100 ps |
| T1143 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.2127625694 |
|
|
Aug 14 05:11:51 PM PDT 24 |
Aug 14 05:13:08 PM PDT 24 |
4387992500 ps |
| T248 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.1690291379 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:11:59 PM PDT 24 |
37310700 ps |
| T1144 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.1609449428 |
|
|
Aug 14 05:12:21 PM PDT 24 |
Aug 14 05:12:35 PM PDT 24 |
26112400 ps |
| T1145 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.55275497 |
|
|
Aug 14 05:12:16 PM PDT 24 |
Aug 14 05:12:30 PM PDT 24 |
27258500 ps |
| T1146 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.3669863420 |
|
|
Aug 14 05:12:02 PM PDT 24 |
Aug 14 05:12:16 PM PDT 24 |
47419500 ps |
| T1147 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.4112476310 |
|
|
Aug 14 05:12:23 PM PDT 24 |
Aug 14 05:12:37 PM PDT 24 |
30137700 ps |
| T1148 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.1017705305 |
|
|
Aug 14 05:12:12 PM PDT 24 |
Aug 14 05:12:25 PM PDT 24 |
34266400 ps |
| T429 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.2955891695 |
|
|
Aug 14 05:11:44 PM PDT 24 |
Aug 14 05:12:59 PM PDT 24 |
9846252400 ps |
| T281 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.2347510394 |
|
|
Aug 14 05:11:57 PM PDT 24 |
Aug 14 05:24:33 PM PDT 24 |
729967900 ps |
| T1149 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.2909025403 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:00 PM PDT 24 |
44233900 ps |
| T246 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.2357200728 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:24 PM PDT 24 |
149513600 ps |
| T1150 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.2566630947 |
|
|
Aug 14 05:12:23 PM PDT 24 |
Aug 14 05:12:37 PM PDT 24 |
54238100 ps |
| T286 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.3013837890 |
|
|
Aug 14 05:11:43 PM PDT 24 |
Aug 14 05:19:29 PM PDT 24 |
702003000 ps |
| T1151 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.614284154 |
|
|
Aug 14 05:12:10 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
44989400 ps |
| T1152 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.306928122 |
|
|
Aug 14 05:12:11 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
92348500 ps |
| T1153 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.617143683 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:12 PM PDT 24 |
49471800 ps |
| T284 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.1626519903 |
|
|
Aug 14 05:11:42 PM PDT 24 |
Aug 14 05:26:51 PM PDT 24 |
758601800 ps |
| T256 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.1723099754 |
|
|
Aug 14 05:11:35 PM PDT 24 |
Aug 14 05:11:53 PM PDT 24 |
86011300 ps |
| T264 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.1399839963 |
|
|
Aug 14 05:11:42 PM PDT 24 |
Aug 14 05:12:04 PM PDT 24 |
66823900 ps |
| T257 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.977967110 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:33 PM PDT 24 |
63831900 ps |
| T258 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.2169833822 |
|
|
Aug 14 05:11:56 PM PDT 24 |
Aug 14 05:12:27 PM PDT 24 |
69691000 ps |
| T267 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.649794108 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:23 PM PDT 24 |
51399100 ps |
| T1154 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.1108844198 |
|
|
Aug 14 05:12:23 PM PDT 24 |
Aug 14 05:12:36 PM PDT 24 |
45612400 ps |
| T1155 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.2284503861 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:19 PM PDT 24 |
42187500 ps |
| T1156 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.3764376352 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:22 PM PDT 24 |
11710300 ps |
| T1157 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.2275818274 |
|
|
Aug 14 05:11:38 PM PDT 24 |
Aug 14 05:11:52 PM PDT 24 |
45962100 ps |
| T287 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.1549547278 |
|
|
Aug 14 05:11:37 PM PDT 24 |
Aug 14 05:26:35 PM PDT 24 |
679738300 ps |
| T274 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.3009465220 |
|
|
Aug 14 05:12:17 PM PDT 24 |
Aug 14 05:24:59 PM PDT 24 |
734449300 ps |
| T1158 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.1944506131 |
|
|
Aug 14 05:11:46 PM PDT 24 |
Aug 14 05:12:06 PM PDT 24 |
59920100 ps |
| T1159 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.1794393685 |
|
|
Aug 14 05:11:56 PM PDT 24 |
Aug 14 05:12:41 PM PDT 24 |
159354700 ps |
| T307 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.3848727029 |
|
|
Aug 14 05:11:51 PM PDT 24 |
Aug 14 05:12:06 PM PDT 24 |
253625700 ps |
| T1160 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.2115689515 |
|
|
Aug 14 05:12:23 PM PDT 24 |
Aug 14 05:12:37 PM PDT 24 |
34188300 ps |
| T275 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.3135403959 |
|
|
Aug 14 05:12:19 PM PDT 24 |
Aug 14 05:20:04 PM PDT 24 |
1564239600 ps |
| T1161 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.3733009461 |
|
|
Aug 14 05:12:22 PM PDT 24 |
Aug 14 05:12:35 PM PDT 24 |
16956200 ps |
| T1162 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.3667496922 |
|
|
Aug 14 05:12:07 PM PDT 24 |
Aug 14 05:12:27 PM PDT 24 |
1153310000 ps |
| T1163 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.2245086046 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:21 PM PDT 24 |
11160300 ps |
| T280 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.3457611785 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:21 PM PDT 24 |
40398600 ps |
| T1164 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.1102114233 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:11:59 PM PDT 24 |
108116000 ps |
| T308 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.2706283975 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
1502435500 ps |
| T269 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.996365050 |
|
|
Aug 14 05:12:17 PM PDT 24 |
Aug 14 05:27:18 PM PDT 24 |
746115300 ps |
| T285 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.2635141308 |
|
|
Aug 14 05:12:20 PM PDT 24 |
Aug 14 05:12:38 PM PDT 24 |
48924900 ps |
| T1165 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.4202254460 |
|
|
Aug 14 05:11:58 PM PDT 24 |
Aug 14 05:12:13 PM PDT 24 |
47665000 ps |
| T265 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.1486359402 |
|
|
Aug 14 05:12:04 PM PDT 24 |
Aug 14 05:12:24 PM PDT 24 |
55715100 ps |
| T1166 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.2407130622 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:22 PM PDT 24 |
13030900 ps |
| T1167 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.2109208322 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:25 PM PDT 24 |
52719400 ps |
| T1168 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.1455550367 |
|
|
Aug 14 05:11:56 PM PDT 24 |
Aug 14 05:12:14 PM PDT 24 |
88744700 ps |
| T309 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.2918421817 |
|
|
Aug 14 05:11:43 PM PDT 24 |
Aug 14 05:12:15 PM PDT 24 |
33770000 ps |
| T1169 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.989710008 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:38 PM PDT 24 |
443845400 ps |
| T270 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.2260172320 |
|
|
Aug 14 05:12:13 PM PDT 24 |
Aug 14 05:12:33 PM PDT 24 |
107337600 ps |
| T276 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.320323153 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
421474500 ps |
| T266 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.1072211172 |
|
|
Aug 14 05:12:19 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
1096669900 ps |
| T1170 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.2652576402 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
49132200 ps |
| T1171 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.4096024717 |
|
|
Aug 14 05:11:50 PM PDT 24 |
Aug 14 05:12:04 PM PDT 24 |
53343700 ps |
| T1172 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.3314112563 |
|
|
Aug 14 05:12:18 PM PDT 24 |
Aug 14 05:12:31 PM PDT 24 |
49140600 ps |
| T1173 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.1820113521 |
|
|
Aug 14 05:12:20 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
53226900 ps |
| T1174 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.567573965 |
|
|
Aug 14 05:11:40 PM PDT 24 |
Aug 14 05:12:18 PM PDT 24 |
2743380100 ps |
| T1175 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.1866161332 |
|
|
Aug 14 05:11:40 PM PDT 24 |
Aug 14 05:18:18 PM PDT 24 |
406472500 ps |
| T273 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.3981910786 |
|
|
Aug 14 05:11:57 PM PDT 24 |
Aug 14 05:12:15 PM PDT 24 |
70580200 ps |
| T278 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.116571309 |
|
|
Aug 14 05:12:14 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
122389300 ps |
| T1176 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.4026526701 |
|
|
Aug 14 05:12:21 PM PDT 24 |
Aug 14 05:12:35 PM PDT 24 |
239875900 ps |
| T1177 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.2786788886 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:13 PM PDT 24 |
47949200 ps |
| T1178 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.858329906 |
|
|
Aug 14 05:12:13 PM PDT 24 |
Aug 14 05:12:32 PM PDT 24 |
501784000 ps |
| T1179 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.1979353897 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:02 PM PDT 24 |
70787800 ps |
| T1180 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.3596736772 |
|
|
Aug 14 05:11:38 PM PDT 24 |
Aug 14 05:11:51 PM PDT 24 |
74345800 ps |
| T1181 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.897615903 |
|
|
Aug 14 05:12:17 PM PDT 24 |
Aug 14 05:12:30 PM PDT 24 |
18365700 ps |
| T1182 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.1376885910 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:01 PM PDT 24 |
22784600 ps |
| T1183 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.1126239694 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:22 PM PDT 24 |
128565100 ps |
| T1184 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.1768369684 |
|
|
Aug 14 05:12:10 PM PDT 24 |
Aug 14 05:12:23 PM PDT 24 |
30915600 ps |
| T1185 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.3595800488 |
|
|
Aug 14 05:12:09 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
236090500 ps |
| T249 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.1041470431 |
|
|
Aug 14 05:11:51 PM PDT 24 |
Aug 14 05:12:05 PM PDT 24 |
94685800 ps |
| T277 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.3589761518 |
|
|
Aug 14 05:12:17 PM PDT 24 |
Aug 14 05:12:33 PM PDT 24 |
74373300 ps |
| T1186 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.3765610911 |
|
|
Aug 14 05:11:46 PM PDT 24 |
Aug 14 05:12:03 PM PDT 24 |
91691300 ps |
| T382 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.3920960452 |
|
|
Aug 14 05:12:11 PM PDT 24 |
Aug 14 05:27:19 PM PDT 24 |
1314757900 ps |
| T1187 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.3254422493 |
|
|
Aug 14 05:11:44 PM PDT 24 |
Aug 14 05:11:57 PM PDT 24 |
24719600 ps |
| T1188 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.938962837 |
|
|
Aug 14 05:12:21 PM PDT 24 |
Aug 14 05:12:35 PM PDT 24 |
16657600 ps |
| T310 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.4244036334 |
|
|
Aug 14 05:11:57 PM PDT 24 |
Aug 14 05:12:16 PM PDT 24 |
167914300 ps |
| T1189 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.1884681089 |
|
|
Aug 14 05:11:43 PM PDT 24 |
Aug 14 05:11:56 PM PDT 24 |
17115300 ps |
| T1190 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.1160766270 |
|
|
Aug 14 05:12:07 PM PDT 24 |
Aug 14 05:12:40 PM PDT 24 |
64666700 ps |
| T1191 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.3339348497 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
311373800 ps |
| T1192 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.120748408 |
|
|
Aug 14 05:12:13 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
25550300 ps |
| T1193 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.1519459540 |
|
|
Aug 14 05:11:46 PM PDT 24 |
Aug 14 05:12:00 PM PDT 24 |
16284700 ps |
| T279 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.2850228160 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:15 PM PDT 24 |
64444100 ps |
| T1194 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.3082362046 |
|
|
Aug 14 05:11:56 PM PDT 24 |
Aug 14 05:12:10 PM PDT 24 |
18940500 ps |
| T282 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.1386088297 |
|
|
Aug 14 05:11:58 PM PDT 24 |
Aug 14 05:12:17 PM PDT 24 |
117204200 ps |
| T1195 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.3950666705 |
|
|
Aug 14 05:12:25 PM PDT 24 |
Aug 14 05:12:38 PM PDT 24 |
15039000 ps |
| T1196 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.1867402753 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:19 PM PDT 24 |
15450900 ps |
| T1197 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.1329508685 |
|
|
Aug 14 05:12:06 PM PDT 24 |
Aug 14 05:12:23 PM PDT 24 |
27996200 ps |
| T1198 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.1787425879 |
|
|
Aug 14 05:11:42 PM PDT 24 |
Aug 14 05:11:57 PM PDT 24 |
430666200 ps |
| T1199 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.4037247129 |
|
|
Aug 14 05:12:09 PM PDT 24 |
Aug 14 05:19:49 PM PDT 24 |
554492000 ps |
| T1200 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.3429166075 |
|
|
Aug 14 05:11:59 PM PDT 24 |
Aug 14 05:12:16 PM PDT 24 |
65282100 ps |
| T1201 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.2274022850 |
|
|
Aug 14 05:11:56 PM PDT 24 |
Aug 14 05:12:14 PM PDT 24 |
52017900 ps |
| T1202 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.710141020 |
|
|
Aug 14 05:11:46 PM PDT 24 |
Aug 14 05:13:05 PM PDT 24 |
4457058300 ps |
| T1203 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.2809503888 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:18:26 PM PDT 24 |
666601600 ps |
| T1204 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.1659681827 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
143148400 ps |
| T1205 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.1419449722 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:19 PM PDT 24 |
51330500 ps |
| T1206 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.3353649171 |
|
|
Aug 14 05:12:20 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
24981200 ps |
| T1207 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.1658759909 |
|
|
Aug 14 05:12:26 PM PDT 24 |
Aug 14 05:12:39 PM PDT 24 |
137828400 ps |
| T1208 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.1733661528 |
|
|
Aug 14 05:11:50 PM PDT 24 |
Aug 14 05:12:06 PM PDT 24 |
58707300 ps |
| T1209 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.2189998822 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
65546900 ps |
| T1210 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.3756229401 |
|
|
Aug 14 05:12:12 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
163190200 ps |
| T1211 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.3983219144 |
|
|
Aug 14 05:11:47 PM PDT 24 |
Aug 14 05:12:08 PM PDT 24 |
165784300 ps |
| T1212 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.3282159997 |
|
|
Aug 14 05:12:22 PM PDT 24 |
Aug 14 05:12:36 PM PDT 24 |
29854000 ps |
| T1213 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.4019444794 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:09 PM PDT 24 |
43878200 ps |
| T1214 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.472740042 |
|
|
Aug 14 05:12:16 PM PDT 24 |
Aug 14 05:12:33 PM PDT 24 |
131689100 ps |
| T1215 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.2738016194 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
17083600 ps |
| T1216 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.1439154592 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:11:59 PM PDT 24 |
14585000 ps |
| T311 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.3566921200 |
|
|
Aug 14 05:12:18 PM PDT 24 |
Aug 14 05:12:34 PM PDT 24 |
94553100 ps |
| T1217 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.2362430245 |
|
|
Aug 14 05:11:42 PM PDT 24 |
Aug 14 05:11:58 PM PDT 24 |
39116300 ps |
| T1218 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.1750602412 |
|
|
Aug 14 05:11:49 PM PDT 24 |
Aug 14 05:12:02 PM PDT 24 |
29524300 ps |
| T1219 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.3387618523 |
|
|
Aug 14 05:12:14 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
15760900 ps |
| T1220 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.3647619797 |
|
|
Aug 14 05:11:50 PM PDT 24 |
Aug 14 05:12:04 PM PDT 24 |
14476900 ps |
| T1221 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.1055882442 |
|
|
Aug 14 05:11:57 PM PDT 24 |
Aug 14 05:12:15 PM PDT 24 |
26531900 ps |
| T1222 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.4073469380 |
|
|
Aug 14 05:12:07 PM PDT 24 |
Aug 14 05:12:20 PM PDT 24 |
11797300 ps |
| T1223 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.3621725910 |
|
|
Aug 14 05:12:14 PM PDT 24 |
Aug 14 05:12:30 PM PDT 24 |
16032200 ps |
| T1224 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.1489648726 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:30 PM PDT 24 |
82825800 ps |
| T1225 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.1756912263 |
|
|
Aug 14 05:11:58 PM PDT 24 |
Aug 14 05:12:53 PM PDT 24 |
1742220000 ps |
| T289 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.3258459291 |
|
|
Aug 14 05:12:04 PM PDT 24 |
Aug 14 05:12:19 PM PDT 24 |
49329900 ps |
| T1226 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.527167766 |
|
|
Aug 14 05:11:47 PM PDT 24 |
Aug 14 05:12:04 PM PDT 24 |
416208600 ps |
| T1227 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.2076089633 |
|
|
Aug 14 05:12:09 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
176673000 ps |
| T268 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.3494230578 |
|
|
Aug 14 05:11:47 PM PDT 24 |
Aug 14 05:19:26 PM PDT 24 |
2053841700 ps |
| T1228 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.2736169231 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
2338635800 ps |
| T1229 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.2606236541 |
|
|
Aug 14 05:11:58 PM PDT 24 |
Aug 14 05:12:15 PM PDT 24 |
45090000 ps |
| T312 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.2293658014 |
|
|
Aug 14 05:12:08 PM PDT 24 |
Aug 14 05:12:25 PM PDT 24 |
56263300 ps |
| T1230 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.862894854 |
|
|
Aug 14 05:11:47 PM PDT 24 |
Aug 14 05:12:00 PM PDT 24 |
31866800 ps |
| T283 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.3734761720 |
|
|
Aug 14 05:11:39 PM PDT 24 |
Aug 14 05:12:00 PM PDT 24 |
56623600 ps |
| T313 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.2447185404 |
|
|
Aug 14 05:11:51 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
840351400 ps |
| T1231 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.1853094902 |
|
|
Aug 14 05:12:14 PM PDT 24 |
Aug 14 05:12:30 PM PDT 24 |
19554600 ps |
| T1232 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.1461986933 |
|
|
Aug 14 05:12:10 PM PDT 24 |
Aug 14 05:12:39 PM PDT 24 |
65132900 ps |
| T1233 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.355709152 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
232881100 ps |
| T1234 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.4010835910 |
|
|
Aug 14 05:12:16 PM PDT 24 |
Aug 14 05:12:30 PM PDT 24 |
57193400 ps |
| T1235 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.2862216336 |
|
|
Aug 14 05:11:41 PM PDT 24 |
Aug 14 05:12:07 PM PDT 24 |
87566700 ps |
| T1236 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.2827304807 |
|
|
Aug 14 05:12:05 PM PDT 24 |
Aug 14 05:12:23 PM PDT 24 |
196948000 ps |
| T381 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.3391916261 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:24:53 PM PDT 24 |
2848719900 ps |
| T314 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.2299261175 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:04 PM PDT 24 |
376971700 ps |
| T1237 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.2802640455 |
|
|
Aug 14 05:12:07 PM PDT 24 |
Aug 14 05:12:24 PM PDT 24 |
36152100 ps |
| T1238 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.3344649763 |
|
|
Aug 14 05:11:45 PM PDT 24 |
Aug 14 05:12:01 PM PDT 24 |
18915600 ps |
| T315 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.451573025 |
|
|
Aug 14 05:12:09 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
195814300 ps |
| T1239 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.727796757 |
|
|
Aug 14 05:12:09 PM PDT 24 |
Aug 14 05:12:28 PM PDT 24 |
98175000 ps |
| T1240 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.3382616667 |
|
|
Aug 14 05:12:13 PM PDT 24 |
Aug 14 05:12:27 PM PDT 24 |
14299400 ps |
| T1241 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.3928265326 |
|
|
Aug 14 05:12:21 PM PDT 24 |
Aug 14 05:12:35 PM PDT 24 |
70077000 ps |
| T1242 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.1305076344 |
|
|
Aug 14 05:12:10 PM PDT 24 |
Aug 14 05:12:29 PM PDT 24 |
100528900 ps |
| T1243 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.2164548049 |
|
|
Aug 14 05:12:25 PM PDT 24 |
Aug 14 05:12:38 PM PDT 24 |
32222800 ps |
| T1244 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.4291205077 |
|
|
Aug 14 05:12:15 PM PDT 24 |
Aug 14 05:12:32 PM PDT 24 |
97737200 ps |
| T1245 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.3667514147 |
|
|
Aug 14 05:12:17 PM PDT 24 |
Aug 14 05:12:33 PM PDT 24 |
25603500 ps |
| T1246 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.1403969367 |
|
|
Aug 14 05:11:43 PM PDT 24 |
Aug 14 05:12:26 PM PDT 24 |
1140577000 ps |
| T250 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.670488481 |
|
|
Aug 14 05:11:50 PM PDT 24 |
Aug 14 05:12:04 PM PDT 24 |
69086100 ps |
| T1247 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.1380676298 |
|
|
Aug 14 05:11:56 PM PDT 24 |
Aug 14 05:12:12 PM PDT 24 |
43586100 ps |
| T1248 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.1407101731 |
|
|
Aug 14 05:12:26 PM PDT 24 |
Aug 14 05:12:40 PM PDT 24 |
27448000 ps |
| T251 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.2835450116 |
|
|
Aug 14 05:11:44 PM PDT 24 |
Aug 14 05:11:59 PM PDT 24 |
48952900 ps |
| T1249 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.3171262490 |
|
|
Aug 14 05:11:57 PM PDT 24 |
Aug 14 05:12:14 PM PDT 24 |
146277400 ps |
| T316 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.3570822640 |
|
|
Aug 14 05:11:55 PM PDT 24 |
Aug 14 05:12:32 PM PDT 24 |
373402400 ps |
| T1250 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.3968403852 |
|
|
Aug 14 05:12:13 PM PDT 24 |
Aug 14 05:12:27 PM PDT 24 |
28512500 ps |