| T1071 |
/workspace/coverage/default/44.flash_ctrl_sec_info_access.3960991224 |
|
|
Aug 15 06:42:31 PM PDT 24 |
Aug 15 06:43:42 PM PDT 24 |
8125117300 ps |
| T1072 |
/workspace/coverage/default/8.flash_ctrl_rw_derr.1757275908 |
|
|
Aug 15 06:39:22 PM PDT 24 |
Aug 15 06:43:00 PM PDT 24 |
1418134100 ps |
| T1073 |
/workspace/coverage/default/5.flash_ctrl_rw_evict.1060430666 |
|
|
Aug 15 06:39:21 PM PDT 24 |
Aug 15 06:39:52 PM PDT 24 |
38552600 ps |
| T1074 |
/workspace/coverage/default/38.flash_ctrl_disable.3423256533 |
|
|
Aug 15 06:42:15 PM PDT 24 |
Aug 15 06:42:37 PM PDT 24 |
26441900 ps |
| T1075 |
/workspace/coverage/default/14.flash_ctrl_wo.573176122 |
|
|
Aug 15 06:40:14 PM PDT 24 |
Aug 15 06:44:20 PM PDT 24 |
3014586600 ps |
| T1076 |
/workspace/coverage/default/15.flash_ctrl_wo.157185811 |
|
|
Aug 15 06:40:24 PM PDT 24 |
Aug 15 06:43:20 PM PDT 24 |
12354090200 ps |
| T1077 |
/workspace/coverage/default/2.flash_ctrl_rd_intg.470599643 |
|
|
Aug 15 06:38:39 PM PDT 24 |
Aug 15 06:39:11 PM PDT 24 |
111464600 ps |
| T1078 |
/workspace/coverage/default/47.flash_ctrl_alert_test.2313484772 |
|
|
Aug 15 06:42:42 PM PDT 24 |
Aug 15 06:42:56 PM PDT 24 |
26927900 ps |
| T1079 |
/workspace/coverage/default/11.flash_ctrl_sec_info_access.3987981748 |
|
|
Aug 15 06:39:50 PM PDT 24 |
Aug 15 06:41:33 PM PDT 24 |
39163989300 ps |
| T1080 |
/workspace/coverage/default/16.flash_ctrl_rw.2698013332 |
|
|
Aug 15 06:40:30 PM PDT 24 |
Aug 15 06:47:57 PM PDT 24 |
3472959400 ps |
| T1081 |
/workspace/coverage/default/3.flash_ctrl_serr_address.558626922 |
|
|
Aug 15 06:38:53 PM PDT 24 |
Aug 15 06:39:57 PM PDT 24 |
5715279800 ps |
| T1082 |
/workspace/coverage/default/37.flash_ctrl_smoke.775752631 |
|
|
Aug 15 06:42:06 PM PDT 24 |
Aug 15 06:43:45 PM PDT 24 |
32965100 ps |
| T1083 |
/workspace/coverage/default/0.flash_ctrl_integrity.1620729103 |
|
|
Aug 15 06:38:23 PM PDT 24 |
Aug 15 06:49:51 PM PDT 24 |
4698771700 ps |
| T1084 |
/workspace/coverage/default/24.flash_ctrl_smoke.263503201 |
|
|
Aug 15 06:41:17 PM PDT 24 |
Aug 15 06:42:06 PM PDT 24 |
35874400 ps |
| T1085 |
/workspace/coverage/default/36.flash_ctrl_intr_rd.3487067855 |
|
|
Aug 15 06:42:07 PM PDT 24 |
Aug 15 06:45:46 PM PDT 24 |
1612965800 ps |
| T1086 |
/workspace/coverage/default/2.flash_ctrl_connect.2627895218 |
|
|
Aug 15 06:38:45 PM PDT 24 |
Aug 15 06:39:01 PM PDT 24 |
15427800 ps |
| T1087 |
/workspace/coverage/default/45.flash_ctrl_smoke.2437121588 |
|
|
Aug 15 06:42:30 PM PDT 24 |
Aug 15 06:44:34 PM PDT 24 |
18067300 ps |
| T1088 |
/workspace/coverage/default/0.flash_ctrl_smoke.3836008817 |
|
|
Aug 15 06:38:27 PM PDT 24 |
Aug 15 06:40:30 PM PDT 24 |
74733900 ps |
| T1089 |
/workspace/coverage/default/14.flash_ctrl_intr_rd.402147714 |
|
|
Aug 15 06:40:10 PM PDT 24 |
Aug 15 06:44:00 PM PDT 24 |
5354952400 ps |
| T1090 |
/workspace/coverage/default/2.flash_ctrl_host_ctrl_arb.4285684096 |
|
|
Aug 15 06:38:52 PM PDT 24 |
Aug 15 07:11:17 PM PDT 24 |
513888209500 ps |
| T1091 |
/workspace/coverage/default/18.flash_ctrl_mp_regions.252051582 |
|
|
Aug 15 06:40:46 PM PDT 24 |
Aug 15 06:50:53 PM PDT 24 |
9865479200 ps |
| T1092 |
/workspace/coverage/default/11.flash_ctrl_invalid_op.651448092 |
|
|
Aug 15 06:39:49 PM PDT 24 |
Aug 15 06:41:20 PM PDT 24 |
4219674400 ps |
| T1093 |
/workspace/coverage/default/4.flash_ctrl_intr_rd.2176441121 |
|
|
Aug 15 06:39:16 PM PDT 24 |
Aug 15 06:41:25 PM PDT 24 |
2675221200 ps |
| T1094 |
/workspace/coverage/default/15.flash_ctrl_otp_reset.3088363292 |
|
|
Aug 15 06:40:18 PM PDT 24 |
Aug 15 06:42:28 PM PDT 24 |
114554500 ps |
| T1095 |
/workspace/coverage/default/41.flash_ctrl_otp_reset.3640091289 |
|
|
Aug 15 06:42:20 PM PDT 24 |
Aug 15 06:44:34 PM PDT 24 |
332638900 ps |
| T1096 |
/workspace/coverage/default/17.flash_ctrl_hw_sec_otp.732885388 |
|
|
Aug 15 06:40:34 PM PDT 24 |
Aug 15 06:41:59 PM PDT 24 |
9176366300 ps |
| T1097 |
/workspace/coverage/default/3.flash_ctrl_serr_counter.2303624636 |
|
|
Aug 15 06:38:54 PM PDT 24 |
Aug 15 06:39:56 PM PDT 24 |
2268824900 ps |
| T1098 |
/workspace/coverage/default/2.flash_ctrl_phy_host_grant_err.2179504197 |
|
|
Aug 15 06:38:49 PM PDT 24 |
Aug 15 06:39:03 PM PDT 24 |
57881800 ps |
| T1099 |
/workspace/coverage/default/42.flash_ctrl_otp_reset.2647935499 |
|
|
Aug 15 06:42:21 PM PDT 24 |
Aug 15 06:44:33 PM PDT 24 |
156881600 ps |
| T1100 |
/workspace/coverage/default/2.flash_ctrl_hw_rma_reset.277944235 |
|
|
Aug 15 06:38:53 PM PDT 24 |
Aug 15 06:52:41 PM PDT 24 |
160168670600 ps |
| T1101 |
/workspace/coverage/default/9.flash_ctrl_rw_serr.4056752350 |
|
|
Aug 15 06:39:38 PM PDT 24 |
Aug 15 06:43:20 PM PDT 24 |
19850463100 ps |
| T115 |
/workspace/coverage/default/3.flash_ctrl_sec_cm.2518977539 |
|
|
Aug 15 06:38:50 PM PDT 24 |
Aug 15 08:02:12 PM PDT 24 |
1924850800 ps |
| T1102 |
/workspace/coverage/default/17.flash_ctrl_rand_ops.1512416919 |
|
|
Aug 15 06:40:36 PM PDT 24 |
Aug 15 06:49:43 PM PDT 24 |
81472500 ps |
| T1103 |
/workspace/coverage/default/14.flash_ctrl_hw_sec_otp.3804571060 |
|
|
Aug 15 06:40:12 PM PDT 24 |
Aug 15 06:41:14 PM PDT 24 |
1265257400 ps |
| T1104 |
/workspace/coverage/default/18.flash_ctrl_wo.292950432 |
|
|
Aug 15 06:40:46 PM PDT 24 |
Aug 15 06:43:53 PM PDT 24 |
4785205500 ps |
| T1105 |
/workspace/coverage/default/8.flash_ctrl_rw_serr.1785029620 |
|
|
Aug 15 06:39:24 PM PDT 24 |
Aug 15 06:43:23 PM PDT 24 |
3402603500 ps |
| T1106 |
/workspace/coverage/default/17.flash_ctrl_smoke.3475698159 |
|
|
Aug 15 06:40:30 PM PDT 24 |
Aug 15 06:42:32 PM PDT 24 |
29464000 ps |
| T1107 |
/workspace/coverage/default/33.flash_ctrl_rw_evict.2011521803 |
|
|
Aug 15 06:41:59 PM PDT 24 |
Aug 15 06:42:31 PM PDT 24 |
27659900 ps |
| T1108 |
/workspace/coverage/default/2.flash_ctrl_oversize_error.934677475 |
|
|
Aug 15 06:38:36 PM PDT 24 |
Aug 15 06:41:54 PM PDT 24 |
5997807100 ps |
| T1109 |
/workspace/coverage/default/4.flash_ctrl_ro_derr.78400394 |
|
|
Aug 15 06:39:12 PM PDT 24 |
Aug 15 06:42:01 PM PDT 24 |
2788999900 ps |
| T105 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.1217035871 |
|
|
Aug 15 06:38:20 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
902016000 ps |
| T68 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.927465048 |
|
|
Aug 15 06:38:31 PM PDT 24 |
Aug 15 06:38:48 PM PDT 24 |
83719000 ps |
| T106 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.967718542 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:30 PM PDT 24 |
170366400 ps |
| T69 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.1046141458 |
|
|
Aug 15 06:38:20 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
72251900 ps |
| T70 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.2106281206 |
|
|
Aug 15 06:38:05 PM PDT 24 |
Aug 15 06:38:24 PM PDT 24 |
213856900 ps |
| T260 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.611893392 |
|
|
Aug 15 06:38:25 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
172727400 ps |
| T109 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.3108721050 |
|
|
Aug 15 06:38:01 PM PDT 24 |
Aug 15 06:38:47 PM PDT 24 |
162392000 ps |
| T1110 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.269054766 |
|
|
Aug 15 06:38:32 PM PDT 24 |
Aug 15 06:38:48 PM PDT 24 |
33429100 ps |
| T1111 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.3612446209 |
|
|
Aug 15 06:38:02 PM PDT 24 |
Aug 15 06:38:18 PM PDT 24 |
13998200 ps |
| T1112 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.2993174707 |
|
|
Aug 15 06:37:58 PM PDT 24 |
Aug 15 06:38:14 PM PDT 24 |
27728500 ps |
| T1113 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.2216221764 |
|
|
Aug 15 06:38:12 PM PDT 24 |
Aug 15 06:38:28 PM PDT 24 |
41280600 ps |
| T107 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.1014783281 |
|
|
Aug 15 06:38:13 PM PDT 24 |
Aug 15 06:52:59 PM PDT 24 |
355823400 ps |
| T1114 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.1237792679 |
|
|
Aug 15 06:38:10 PM PDT 24 |
Aug 15 06:38:26 PM PDT 24 |
11412900 ps |
| T248 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.131193609 |
|
|
Aug 15 06:38:22 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
207078300 ps |
| T249 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.1315029902 |
|
|
Aug 15 06:38:09 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
436876800 ps |
| T261 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.2621247686 |
|
|
Aug 15 06:38:23 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
45485400 ps |
| T321 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.206379229 |
|
|
Aug 15 06:38:23 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
73821800 ps |
| T322 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.3335183495 |
|
|
Aug 15 06:38:30 PM PDT 24 |
Aug 15 06:38:44 PM PDT 24 |
24235500 ps |
| T1115 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.3307810823 |
|
|
Aug 15 06:38:22 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
24273500 ps |
| T250 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.3397660813 |
|
|
Aug 15 06:38:10 PM PDT 24 |
Aug 15 06:38:24 PM PDT 24 |
153318200 ps |
| T323 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.3133888046 |
|
|
Aug 15 06:38:31 PM PDT 24 |
Aug 15 06:38:45 PM PDT 24 |
118906800 ps |
| T1116 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.2715350368 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:38:23 PM PDT 24 |
14146000 ps |
| T325 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.169423388 |
|
|
Aug 15 06:38:16 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
23272900 ps |
| T329 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.2816012511 |
|
|
Aug 15 06:38:13 PM PDT 24 |
Aug 15 06:38:27 PM PDT 24 |
47604400 ps |
| T324 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.961826619 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:38:21 PM PDT 24 |
94651100 ps |
| T1117 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.3007479626 |
|
|
Aug 15 06:38:22 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
27419900 ps |
| T1118 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.3140257336 |
|
|
Aug 15 06:38:10 PM PDT 24 |
Aug 15 06:38:24 PM PDT 24 |
18810000 ps |
| T108 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.2716839730 |
|
|
Aug 15 06:38:19 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
59064400 ps |
| T1119 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.1248500927 |
|
|
Aug 15 06:38:30 PM PDT 24 |
Aug 15 06:38:44 PM PDT 24 |
23063500 ps |
| T241 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.3974485936 |
|
|
Aug 15 06:37:51 PM PDT 24 |
Aug 15 06:45:32 PM PDT 24 |
525985000 ps |
| T236 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.1525690527 |
|
|
Aug 15 06:38:05 PM PDT 24 |
Aug 15 06:38:21 PM PDT 24 |
343954300 ps |
| T237 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.4181505935 |
|
|
Aug 15 06:38:02 PM PDT 24 |
Aug 15 06:38:17 PM PDT 24 |
110971000 ps |
| T225 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.2141128828 |
|
|
Aug 15 06:38:22 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
169253000 ps |
| T326 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.2312280252 |
|
|
Aug 15 06:38:25 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
48544700 ps |
| T1120 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.1864065203 |
|
|
Aug 15 06:37:56 PM PDT 24 |
Aug 15 06:38:09 PM PDT 24 |
36785100 ps |
| T1121 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.2719780560 |
|
|
Aug 15 06:38:20 PM PDT 24 |
Aug 15 06:38:33 PM PDT 24 |
71505200 ps |
| T1122 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.445985942 |
|
|
Aug 15 06:38:30 PM PDT 24 |
Aug 15 06:38:44 PM PDT 24 |
18093400 ps |
| T238 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.3918720977 |
|
|
Aug 15 06:38:21 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
226881800 ps |
| T239 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.1852984402 |
|
|
Aug 15 06:38:16 PM PDT 24 |
Aug 15 06:38:33 PM PDT 24 |
40199700 ps |
| T328 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.1463943952 |
|
|
Aug 15 06:38:26 PM PDT 24 |
Aug 15 06:38:40 PM PDT 24 |
70412600 ps |
| T251 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.1767830310 |
|
|
Aug 15 06:38:11 PM PDT 24 |
Aug 15 06:38:28 PM PDT 24 |
101706400 ps |
| T297 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.2200975988 |
|
|
Aug 15 06:37:45 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
1425580100 ps |
| T240 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.3108915521 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:45:37 PM PDT 24 |
1100766300 ps |
| T1123 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.2537006723 |
|
|
Aug 15 06:38:38 PM PDT 24 |
Aug 15 06:38:52 PM PDT 24 |
15119800 ps |
| T252 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.1529774277 |
|
|
Aug 15 06:38:20 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
149208000 ps |
| T262 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.2013283328 |
|
|
Aug 15 06:38:18 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
236491400 ps |
| T298 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.651656533 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:32 PM PDT 24 |
84099900 ps |
| T257 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.1137024142 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:31 PM PDT 24 |
520476400 ps |
| T299 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.3325365869 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:38:44 PM PDT 24 |
3527834400 ps |
| T1124 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.3613461435 |
|
|
Aug 15 06:37:54 PM PDT 24 |
Aug 15 06:38:09 PM PDT 24 |
31723600 ps |
| T253 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.66061606 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:33 PM PDT 24 |
131808100 ps |
| T1125 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.290065225 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
16527500 ps |
| T254 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.2133438597 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:41 PM PDT 24 |
18849300 ps |
| T258 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.1158636685 |
|
|
Aug 15 06:37:44 PM PDT 24 |
Aug 15 06:38:01 PM PDT 24 |
139008500 ps |
| T1126 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.1796970333 |
|
|
Aug 15 06:38:19 PM PDT 24 |
Aug 15 06:38:35 PM PDT 24 |
60221200 ps |
| T255 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.1331575545 |
|
|
Aug 15 06:38:48 PM PDT 24 |
Aug 15 06:39:22 PM PDT 24 |
682952700 ps |
| T1127 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.3833234982 |
|
|
Aug 15 06:37:52 PM PDT 24 |
Aug 15 06:38:07 PM PDT 24 |
97659500 ps |
| T300 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.761190992 |
|
|
Aug 15 06:38:20 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
211506300 ps |
| T1128 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.4210846192 |
|
|
Aug 15 06:38:09 PM PDT 24 |
Aug 15 06:38:23 PM PDT 24 |
29673400 ps |
| T301 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.2038000795 |
|
|
Aug 15 06:38:06 PM PDT 24 |
Aug 15 06:38:25 PM PDT 24 |
483162800 ps |
| T269 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.2660590558 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:38:28 PM PDT 24 |
55615400 ps |
| T343 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.3454185610 |
|
|
Aug 15 06:38:03 PM PDT 24 |
Aug 15 06:45:42 PM PDT 24 |
455511100 ps |
| T1129 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.2012442479 |
|
|
Aug 15 06:37:50 PM PDT 24 |
Aug 15 06:38:21 PM PDT 24 |
281039800 ps |
| T1130 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.2332262633 |
|
|
Aug 15 06:37:59 PM PDT 24 |
Aug 15 06:38:13 PM PDT 24 |
62608900 ps |
| T1131 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.3235408582 |
|
|
Aug 15 06:38:09 PM PDT 24 |
Aug 15 06:38:25 PM PDT 24 |
11837800 ps |
| T327 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.968597201 |
|
|
Aug 15 06:37:53 PM PDT 24 |
Aug 15 06:38:06 PM PDT 24 |
24995600 ps |
| T268 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.1883616441 |
|
|
Aug 15 06:38:02 PM PDT 24 |
Aug 15 06:38:22 PM PDT 24 |
541904800 ps |
| T342 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.3679045263 |
|
|
Aug 15 06:38:11 PM PDT 24 |
Aug 15 06:45:51 PM PDT 24 |
997101300 ps |
| T1132 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.2036109017 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:42 PM PDT 24 |
23546100 ps |
| T1133 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.317176871 |
|
|
Aug 15 06:38:01 PM PDT 24 |
Aug 15 06:38:17 PM PDT 24 |
13739400 ps |
| T1134 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.3582014824 |
|
|
Aug 15 06:38:17 PM PDT 24 |
Aug 15 06:38:35 PM PDT 24 |
99667500 ps |
| T302 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.3753278037 |
|
|
Aug 15 06:38:04 PM PDT 24 |
Aug 15 06:38:42 PM PDT 24 |
189584400 ps |
| T1135 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.2490915934 |
|
|
Aug 15 06:38:23 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
50816700 ps |
| T341 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.2986453175 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:53:19 PM PDT 24 |
1716793200 ps |
| T243 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.4254004833 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:38:14 PM PDT 24 |
18758000 ps |
| T1136 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.2682343334 |
|
|
Aug 15 06:37:58 PM PDT 24 |
Aug 15 06:38:14 PM PDT 24 |
46437300 ps |
| T1137 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.3609639877 |
|
|
Aug 15 06:38:02 PM PDT 24 |
Aug 15 06:38:19 PM PDT 24 |
76837400 ps |
| T1138 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.484740368 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:38:54 PM PDT 24 |
6549938400 ps |
| T1139 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.176614283 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:38:36 PM PDT 24 |
960007700 ps |
| T1140 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.2690403237 |
|
|
Aug 15 06:38:25 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
23109500 ps |
| T1141 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.1005248714 |
|
|
Aug 15 06:38:13 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
14820800 ps |
| T266 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.2981568817 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:53:14 PM PDT 24 |
888929500 ps |
| T1142 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.835634988 |
|
|
Aug 15 06:38:06 PM PDT 24 |
Aug 15 06:38:19 PM PDT 24 |
23393600 ps |
| T267 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.3658671001 |
|
|
Aug 15 06:37:56 PM PDT 24 |
Aug 15 06:38:17 PM PDT 24 |
279423800 ps |
| T1143 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.1817009370 |
|
|
Aug 15 06:37:47 PM PDT 24 |
Aug 15 06:38:06 PM PDT 24 |
131116100 ps |
| T1144 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.2685768309 |
|
|
Aug 15 06:38:28 PM PDT 24 |
Aug 15 06:38:45 PM PDT 24 |
13708000 ps |
| T1145 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.3845121186 |
|
|
Aug 15 06:38:03 PM PDT 24 |
Aug 15 06:38:17 PM PDT 24 |
59377300 ps |
| T1146 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.3832330314 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:31 PM PDT 24 |
17721000 ps |
| T1147 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.2521650782 |
|
|
Aug 15 06:38:17 PM PDT 24 |
Aug 15 06:38:31 PM PDT 24 |
14827600 ps |
| T303 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.3069127298 |
|
|
Aug 15 06:38:18 PM PDT 24 |
Aug 15 06:38:36 PM PDT 24 |
1157563800 ps |
| T1148 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.724736737 |
|
|
Aug 15 06:38:39 PM PDT 24 |
Aug 15 06:38:53 PM PDT 24 |
18353400 ps |
| T1149 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.2929431246 |
|
|
Aug 15 06:37:57 PM PDT 24 |
Aug 15 06:38:14 PM PDT 24 |
98231000 ps |
| T1150 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.1129905284 |
|
|
Aug 15 06:38:12 PM PDT 24 |
Aug 15 06:38:25 PM PDT 24 |
11416400 ps |
| T1151 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.3773667174 |
|
|
Aug 15 06:38:29 PM PDT 24 |
Aug 15 06:38:43 PM PDT 24 |
23763800 ps |
| T1152 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.484199852 |
|
|
Aug 15 06:38:19 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
122783400 ps |
| T264 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.2382159776 |
|
|
Aug 15 06:38:23 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
145056200 ps |
| T1153 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.4013233987 |
|
|
Aug 15 06:38:19 PM PDT 24 |
Aug 15 06:38:35 PM PDT 24 |
33228500 ps |
| T1154 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.2554659942 |
|
|
Aug 15 06:38:13 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
15753700 ps |
| T1155 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.4282482700 |
|
|
Aug 15 06:38:01 PM PDT 24 |
Aug 15 06:38:19 PM PDT 24 |
685482400 ps |
| T1156 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.3182713865 |
|
|
Aug 15 06:38:23 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
18438000 ps |
| T1157 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.3143663300 |
|
|
Aug 15 06:38:18 PM PDT 24 |
Aug 15 06:38:32 PM PDT 24 |
29883400 ps |
| T1158 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.3434150609 |
|
|
Aug 15 06:38:29 PM PDT 24 |
Aug 15 06:38:43 PM PDT 24 |
16421300 ps |
| T265 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.3402742839 |
|
|
Aug 15 06:37:48 PM PDT 24 |
Aug 15 06:52:49 PM PDT 24 |
661796800 ps |
| T263 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.1832647072 |
|
|
Aug 15 06:38:16 PM PDT 24 |
Aug 15 06:38:34 PM PDT 24 |
82738900 ps |
| T1159 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.1493116833 |
|
|
Aug 15 06:38:19 PM PDT 24 |
Aug 15 06:38:33 PM PDT 24 |
27581700 ps |
| T1160 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.882536517 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:38:21 PM PDT 24 |
17609900 ps |
| T1161 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.2616439543 |
|
|
Aug 15 06:38:27 PM PDT 24 |
Aug 15 06:38:40 PM PDT 24 |
12909300 ps |
| T304 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.302976908 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:38:17 PM PDT 24 |
803589500 ps |
| T1162 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.2838662030 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:28 PM PDT 24 |
16746700 ps |
| T259 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.3267921527 |
|
|
Aug 15 06:38:09 PM PDT 24 |
Aug 15 06:38:27 PM PDT 24 |
69761700 ps |
| T1163 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.4238443516 |
|
|
Aug 15 06:37:52 PM PDT 24 |
Aug 15 06:38:05 PM PDT 24 |
24471400 ps |
| T305 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.3852347490 |
|
|
Aug 15 06:37:56 PM PDT 24 |
Aug 15 06:38:18 PM PDT 24 |
847535600 ps |
| T1164 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.1877821628 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:30 PM PDT 24 |
53259200 ps |
| T1165 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.2372399249 |
|
|
Aug 15 06:38:17 PM PDT 24 |
Aug 15 06:38:31 PM PDT 24 |
25746000 ps |
| T1166 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.1297072593 |
|
|
Aug 15 06:38:15 PM PDT 24 |
Aug 15 06:38:35 PM PDT 24 |
61181000 ps |
| T1167 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.408932738 |
|
|
Aug 15 06:38:21 PM PDT 24 |
Aug 15 06:38:34 PM PDT 24 |
49557900 ps |
| T1168 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.3398299962 |
|
|
Aug 15 06:38:15 PM PDT 24 |
Aug 15 06:38:34 PM PDT 24 |
100435100 ps |
| T1169 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.1751441999 |
|
|
Aug 15 06:38:13 PM PDT 24 |
Aug 15 06:38:31 PM PDT 24 |
74766400 ps |
| T1170 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.3674627103 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:38:46 PM PDT 24 |
41239400 ps |
| T1171 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.2996693170 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:42 PM PDT 24 |
114117100 ps |
| T1172 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.3919189459 |
|
|
Aug 15 06:38:21 PM PDT 24 |
Aug 15 06:38:34 PM PDT 24 |
116207200 ps |
| T1173 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.3721877361 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:38:16 PM PDT 24 |
21007000 ps |
| T1174 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.1506032604 |
|
|
Aug 15 06:38:29 PM PDT 24 |
Aug 15 06:39:04 PM PDT 24 |
316962100 ps |
| T1175 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.1527337416 |
|
|
Aug 15 06:38:16 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
183986700 ps |
| T1176 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.2507824126 |
|
|
Aug 15 06:38:22 PM PDT 24 |
Aug 15 06:38:36 PM PDT 24 |
15218300 ps |
| T1177 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.2722172841 |
|
|
Aug 15 06:38:27 PM PDT 24 |
Aug 15 06:38:41 PM PDT 24 |
97983900 ps |
| T1178 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.678979740 |
|
|
Aug 15 06:37:59 PM PDT 24 |
Aug 15 06:38:13 PM PDT 24 |
18453600 ps |
| T1179 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.451703264 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
56305000 ps |
| T1180 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.1563567926 |
|
|
Aug 15 06:38:25 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
18135800 ps |
| T1181 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.3731966906 |
|
|
Aug 15 06:38:09 PM PDT 24 |
Aug 15 06:38:23 PM PDT 24 |
16688700 ps |
| T1182 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.3599015105 |
|
|
Aug 15 06:37:46 PM PDT 24 |
Aug 15 06:38:19 PM PDT 24 |
105799500 ps |
| T1183 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.3724576104 |
|
|
Aug 15 06:38:36 PM PDT 24 |
Aug 15 06:38:50 PM PDT 24 |
55193000 ps |
| T271 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.138857280 |
|
|
Aug 15 06:38:01 PM PDT 24 |
Aug 15 06:52:54 PM PDT 24 |
4043664000 ps |
| T1184 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.3715594294 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
147557100 ps |
| T1185 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.67209562 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:45:56 PM PDT 24 |
1035848100 ps |
| T1186 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.2837846478 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:28 PM PDT 24 |
73020600 ps |
| T1187 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.2433556691 |
|
|
Aug 15 06:38:13 PM PDT 24 |
Aug 15 06:38:34 PM PDT 24 |
50711400 ps |
| T1188 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.1382490548 |
|
|
Aug 15 06:38:26 PM PDT 24 |
Aug 15 06:38:40 PM PDT 24 |
25782600 ps |
| T1189 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.4507450 |
|
|
Aug 15 06:37:57 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
1461342300 ps |
| T1190 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.128035841 |
|
|
Aug 15 06:38:04 PM PDT 24 |
Aug 15 06:38:21 PM PDT 24 |
41408000 ps |
| T1191 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.962191558 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:39:26 PM PDT 24 |
9546488400 ps |
| T1192 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.67519150 |
|
|
Aug 15 06:38:20 PM PDT 24 |
Aug 15 06:38:33 PM PDT 24 |
89705500 ps |
| T1193 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.2707451448 |
|
|
Aug 15 06:38:02 PM PDT 24 |
Aug 15 06:38:21 PM PDT 24 |
260483300 ps |
| T344 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.856104884 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:53:23 PM PDT 24 |
2426868900 ps |
| T1194 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.3345898996 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:34 PM PDT 24 |
123426100 ps |
| T1195 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.314550173 |
|
|
Aug 15 06:38:20 PM PDT 24 |
Aug 15 06:38:38 PM PDT 24 |
17713900 ps |
| T272 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.1933364625 |
|
|
Aug 15 06:37:57 PM PDT 24 |
Aug 15 06:53:06 PM PDT 24 |
3230433100 ps |
| T1196 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.4124620173 |
|
|
Aug 15 06:38:28 PM PDT 24 |
Aug 15 06:38:42 PM PDT 24 |
119058800 ps |
| T1197 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.68974601 |
|
|
Aug 15 06:38:33 PM PDT 24 |
Aug 15 06:38:46 PM PDT 24 |
27655800 ps |
| T1198 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.2093854236 |
|
|
Aug 15 06:38:01 PM PDT 24 |
Aug 15 06:39:03 PM PDT 24 |
6442685500 ps |
| T1199 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.137527132 |
|
|
Aug 15 06:38:19 PM PDT 24 |
Aug 15 06:38:32 PM PDT 24 |
16831900 ps |
| T1200 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.1724289000 |
|
|
Aug 15 06:38:23 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
15724400 ps |
| T1201 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.1032220792 |
|
|
Aug 15 06:38:26 PM PDT 24 |
Aug 15 06:38:43 PM PDT 24 |
218187600 ps |
| T1202 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.2554507960 |
|
|
Aug 15 06:37:59 PM PDT 24 |
Aug 15 06:38:15 PM PDT 24 |
31707700 ps |
| T1203 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.2167302480 |
|
|
Aug 15 06:38:15 PM PDT 24 |
Aug 15 06:38:51 PM PDT 24 |
767739200 ps |
| T1204 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.3889887657 |
|
|
Aug 15 06:38:04 PM PDT 24 |
Aug 15 06:38:17 PM PDT 24 |
19923200 ps |
| T1205 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.3693499961 |
|
|
Aug 15 06:38:10 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
122845600 ps |
| T1206 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.798444867 |
|
|
Aug 15 06:38:04 PM PDT 24 |
Aug 15 06:38:41 PM PDT 24 |
1083774800 ps |
| T1207 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.2559140867 |
|
|
Aug 15 06:38:16 PM PDT 24 |
Aug 15 06:38:33 PM PDT 24 |
89814700 ps |
| T1208 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.1844501464 |
|
|
Aug 15 06:37:57 PM PDT 24 |
Aug 15 06:45:39 PM PDT 24 |
639641100 ps |
| T1209 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.1455708068 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:40 PM PDT 24 |
65602700 ps |
| T1210 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.2649247912 |
|
|
Aug 15 06:38:11 PM PDT 24 |
Aug 15 06:38:27 PM PDT 24 |
14321700 ps |
| T244 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.2378081703 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:38:21 PM PDT 24 |
26379400 ps |
| T345 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.1437465462 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:46:18 PM PDT 24 |
721444500 ps |
| T273 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.3035759376 |
|
|
Aug 15 06:38:26 PM PDT 24 |
Aug 15 06:53:30 PM PDT 24 |
669448600 ps |
| T1211 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.2412416612 |
|
|
Aug 15 06:38:21 PM PDT 24 |
Aug 15 06:38:39 PM PDT 24 |
57427800 ps |
| T1212 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.2756163134 |
|
|
Aug 15 06:38:28 PM PDT 24 |
Aug 15 06:38:44 PM PDT 24 |
13944000 ps |
| T1213 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.1574412684 |
|
|
Aug 15 06:38:22 PM PDT 24 |
Aug 15 06:38:36 PM PDT 24 |
97699700 ps |
| T1214 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.4085018628 |
|
|
Aug 15 06:37:53 PM PDT 24 |
Aug 15 06:38:19 PM PDT 24 |
30626200 ps |
| T1215 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.1768294180 |
|
|
Aug 15 06:37:51 PM PDT 24 |
Aug 15 06:38:07 PM PDT 24 |
42536600 ps |
| T1216 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.1354714103 |
|
|
Aug 15 06:38:03 PM PDT 24 |
Aug 15 06:38:20 PM PDT 24 |
86748200 ps |
| T1217 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.1440505497 |
|
|
Aug 15 06:38:08 PM PDT 24 |
Aug 15 06:50:43 PM PDT 24 |
425444100 ps |
| T1218 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.3955110386 |
|
|
Aug 15 06:37:41 PM PDT 24 |
Aug 15 06:37:58 PM PDT 24 |
157192300 ps |
| T1219 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.1390426326 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:44 PM PDT 24 |
57834400 ps |
| T1220 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.2975738409 |
|
|
Aug 15 06:37:54 PM PDT 24 |
Aug 15 06:38:10 PM PDT 24 |
38586100 ps |
| T1221 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.1681807961 |
|
|
Aug 15 06:38:27 PM PDT 24 |
Aug 15 06:51:10 PM PDT 24 |
1342675900 ps |
| T1222 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.2236084721 |
|
|
Aug 15 06:38:08 PM PDT 24 |
Aug 15 06:38:28 PM PDT 24 |
228265100 ps |
| T1223 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.3960600331 |
|
|
Aug 15 06:38:12 PM PDT 24 |
Aug 15 06:38:26 PM PDT 24 |
123275100 ps |
| T1224 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.1534137179 |
|
|
Aug 15 06:38:16 PM PDT 24 |
Aug 15 06:45:55 PM PDT 24 |
368924600 ps |
| T1225 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.1457729462 |
|
|
Aug 15 06:38:02 PM PDT 24 |
Aug 15 06:38:20 PM PDT 24 |
592068000 ps |
| T1226 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.3957196622 |
|
|
Aug 15 06:38:02 PM PDT 24 |
Aug 15 06:38:20 PM PDT 24 |
269971600 ps |
| T1227 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.3636068190 |
|
|
Aug 15 06:38:24 PM PDT 24 |
Aug 15 06:38:40 PM PDT 24 |
43536900 ps |
| T346 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.2069452394 |
|
|
Aug 15 06:38:21 PM PDT 24 |
Aug 15 06:46:09 PM PDT 24 |
6752428500 ps |
| T1228 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.2776433660 |
|
|
Aug 15 06:38:00 PM PDT 24 |
Aug 15 06:38:16 PM PDT 24 |
225585500 ps |
| T1229 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.2298671281 |
|
|
Aug 15 06:38:05 PM PDT 24 |
Aug 15 06:38:20 PM PDT 24 |
65583600 ps |
| T270 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.2239319955 |
|
|
Aug 15 06:38:06 PM PDT 24 |
Aug 15 06:38:26 PM PDT 24 |
60497500 ps |
| T1230 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.3381132821 |
|
|
Aug 15 06:38:12 PM PDT 24 |
Aug 15 06:38:29 PM PDT 24 |
133215200 ps |
| T1231 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.714904954 |
|
|
Aug 15 06:38:08 PM PDT 24 |
Aug 15 06:38:24 PM PDT 24 |
11075500 ps |
| T1232 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.2362082812 |
|
|
Aug 15 06:38:34 PM PDT 24 |
Aug 15 06:38:48 PM PDT 24 |
54222100 ps |
| T1233 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.3477951077 |
|
|
Aug 15 06:38:14 PM PDT 24 |
Aug 15 06:38:28 PM PDT 24 |
21502200 ps |
| T245 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.1718871595 |
|
|
Aug 15 06:37:53 PM PDT 24 |
Aug 15 06:38:06 PM PDT 24 |
31050800 ps |
| T246 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.199422458 |
|
|
Aug 15 06:37:59 PM PDT 24 |
Aug 15 06:38:13 PM PDT 24 |
29458200 ps |
| T247 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.1279406591 |
|
|
Aug 15 06:38:09 PM PDT 24 |
Aug 15 06:38:23 PM PDT 24 |
40592200 ps |
| T1234 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.401239052 |
|
|
Aug 15 06:38:11 PM PDT 24 |
Aug 15 06:38:25 PM PDT 24 |
25600400 ps |
| T1235 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.1711269751 |
|
|
Aug 15 06:38:30 PM PDT 24 |
Aug 15 06:39:04 PM PDT 24 |
61126200 ps |
| T1236 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.495397605 |
|
|
Aug 15 06:38:05 PM PDT 24 |
Aug 15 06:39:34 PM PDT 24 |
20450311600 ps |
| T1237 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.1392430591 |
|
|
Aug 15 06:37:55 PM PDT 24 |
Aug 15 06:38:10 PM PDT 24 |
40977600 ps |
| T1238 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.1979387957 |
|
|
Aug 15 06:38:01 PM PDT 24 |
Aug 15 06:38:15 PM PDT 24 |
16678200 ps |
| T1239 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.1378188745 |
|
|
Aug 15 06:38:03 PM PDT 24 |
Aug 15 06:38:19 PM PDT 24 |
34065500 ps |
| T1240 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.1505602055 |
|
|
Aug 15 06:38:05 PM PDT 24 |
Aug 15 06:38:23 PM PDT 24 |
34640500 ps |
| T1241 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.797197454 |
|
|
Aug 15 06:38:22 PM PDT 24 |
Aug 15 06:38:37 PM PDT 24 |
79141300 ps |
| T1242 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.763674179 |
|
|
Aug 15 06:37:56 PM PDT 24 |
Aug 15 06:38:14 PM PDT 24 |
25857900 ps |
| T1243 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.3373735637 |
|
|
Aug 15 06:38:17 PM PDT 24 |
Aug 15 06:38:31 PM PDT 24 |
22811000 ps |
| T1244 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.206378752 |
|
|
Aug 15 06:38:06 PM PDT 24 |
Aug 15 06:38:24 PM PDT 24 |
239078500 ps |
| T1245 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.4107176046 |
|
|
Aug 15 06:38:05 PM PDT 24 |
Aug 15 06:38:22 PM PDT 24 |
56454400 ps |
| T1246 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.691116640 |
|
|
Aug 15 06:38:18 PM PDT 24 |
Aug 15 06:38:32 PM PDT 24 |
16395500 ps |
| T1247 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.289056322 |
|
|
Aug 15 06:38:07 PM PDT 24 |
Aug 15 06:38:20 PM PDT 24 |
15916200 ps |
| T1248 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.3852837611 |
|
|
Aug 15 06:38:01 PM PDT 24 |
Aug 15 06:38:16 PM PDT 24 |
178331400 ps |
| T1249 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.3601269621 |
|
|
Aug 15 06:37:56 PM PDT 24 |
Aug 15 06:38:10 PM PDT 24 |
15128500 ps |
| T1250 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.1875183730 |
|
|
Aug 15 06:38:17 PM PDT 24 |
Aug 15 06:45:51 PM PDT 24 |
749624600 ps |