Unified Coverage Report :: Group :: flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
85.71	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_env_0.1/flash_ctrl_env_cov.sv

---

Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	1	6	85.71

Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::sw_error_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mp_err	1	0	1	100.00	100	1	1	0
cp_op_err	1	0	1	100.00	100	1	1	0
cp_prog_err	1	0	1	100.00	100	1	1	0
cp_prog_type_err	1	0	1	100.00	100	1	1	0
cp_prog_win_err	1	0	1	100.00	100	1	1	0
cp_rd_err	1	0	1	100.00	100	1	1	0
cp_update_err	1	1	0	0.00	100	1	1	0

Summary for Variable cp_mp_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mp_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	95325	1		T19	4703		T51	5159		T67	35

---

Summary for Variable cp_op_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_op_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	4000	1		T135	200		T260	200		T138	200

---

Summary for Variable cp_prog_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	15	1		T8	5		T9	5		T217	5

---

Summary for Variable cp_prog_type_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_type_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	607	1		T83	84		T84	191		T85	105

---

Summary for Variable cp_prog_win_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_prog_win_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	318	1		T187	13		T188	17		T189	16

---

Summary for Variable cp_rd_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_rd_err

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seen	66928	1		T4	1		T19	4652		T51	2701

---

Summary for Variable cp_update_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for cp_update_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER
seen	0	1	1