| T1073 |
/workspace/coverage/default/15.flash_ctrl_rw_evict.2090681153 |
|
|
Aug 19 06:12:36 PM PDT 24 |
Aug 19 06:13:05 PM PDT 24 |
35513700 ps |
| T1074 |
/workspace/coverage/default/10.flash_ctrl_otp_reset.441499123 |
|
|
Aug 19 06:11:52 PM PDT 24 |
Aug 19 06:14:04 PM PDT 24 |
44615200 ps |
| T1075 |
/workspace/coverage/default/4.flash_ctrl_intr_wr.1650466002 |
|
|
Aug 19 06:10:50 PM PDT 24 |
Aug 19 06:11:59 PM PDT 24 |
2378966000 ps |
| T1076 |
/workspace/coverage/default/15.flash_ctrl_connect.3424493954 |
|
|
Aug 19 06:12:35 PM PDT 24 |
Aug 19 06:12:49 PM PDT 24 |
23629300 ps |
| T1077 |
/workspace/coverage/default/11.flash_ctrl_smoke.2175168730 |
|
|
Aug 19 06:11:51 PM PDT 24 |
Aug 19 06:13:53 PM PDT 24 |
112659400 ps |
| T376 |
/workspace/coverage/default/47.flash_ctrl_sec_info_access.2272460937 |
|
|
Aug 19 06:15:03 PM PDT 24 |
Aug 19 06:16:18 PM PDT 24 |
1205451700 ps |
| T1078 |
/workspace/coverage/default/22.flash_ctrl_smoke.3686661513 |
|
|
Aug 19 06:13:27 PM PDT 24 |
Aug 19 06:15:29 PM PDT 24 |
126718700 ps |
| T1079 |
/workspace/coverage/default/53.flash_ctrl_otp_reset.1098299239 |
|
|
Aug 19 06:15:06 PM PDT 24 |
Aug 19 06:17:19 PM PDT 24 |
38687100 ps |
| T1080 |
/workspace/coverage/default/40.flash_ctrl_otp_reset.2587638443 |
|
|
Aug 19 06:14:36 PM PDT 24 |
Aug 19 06:16:48 PM PDT 24 |
71352900 ps |
| T1081 |
/workspace/coverage/default/38.flash_ctrl_rw_evict_all_en.1150902941 |
|
|
Aug 19 06:14:39 PM PDT 24 |
Aug 19 06:15:10 PM PDT 24 |
41154300 ps |
| T1082 |
/workspace/coverage/default/41.flash_ctrl_alert_test.342901035 |
|
|
Aug 19 06:14:35 PM PDT 24 |
Aug 19 06:14:49 PM PDT 24 |
53665600 ps |
| T1083 |
/workspace/coverage/default/19.flash_ctrl_intr_rd_slow_flash.2864239942 |
|
|
Aug 19 06:13:18 PM PDT 24 |
Aug 19 06:17:19 PM PDT 24 |
34678732500 ps |
| T1084 |
/workspace/coverage/default/36.flash_ctrl_intr_rd.2524159099 |
|
|
Aug 19 06:14:27 PM PDT 24 |
Aug 19 06:18:30 PM PDT 24 |
4736115300 ps |
| T1085 |
/workspace/coverage/default/37.flash_ctrl_intr_rd_slow_flash.579467561 |
|
|
Aug 19 06:14:26 PM PDT 24 |
Aug 19 06:17:07 PM PDT 24 |
6036166000 ps |
| T1086 |
/workspace/coverage/default/13.flash_ctrl_disable.3996517643 |
|
|
Aug 19 06:12:16 PM PDT 24 |
Aug 19 06:12:38 PM PDT 24 |
17087000 ps |
| T1087 |
/workspace/coverage/default/5.flash_ctrl_rand_ops.3451047945 |
|
|
Aug 19 06:10:49 PM PDT 24 |
Aug 19 06:24:53 PM PDT 24 |
99476900 ps |
| T1088 |
/workspace/coverage/default/2.flash_ctrl_serr_counter.1547736389 |
|
|
Aug 19 06:10:10 PM PDT 24 |
Aug 19 06:11:27 PM PDT 24 |
673386300 ps |
| T1089 |
/workspace/coverage/default/10.flash_ctrl_rand_ops.2329525874 |
|
|
Aug 19 06:11:53 PM PDT 24 |
Aug 19 06:15:21 PM PDT 24 |
1423202600 ps |
| T1090 |
/workspace/coverage/default/2.flash_ctrl_fs_sup.3893452738 |
|
|
Aug 19 06:10:19 PM PDT 24 |
Aug 19 06:10:58 PM PDT 24 |
330599400 ps |
| T92 |
/workspace/coverage/default/1.flash_ctrl_mid_op_rst.3322458424 |
|
|
Aug 19 06:09:57 PM PDT 24 |
Aug 19 06:11:11 PM PDT 24 |
671580600 ps |
| T1091 |
/workspace/coverage/default/4.flash_ctrl_disable.1250008312 |
|
|
Aug 19 06:10:51 PM PDT 24 |
Aug 19 06:11:13 PM PDT 24 |
15815900 ps |
| T1092 |
/workspace/coverage/default/8.flash_ctrl_ro.2484961656 |
|
|
Aug 19 06:11:29 PM PDT 24 |
Aug 19 06:13:39 PM PDT 24 |
612410200 ps |
| T367 |
/workspace/coverage/default/45.flash_ctrl_sec_info_access.3398878062 |
|
|
Aug 19 06:14:51 PM PDT 24 |
Aug 19 06:15:59 PM PDT 24 |
9207832300 ps |
| T1093 |
/workspace/coverage/default/49.flash_ctrl_sec_info_access.4017040472 |
|
|
Aug 19 06:15:01 PM PDT 24 |
Aug 19 06:16:01 PM PDT 24 |
2097580600 ps |
| T1094 |
/workspace/coverage/default/8.flash_ctrl_disable.3193588870 |
|
|
Aug 19 06:11:34 PM PDT 24 |
Aug 19 06:11:55 PM PDT 24 |
17555100 ps |
| T1095 |
/workspace/coverage/default/3.flash_ctrl_hw_read_seed_err.265094305 |
|
|
Aug 19 06:10:45 PM PDT 24 |
Aug 19 06:10:59 PM PDT 24 |
48546500 ps |
| T1096 |
/workspace/coverage/default/9.flash_ctrl_lcmgr_intg.2790444720 |
|
|
Aug 19 06:11:50 PM PDT 24 |
Aug 19 06:12:04 PM PDT 24 |
25085600 ps |
| T1097 |
/workspace/coverage/default/4.flash_ctrl_prog_reset.4082268778 |
|
|
Aug 19 06:10:49 PM PDT 24 |
Aug 19 06:14:36 PM PDT 24 |
5462090000 ps |
| T1098 |
/workspace/coverage/default/19.flash_ctrl_intr_rd.3974109144 |
|
|
Aug 19 06:13:19 PM PDT 24 |
Aug 19 06:16:44 PM PDT 24 |
31327822100 ps |
| T1099 |
/workspace/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.3632827464 |
|
|
Aug 19 06:12:57 PM PDT 24 |
Aug 19 06:15:00 PM PDT 24 |
10012959400 ps |
| T1100 |
/workspace/coverage/default/0.flash_ctrl_serr_counter.2083318866 |
|
|
Aug 19 06:09:42 PM PDT 24 |
Aug 19 06:10:57 PM PDT 24 |
5195649900 ps |
| T1101 |
/workspace/coverage/default/27.flash_ctrl_otp_reset.173471431 |
|
|
Aug 19 06:13:48 PM PDT 24 |
Aug 19 06:16:00 PM PDT 24 |
37586000 ps |
| T1102 |
/workspace/coverage/default/0.flash_ctrl_integrity.3540263512 |
|
|
Aug 19 06:09:41 PM PDT 24 |
Aug 19 06:19:28 PM PDT 24 |
3777446600 ps |
| T1103 |
/workspace/coverage/default/41.flash_ctrl_otp_reset.3182527008 |
|
|
Aug 19 06:14:40 PM PDT 24 |
Aug 19 06:16:49 PM PDT 24 |
263062400 ps |
| T1104 |
/workspace/coverage/default/18.flash_ctrl_sec_info_access.900534670 |
|
|
Aug 19 06:13:05 PM PDT 24 |
Aug 19 06:14:30 PM PDT 24 |
6875053300 ps |
| T373 |
/workspace/coverage/default/27.flash_ctrl_sec_info_access.2794362516 |
|
|
Aug 19 06:13:50 PM PDT 24 |
Aug 19 06:14:55 PM PDT 24 |
1240884300 ps |
| T1105 |
/workspace/coverage/default/24.flash_ctrl_intr_rd_slow_flash.1122411915 |
|
|
Aug 19 06:13:46 PM PDT 24 |
Aug 19 06:19:36 PM PDT 24 |
164476907700 ps |
| T1106 |
/workspace/coverage/default/11.flash_ctrl_rand_ops.3885463199 |
|
|
Aug 19 06:11:51 PM PDT 24 |
Aug 19 06:20:40 PM PDT 24 |
627617000 ps |
| T1107 |
/workspace/coverage/default/36.flash_ctrl_smoke.3795687480 |
|
|
Aug 19 06:14:31 PM PDT 24 |
Aug 19 06:17:20 PM PDT 24 |
617418100 ps |
| T73 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.624697663 |
|
|
Aug 19 06:22:38 PM PDT 24 |
Aug 19 06:22:57 PM PDT 24 |
97335700 ps |
| T124 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.2308176918 |
|
|
Aug 19 06:23:03 PM PDT 24 |
Aug 19 06:23:19 PM PDT 24 |
149847300 ps |
| T242 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.68027749 |
|
|
Aug 19 06:22:45 PM PDT 24 |
Aug 19 06:22:59 PM PDT 24 |
73015200 ps |
| T74 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.1290489225 |
|
|
Aug 19 06:22:56 PM PDT 24 |
Aug 19 06:23:35 PM PDT 24 |
95209200 ps |
| T75 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.4184620632 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:35 PM PDT 24 |
155258600 ps |
| T246 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.3104879092 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:28 PM PDT 24 |
396213700 ps |
| T125 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.1130270145 |
|
|
Aug 19 06:23:15 PM PDT 24 |
Aug 19 06:23:32 PM PDT 24 |
80668100 ps |
| T1108 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.4037872388 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
14922200 ps |
| T1109 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.3976723810 |
|
|
Aug 19 06:23:03 PM PDT 24 |
Aug 19 06:23:16 PM PDT 24 |
16698400 ps |
| T129 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.3730079677 |
|
|
Aug 19 06:22:52 PM PDT 24 |
Aug 19 06:23:08 PM PDT 24 |
41909400 ps |
| T126 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.2295954923 |
|
|
Aug 19 06:23:23 PM PDT 24 |
Aug 19 06:23:42 PM PDT 24 |
103036000 ps |
| T1110 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.3369837190 |
|
|
Aug 19 06:22:57 PM PDT 24 |
Aug 19 06:23:12 PM PDT 24 |
21141700 ps |
| T130 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.58088845 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:23:02 PM PDT 24 |
121057200 ps |
| T1111 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.311927027 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
13325400 ps |
| T257 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.3945970630 |
|
|
Aug 19 06:23:00 PM PDT 24 |
Aug 19 06:23:14 PM PDT 24 |
34510200 ps |
| T223 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.1853353880 |
|
|
Aug 19 06:22:50 PM PDT 24 |
Aug 19 06:23:08 PM PDT 24 |
212391900 ps |
| T258 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.4145224648 |
|
|
Aug 19 06:23:23 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
17081300 ps |
| T318 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.3106422445 |
|
|
Aug 19 06:23:13 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
19626300 ps |
| T127 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.1786527632 |
|
|
Aug 19 06:22:49 PM PDT 24 |
Aug 19 06:30:47 PM PDT 24 |
569439700 ps |
| T128 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.3377845077 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:29 PM PDT 24 |
38953600 ps |
| T247 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.613382162 |
|
|
Aug 19 06:22:51 PM PDT 24 |
Aug 19 06:23:11 PM PDT 24 |
126695000 ps |
| T319 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.2182874472 |
|
|
Aug 19 06:23:17 PM PDT 24 |
Aug 19 06:23:31 PM PDT 24 |
16267100 ps |
| T248 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.2134800389 |
|
|
Aug 19 06:22:57 PM PDT 24 |
Aug 19 06:23:15 PM PDT 24 |
363853900 ps |
| T249 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.1920745868 |
|
|
Aug 19 06:23:13 PM PDT 24 |
Aug 19 06:23:31 PM PDT 24 |
414488700 ps |
| T250 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.2250908098 |
|
|
Aug 19 06:22:49 PM PDT 24 |
Aug 19 06:23:02 PM PDT 24 |
141402200 ps |
| T240 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.3031404177 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:31:05 PM PDT 24 |
1612412100 ps |
| T320 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.3205013829 |
|
|
Aug 19 06:23:19 PM PDT 24 |
Aug 19 06:23:33 PM PDT 24 |
15918100 ps |
| T321 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.2509329658 |
|
|
Aug 19 06:23:11 PM PDT 24 |
Aug 19 06:23:24 PM PDT 24 |
16413800 ps |
| T1112 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.2242032249 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:23:21 PM PDT 24 |
12023200 ps |
| T322 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.1484341420 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:21 PM PDT 24 |
24119400 ps |
| T233 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.2679216250 |
|
|
Aug 19 06:22:39 PM PDT 24 |
Aug 19 06:22:59 PM PDT 24 |
611439000 ps |
| T1113 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.3474197168 |
|
|
Aug 19 06:22:58 PM PDT 24 |
Aug 19 06:23:14 PM PDT 24 |
12346100 ps |
| T339 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.4105001123 |
|
|
Aug 19 06:23:21 PM PDT 24 |
Aug 19 06:23:35 PM PDT 24 |
227831500 ps |
| T238 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.465272125 |
|
|
Aug 19 06:23:13 PM PDT 24 |
Aug 19 06:31:18 PM PDT 24 |
473812200 ps |
| T234 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.1905852165 |
|
|
Aug 19 06:22:59 PM PDT 24 |
Aug 19 06:23:15 PM PDT 24 |
38516400 ps |
| T1114 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.3140822100 |
|
|
Aug 19 06:23:22 PM PDT 24 |
Aug 19 06:23:40 PM PDT 24 |
599177100 ps |
| T296 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.3494258302 |
|
|
Aug 19 06:23:17 PM PDT 24 |
Aug 19 06:23:33 PM PDT 24 |
66098400 ps |
| T1115 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.2279454565 |
|
|
Aug 19 06:23:29 PM PDT 24 |
Aug 19 06:23:45 PM PDT 24 |
22002500 ps |
| T1116 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.3492357395 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:23:19 PM PDT 24 |
21523900 ps |
| T235 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.2889409025 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:39:49 PM PDT 24 |
2959074200 ps |
| T236 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.670106240 |
|
|
Aug 19 06:22:41 PM PDT 24 |
Aug 19 06:23:05 PM PDT 24 |
158172600 ps |
| T1117 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.847914908 |
|
|
Aug 19 06:23:24 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
127125500 ps |
| T1118 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.1996678164 |
|
|
Aug 19 06:22:48 PM PDT 24 |
Aug 19 06:23:02 PM PDT 24 |
60084700 ps |
| T1119 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.1488518854 |
|
|
Aug 19 06:22:46 PM PDT 24 |
Aug 19 06:23:06 PM PDT 24 |
742301400 ps |
| T1120 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.2417686700 |
|
|
Aug 19 06:22:53 PM PDT 24 |
Aug 19 06:23:06 PM PDT 24 |
26181400 ps |
| T297 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.1816412631 |
|
|
Aug 19 06:22:53 PM PDT 24 |
Aug 19 06:23:44 PM PDT 24 |
1974888900 ps |
| T1121 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.3127883149 |
|
|
Aug 19 06:22:51 PM PDT 24 |
Aug 19 06:23:07 PM PDT 24 |
12507200 ps |
| T1122 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.3061711655 |
|
|
Aug 19 06:22:54 PM PDT 24 |
Aug 19 06:23:10 PM PDT 24 |
13615300 ps |
| T295 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.63268525 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:30:59 PM PDT 24 |
412633900 ps |
| T237 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.4280093923 |
|
|
Aug 19 06:22:42 PM PDT 24 |
Aug 19 06:22:59 PM PDT 24 |
71079000 ps |
| T239 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.2159743494 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:24 PM PDT 24 |
97271200 ps |
| T255 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.1481359705 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:28 PM PDT 24 |
60635900 ps |
| T1123 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.245224600 |
|
|
Aug 19 06:22:57 PM PDT 24 |
Aug 19 06:23:13 PM PDT 24 |
20832600 ps |
| T1124 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.475230077 |
|
|
Aug 19 06:23:01 PM PDT 24 |
Aug 19 06:23:16 PM PDT 24 |
52304700 ps |
| T1125 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.3774503584 |
|
|
Aug 19 06:23:20 PM PDT 24 |
Aug 19 06:23:34 PM PDT 24 |
51952900 ps |
| T1126 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.2503462903 |
|
|
Aug 19 06:23:17 PM PDT 24 |
Aug 19 06:23:31 PM PDT 24 |
28777800 ps |
| T323 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.3332052933 |
|
|
Aug 19 06:23:13 PM PDT 24 |
Aug 19 06:23:27 PM PDT 24 |
27246500 ps |
| T1127 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.4198629488 |
|
|
Aug 19 06:22:39 PM PDT 24 |
Aug 19 06:22:56 PM PDT 24 |
59080600 ps |
| T1128 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.2714577882 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
32280300 ps |
| T1129 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.296426251 |
|
|
Aug 19 06:23:34 PM PDT 24 |
Aug 19 06:23:47 PM PDT 24 |
155104000 ps |
| T1130 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.473575886 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:25 PM PDT 24 |
592493800 ps |
| T263 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.4067054062 |
|
|
Aug 19 06:23:21 PM PDT 24 |
Aug 19 06:38:35 PM PDT 24 |
2710065800 ps |
| T1131 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.1379726466 |
|
|
Aug 19 06:22:50 PM PDT 24 |
Aug 19 06:23:07 PM PDT 24 |
93939300 ps |
| T299 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.3985576854 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:23:04 PM PDT 24 |
653179800 ps |
| T261 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.1675143835 |
|
|
Aug 19 06:23:10 PM PDT 24 |
Aug 19 06:23:27 PM PDT 24 |
348875800 ps |
| T1132 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.1781783915 |
|
|
Aug 19 06:23:28 PM PDT 24 |
Aug 19 06:23:42 PM PDT 24 |
31859300 ps |
| T1133 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.916968928 |
|
|
Aug 19 06:23:36 PM PDT 24 |
Aug 19 06:23:50 PM PDT 24 |
19011100 ps |
| T333 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.137604867 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:31:07 PM PDT 24 |
350124100 ps |
| T1134 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.1166245534 |
|
|
Aug 19 06:22:48 PM PDT 24 |
Aug 19 06:23:35 PM PDT 24 |
42867700 ps |
| T1135 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.1913215925 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:23:15 PM PDT 24 |
14868100 ps |
| T412 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.1585856914 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:23:19 PM PDT 24 |
121355900 ps |
| T1136 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.1881208133 |
|
|
Aug 19 06:23:10 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
145897700 ps |
| T1137 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.3043425801 |
|
|
Aug 19 06:22:59 PM PDT 24 |
Aug 19 06:23:13 PM PDT 24 |
14849300 ps |
| T1138 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.1279640311 |
|
|
Aug 19 06:23:16 PM PDT 24 |
Aug 19 06:23:30 PM PDT 24 |
36654500 ps |
| T1139 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.1130192510 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:23:00 PM PDT 24 |
48107500 ps |
| T1140 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.2205292202 |
|
|
Aug 19 06:23:24 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
27782400 ps |
| T1141 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.3053168170 |
|
|
Aug 19 06:22:43 PM PDT 24 |
Aug 19 06:23:40 PM PDT 24 |
1093573100 ps |
| T298 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.3552143651 |
|
|
Aug 19 06:22:50 PM PDT 24 |
Aug 19 06:23:10 PM PDT 24 |
109975500 ps |
| T1142 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.742007770 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
129772200 ps |
| T1143 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.2942368500 |
|
|
Aug 19 06:23:19 PM PDT 24 |
Aug 19 06:23:34 PM PDT 24 |
12909500 ps |
| T1144 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.649339425 |
|
|
Aug 19 06:23:15 PM PDT 24 |
Aug 19 06:23:31 PM PDT 24 |
28905700 ps |
| T264 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.2291257238 |
|
|
Aug 19 06:23:18 PM PDT 24 |
Aug 19 06:37:30 PM PDT 24 |
1893903800 ps |
| T256 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.784902145 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:28 PM PDT 24 |
57723700 ps |
| T1145 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_mem_rw_with_rand_reset.994335553 |
|
|
Aug 19 06:22:46 PM PDT 24 |
Aug 19 06:23:01 PM PDT 24 |
180520000 ps |
| T1146 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.3946532673 |
|
|
Aug 19 06:23:03 PM PDT 24 |
Aug 19 06:23:16 PM PDT 24 |
67592800 ps |
| T1147 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.380937711 |
|
|
Aug 19 06:23:18 PM PDT 24 |
Aug 19 06:23:34 PM PDT 24 |
85846200 ps |
| T1148 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.2851152329 |
|
|
Aug 19 06:22:46 PM PDT 24 |
Aug 19 06:23:01 PM PDT 24 |
20758900 ps |
| T1149 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.3517926810 |
|
|
Aug 19 06:22:49 PM PDT 24 |
Aug 19 06:23:05 PM PDT 24 |
34836300 ps |
| T1150 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.1715558719 |
|
|
Aug 19 06:23:13 PM PDT 24 |
Aug 19 06:23:27 PM PDT 24 |
16166600 ps |
| T1151 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.3229678211 |
|
|
Aug 19 06:22:46 PM PDT 24 |
Aug 19 06:23:20 PM PDT 24 |
61579900 ps |
| T300 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.1352842084 |
|
|
Aug 19 06:23:07 PM PDT 24 |
Aug 19 06:23:47 PM PDT 24 |
2552109300 ps |
| T1152 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.185408636 |
|
|
Aug 19 06:22:45 PM PDT 24 |
Aug 19 06:22:59 PM PDT 24 |
29110600 ps |
| T334 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.1134539389 |
|
|
Aug 19 06:23:26 PM PDT 24 |
Aug 19 06:36:42 PM PDT 24 |
6083839100 ps |
| T1153 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.1728877205 |
|
|
Aug 19 06:23:17 PM PDT 24 |
Aug 19 06:23:36 PM PDT 24 |
174883000 ps |
| T1154 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.1026543967 |
|
|
Aug 19 06:22:55 PM PDT 24 |
Aug 19 06:23:09 PM PDT 24 |
74952900 ps |
| T1155 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.404878276 |
|
|
Aug 19 06:23:25 PM PDT 24 |
Aug 19 06:23:40 PM PDT 24 |
291664900 ps |
| T1156 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.3871953251 |
|
|
Aug 19 06:22:53 PM PDT 24 |
Aug 19 06:23:39 PM PDT 24 |
163412300 ps |
| T1157 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.2144904340 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:23 PM PDT 24 |
18801800 ps |
| T301 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.996627332 |
|
|
Aug 19 06:23:07 PM PDT 24 |
Aug 19 06:23:28 PM PDT 24 |
296805900 ps |
| T262 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.525344959 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:30:44 PM PDT 24 |
954286100 ps |
| T1158 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.3298054107 |
|
|
Aug 19 06:23:23 PM PDT 24 |
Aug 19 06:23:40 PM PDT 24 |
113586800 ps |
| T302 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.757953524 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:23 PM PDT 24 |
214947500 ps |
| T1159 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.4195920517 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
70599300 ps |
| T1160 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.358484386 |
|
|
Aug 19 06:23:25 PM PDT 24 |
Aug 19 06:23:38 PM PDT 24 |
15322600 ps |
| T303 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.2880516548 |
|
|
Aug 19 06:23:16 PM PDT 24 |
Aug 19 06:23:34 PM PDT 24 |
205447200 ps |
| T304 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.3428091672 |
|
|
Aug 19 06:23:10 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
308707200 ps |
| T1161 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.3121998911 |
|
|
Aug 19 06:23:24 PM PDT 24 |
Aug 19 06:23:38 PM PDT 24 |
37134100 ps |
| T1162 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.2798292783 |
|
|
Aug 19 06:23:11 PM PDT 24 |
Aug 19 06:23:29 PM PDT 24 |
141197700 ps |
| T1163 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.1844294129 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
34023700 ps |
| T1164 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.2611937056 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:21 PM PDT 24 |
42337500 ps |
| T1165 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.61137576 |
|
|
Aug 19 06:23:12 PM PDT 24 |
Aug 19 06:23:27 PM PDT 24 |
46563000 ps |
| T305 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.3536824758 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:24:17 PM PDT 24 |
3795146300 ps |
| T306 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.3408198420 |
|
|
Aug 19 06:23:14 PM PDT 24 |
Aug 19 06:23:34 PM PDT 24 |
207911100 ps |
| T1166 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.124057849 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:23:19 PM PDT 24 |
24943500 ps |
| T1167 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.3791321259 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:21 PM PDT 24 |
17890600 ps |
| T1168 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.3594979623 |
|
|
Aug 19 06:23:14 PM PDT 24 |
Aug 19 06:23:29 PM PDT 24 |
21560200 ps |
| T1169 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.2944360329 |
|
|
Aug 19 06:23:07 PM PDT 24 |
Aug 19 06:23:20 PM PDT 24 |
50165700 ps |
| T1170 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.2669234439 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:23:00 PM PDT 24 |
34720800 ps |
| T1171 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.217473690 |
|
|
Aug 19 06:23:25 PM PDT 24 |
Aug 19 06:23:39 PM PDT 24 |
16557000 ps |
| T330 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.1958190867 |
|
|
Aug 19 06:23:22 PM PDT 24 |
Aug 19 06:23:42 PM PDT 24 |
255876900 ps |
| T1172 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.935030101 |
|
|
Aug 19 06:22:45 PM PDT 24 |
Aug 19 06:22:59 PM PDT 24 |
12516100 ps |
| T265 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.2853028132 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:37:11 PM PDT 24 |
802476400 ps |
| T259 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.392089316 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
228705300 ps |
| T1173 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.1582661634 |
|
|
Aug 19 06:22:56 PM PDT 24 |
Aug 19 06:23:10 PM PDT 24 |
227512100 ps |
| T1174 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.846552366 |
|
|
Aug 19 06:23:10 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
12607600 ps |
| T260 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.971312352 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
131172000 ps |
| T335 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.135549986 |
|
|
Aug 19 06:23:23 PM PDT 24 |
Aug 19 06:39:56 PM PDT 24 |
1312784900 ps |
| T266 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.199779346 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:21 PM PDT 24 |
202298700 ps |
| T1175 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.920126851 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:17 PM PDT 24 |
63468600 ps |
| T1176 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.4012500522 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
17341600 ps |
| T1177 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.911982684 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:24:26 PM PDT 24 |
6172521700 ps |
| T1178 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.1792847560 |
|
|
Aug 19 06:22:58 PM PDT 24 |
Aug 19 06:23:15 PM PDT 24 |
172955200 ps |
| T1179 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.2203556206 |
|
|
Aug 19 06:23:18 PM PDT 24 |
Aug 19 06:23:32 PM PDT 24 |
91527300 ps |
| T1180 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.1397432841 |
|
|
Aug 19 06:23:21 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
16789500 ps |
| T1181 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.1440958039 |
|
|
Aug 19 06:23:14 PM PDT 24 |
Aug 19 06:23:31 PM PDT 24 |
199862900 ps |
| T1182 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.2967655844 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
199238900 ps |
| T1183 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.4055777341 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
44570700 ps |
| T1184 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.592528397 |
|
|
Aug 19 06:22:55 PM PDT 24 |
Aug 19 06:23:09 PM PDT 24 |
17909000 ps |
| T1185 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.2658277390 |
|
|
Aug 19 06:22:46 PM PDT 24 |
Aug 19 06:23:02 PM PDT 24 |
23282400 ps |
| T336 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.2707748642 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:29:52 PM PDT 24 |
355587000 ps |
| T1186 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.3066711083 |
|
|
Aug 19 06:23:10 PM PDT 24 |
Aug 19 06:23:23 PM PDT 24 |
31735900 ps |
| T1187 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.794964754 |
|
|
Aug 19 06:22:48 PM PDT 24 |
Aug 19 06:23:05 PM PDT 24 |
109121700 ps |
| T243 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.1584100026 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
32459100 ps |
| T1188 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.2743908433 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:24 PM PDT 24 |
45972900 ps |
| T1189 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.2323436524 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:23:20 PM PDT 24 |
86431000 ps |
| T1190 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.160556488 |
|
|
Aug 19 06:23:22 PM PDT 24 |
Aug 19 06:23:39 PM PDT 24 |
115359100 ps |
| T1191 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.2910327094 |
|
|
Aug 19 06:22:59 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
95925700 ps |
| T1192 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.756783792 |
|
|
Aug 19 06:22:43 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
439847900 ps |
| T1193 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.1096273983 |
|
|
Aug 19 06:23:33 PM PDT 24 |
Aug 19 06:23:50 PM PDT 24 |
122001300 ps |
| T1194 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.3105707734 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:23:19 PM PDT 24 |
51881000 ps |
| T1195 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.2549558558 |
|
|
Aug 19 06:22:54 PM PDT 24 |
Aug 19 06:23:09 PM PDT 24 |
91674000 ps |
| T1196 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.953882863 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:53 PM PDT 24 |
1718206600 ps |
| T1197 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.2196738300 |
|
|
Aug 19 06:23:35 PM PDT 24 |
Aug 19 06:23:49 PM PDT 24 |
24426300 ps |
| T1198 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.2773760809 |
|
|
Aug 19 06:23:09 PM PDT 24 |
Aug 19 06:23:23 PM PDT 24 |
115450800 ps |
| T337 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.860513548 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:30:59 PM PDT 24 |
351763000 ps |
| T1199 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.3839088815 |
|
|
Aug 19 06:23:14 PM PDT 24 |
Aug 19 06:23:34 PM PDT 24 |
97640200 ps |
| T1200 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.1246434512 |
|
|
Aug 19 06:22:59 PM PDT 24 |
Aug 19 06:23:17 PM PDT 24 |
377223100 ps |
| T1201 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.1140976741 |
|
|
Aug 19 06:23:20 PM PDT 24 |
Aug 19 06:23:34 PM PDT 24 |
17298600 ps |
| T1202 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.4264698507 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
14846200 ps |
| T1203 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.3231475268 |
|
|
Aug 19 06:23:03 PM PDT 24 |
Aug 19 06:23:19 PM PDT 24 |
32317700 ps |
| T1204 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.1273332229 |
|
|
Aug 19 06:22:48 PM PDT 24 |
Aug 19 06:23:25 PM PDT 24 |
746989200 ps |
| T331 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.272015056 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:31:04 PM PDT 24 |
335139000 ps |
| T1205 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.471105650 |
|
|
Aug 19 06:23:03 PM PDT 24 |
Aug 19 06:23:17 PM PDT 24 |
64854700 ps |
| T1206 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.4117479330 |
|
|
Aug 19 06:22:53 PM PDT 24 |
Aug 19 06:23:08 PM PDT 24 |
28077100 ps |
| T1207 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.858847368 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:23 PM PDT 24 |
100658100 ps |
| T1208 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.3687939368 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:25 PM PDT 24 |
39083700 ps |
| T1209 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.1707463915 |
|
|
Aug 19 06:22:45 PM PDT 24 |
Aug 19 06:36:46 PM PDT 24 |
407191100 ps |
| T1210 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.3745976074 |
|
|
Aug 19 06:23:22 PM PDT 24 |
Aug 19 06:23:36 PM PDT 24 |
18144000 ps |
| T1211 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.3938402923 |
|
|
Aug 19 06:23:21 PM PDT 24 |
Aug 19 06:37:30 PM PDT 24 |
1629303200 ps |
| T1212 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.1765005792 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:23 PM PDT 24 |
40801200 ps |
| T1213 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.814710397 |
|
|
Aug 19 06:23:10 PM PDT 24 |
Aug 19 06:23:25 PM PDT 24 |
131331900 ps |
| T1214 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.3624581858 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:20 PM PDT 24 |
17057600 ps |
| T1215 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.1719758590 |
|
|
Aug 19 06:23:11 PM PDT 24 |
Aug 19 06:23:24 PM PDT 24 |
38278000 ps |
| T1216 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.3435155346 |
|
|
Aug 19 06:23:03 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
11171300 ps |
| T1217 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.7662413 |
|
|
Aug 19 06:23:00 PM PDT 24 |
Aug 19 06:23:13 PM PDT 24 |
42608400 ps |
| T1218 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.66306948 |
|
|
Aug 19 06:23:23 PM PDT 24 |
Aug 19 06:23:39 PM PDT 24 |
36505000 ps |
| T1219 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.325201353 |
|
|
Aug 19 06:23:07 PM PDT 24 |
Aug 19 06:31:31 PM PDT 24 |
471459900 ps |
| T1220 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.3571411991 |
|
|
Aug 19 06:23:08 PM PDT 24 |
Aug 19 06:23:24 PM PDT 24 |
34278600 ps |
| T1221 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.2990184009 |
|
|
Aug 19 06:22:57 PM PDT 24 |
Aug 19 06:23:29 PM PDT 24 |
29673900 ps |
| T1222 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.905640262 |
|
|
Aug 19 06:22:52 PM PDT 24 |
Aug 19 06:23:08 PM PDT 24 |
84295700 ps |
| T1223 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.3511533426 |
|
|
Aug 19 06:23:17 PM PDT 24 |
Aug 19 06:23:30 PM PDT 24 |
183259200 ps |
| T1224 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.548517126 |
|
|
Aug 19 06:23:02 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
65802500 ps |
| T1225 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.2243581120 |
|
|
Aug 19 06:22:43 PM PDT 24 |
Aug 19 06:23:00 PM PDT 24 |
218767300 ps |
| T1226 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.2424154343 |
|
|
Aug 19 06:23:24 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
30239700 ps |
| T1227 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.2905634297 |
|
|
Aug 19 06:23:22 PM PDT 24 |
Aug 19 06:23:38 PM PDT 24 |
83498100 ps |
| T1228 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.2172116759 |
|
|
Aug 19 06:23:10 PM PDT 24 |
Aug 19 06:23:28 PM PDT 24 |
75102000 ps |
| T1229 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.2089138781 |
|
|
Aug 19 06:22:54 PM PDT 24 |
Aug 19 06:23:28 PM PDT 24 |
4266725900 ps |
| T1230 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.4049972560 |
|
|
Aug 19 06:23:00 PM PDT 24 |
Aug 19 06:23:18 PM PDT 24 |
85834800 ps |
| T1231 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.277383386 |
|
|
Aug 19 06:23:15 PM PDT 24 |
Aug 19 06:23:29 PM PDT 24 |
22116200 ps |
| T1232 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.2256359824 |
|
|
Aug 19 06:23:27 PM PDT 24 |
Aug 19 06:23:42 PM PDT 24 |
61458400 ps |
| T244 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.4176310151 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:23:00 PM PDT 24 |
53435900 ps |
| T1233 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.2409327948 |
|
|
Aug 19 06:22:47 PM PDT 24 |
Aug 19 06:23:01 PM PDT 24 |
28494300 ps |
| T1234 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.3915440180 |
|
|
Aug 19 06:22:46 PM PDT 24 |
Aug 19 06:23:45 PM PDT 24 |
1316740500 ps |
| T1235 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.1697992193 |
|
|
Aug 19 06:23:07 PM PDT 24 |
Aug 19 06:23:21 PM PDT 24 |
18159500 ps |
| T1236 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.1714343908 |
|
|
Aug 19 06:23:19 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
61404000 ps |
| T1237 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.3653891152 |
|
|
Aug 19 06:23:06 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
13979000 ps |
| T1238 |
/workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.3525204270 |
|
|
Aug 19 06:23:40 PM PDT 24 |
Aug 19 06:23:54 PM PDT 24 |
28013400 ps |
| T1239 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.3609038825 |
|
|
Aug 19 06:22:54 PM PDT 24 |
Aug 19 06:23:07 PM PDT 24 |
21790500 ps |
| T1240 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.1006513723 |
|
|
Aug 19 06:23:25 PM PDT 24 |
Aug 19 06:23:38 PM PDT 24 |
14225000 ps |
| T1241 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.1097175575 |
|
|
Aug 19 06:22:54 PM PDT 24 |
Aug 19 06:23:08 PM PDT 24 |
128604000 ps |
| T1242 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.828796577 |
|
|
Aug 19 06:23:22 PM PDT 24 |
Aug 19 06:23:35 PM PDT 24 |
41977300 ps |
| T1243 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.85042993 |
|
|
Aug 19 06:23:17 PM PDT 24 |
Aug 19 06:23:30 PM PDT 24 |
11231000 ps |
| T1244 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.3502724878 |
|
|
Aug 19 06:23:14 PM PDT 24 |
Aug 19 06:31:27 PM PDT 24 |
713479900 ps |
| T1245 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.4192815702 |
|
|
Aug 19 06:23:22 PM PDT 24 |
Aug 19 06:23:37 PM PDT 24 |
76998300 ps |
| T1246 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.2209942917 |
|
|
Aug 19 06:23:29 PM PDT 24 |
Aug 19 06:23:43 PM PDT 24 |
166609300 ps |
| T245 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.1785900389 |
|
|
Aug 19 06:22:51 PM PDT 24 |
Aug 19 06:23:04 PM PDT 24 |
27081600 ps |
| T1247 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.250636348 |
|
|
Aug 19 06:23:05 PM PDT 24 |
Aug 19 06:23:22 PM PDT 24 |
44930800 ps |
| T1248 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.2313484065 |
|
|
Aug 19 06:23:04 PM PDT 24 |
Aug 19 06:23:21 PM PDT 24 |
62635000 ps |
| T1249 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.1860935155 |
|
|
Aug 19 06:23:07 PM PDT 24 |
Aug 19 06:23:26 PM PDT 24 |
100424300 ps |
| T1250 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.1402140412 |
|
|
Aug 19 06:23:16 PM PDT 24 |
Aug 19 06:23:35 PM PDT 24 |
224254400 ps |
| T1251 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.3564054041 |
|
|
Aug 19 06:22:55 PM PDT 24 |
Aug 19 06:23:13 PM PDT 24 |
57005800 ps |