Unified Coverage Report :: Group :: otp_ctrl_env_pkg::otp_ctrl_env_cov::power_on_cg

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::power_on_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv

---

Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::power_on_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	22	0	22	100.00

Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::power_on_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
creator_sw_cfg_lock	2	0	2	100.00	100	1	1	2
hw_cfg0_lock	2	0	2	100.00	100	1	1	2
hw_cfg1_lock	2	0	2	100.00	100	1	1	2
lc_esc	2	0	2	100.00	100	1	1	2
owner_sw_cfg_lock	2	0	2	100.00	100	1	1	2
rot_creator_auth_codesign_lock	2	0	2	100.00	100	1	1	2
rot_creator_auth_state_lock	2	0	2	100.00	100	1	1	2
secret0_lock	2	0	2	100.00	100	1	1	2
secret1_lock	2	0	2	100.00	100	1	1	2
secret2_lock	2	0	2	100.00	100	1	1	2
vendor_test_lock	2	0	2	100.00	100	1	1	2

Summary for Variable creator_sw_cfg_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for creator_sw_cfg_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7183

1

T2

3

T3

4

T4

3

auto[1]

4634

1

T4

3

T12

12

T13

4

---

Summary for Variable hw_cfg0_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for hw_cfg0_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7168

1

T2

3

T3

2

T4

6

auto[1]

4649

1

T3

2

T12

12

T13

4

---

Summary for Variable hw_cfg1_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for hw_cfg1_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7058

1

T2

3

T3

2

T4

6

auto[1]

4759

1

T3

2

T12

10

T17

8

---

Summary for Variable lc_esc

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for lc_esc

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

11773

1

T2

3

T3

4

T4

5

auto[1]

44

1

T4

1

T264

1

T265

1

---

Summary for Variable owner_sw_cfg_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for owner_sw_cfg_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8729

1

T2

3

T3

4

T4

3

auto[1]

3088

1

T4

3

T12

12

T13

4

---

Summary for Variable rot_creator_auth_codesign_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for rot_creator_auth_codesign_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7370

1

T2

3

T3

4

T4

3

auto[1]

4447

1

T4

3

T12

12

T13

4

---

Summary for Variable rot_creator_auth_state_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for rot_creator_auth_state_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

9974

1

T2

3

T3

4

T4

6

auto[1]

1843

1

T17

8

T105

5

T19

10

---

Summary for Variable secret0_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for secret0_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7067

1

T2

3

T3

4

T4

3

auto[1]

4750

1

T4

3

T6

2

T12

6

---

Summary for Variable secret1_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for secret1_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6972

1

T2

3

T3

2

T4

6

auto[1]

4845

1

T3

2

T6

2

T12

12

---

Summary for Variable secret2_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for secret2_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8412

1

T2

3

T3

4

T4

6

auto[1]

3405

1

T13

4

T97

4

T98

1

---

Summary for Variable vendor_test_lock

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for vendor_test_lock

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7116

1

T2

3

T3

4

T4

3

auto[1]

4701

1

T4

3

T12

12

T13

4