| T57 |
/workspace/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2146406834 |
|
|
Mar 03 12:44:12 PM PST 24 |
Mar 03 12:44:49 PM PST 24 |
6987426971 ps |
| T808 |
/workspace/coverage/default/14.pwrmgr_glitch.756551698 |
|
|
Mar 03 12:43:42 PM PST 24 |
Mar 03 12:43:42 PM PST 24 |
62674053 ps |
| T809 |
/workspace/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.1998733157 |
|
|
Mar 03 12:45:20 PM PST 24 |
Mar 03 12:45:22 PM PST 24 |
300446501 ps |
| T810 |
/workspace/coverage/default/2.pwrmgr_wakeup_reset.3036632254 |
|
|
Mar 03 12:43:04 PM PST 24 |
Mar 03 12:43:05 PM PST 24 |
134558646 ps |
| T811 |
/workspace/coverage/default/37.pwrmgr_lowpower_wakeup_race.2876580745 |
|
|
Mar 03 12:44:57 PM PST 24 |
Mar 03 12:44:58 PM PST 24 |
92244372 ps |
| T812 |
/workspace/coverage/default/16.pwrmgr_wakeup.3388611496 |
|
|
Mar 03 12:43:51 PM PST 24 |
Mar 03 12:43:52 PM PST 24 |
190415516 ps |
| T813 |
/workspace/coverage/default/48.pwrmgr_reset.2625199534 |
|
|
Mar 03 12:45:30 PM PST 24 |
Mar 03 12:45:31 PM PST 24 |
108529090 ps |
| T814 |
/workspace/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.1569182966 |
|
|
Mar 03 12:44:41 PM PST 24 |
Mar 03 12:44:42 PM PST 24 |
33111941 ps |
| T815 |
/workspace/coverage/default/2.pwrmgr_aborted_low_power.3078803668 |
|
|
Mar 03 12:43:03 PM PST 24 |
Mar 03 12:43:04 PM PST 24 |
23787991 ps |
| T816 |
/workspace/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.3771140570 |
|
|
Mar 03 12:45:05 PM PST 24 |
Mar 03 12:45:05 PM PST 24 |
82601848 ps |
| T817 |
/workspace/coverage/default/25.pwrmgr_aborted_low_power.3952662600 |
|
|
Mar 03 12:44:12 PM PST 24 |
Mar 03 12:44:16 PM PST 24 |
82395252 ps |
| T818 |
/workspace/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2810181582 |
|
|
Mar 03 12:44:09 PM PST 24 |
Mar 03 12:44:13 PM PST 24 |
1008624237 ps |
| T819 |
/workspace/coverage/default/5.pwrmgr_reset_invalid.328886570 |
|
|
Mar 03 12:43:16 PM PST 24 |
Mar 03 12:43:18 PM PST 24 |
392440257 ps |
| T820 |
/workspace/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.641446588 |
|
|
Mar 03 12:43:16 PM PST 24 |
Mar 03 12:43:18 PM PST 24 |
61133075 ps |
| T821 |
/workspace/coverage/default/2.pwrmgr_reset.508094003 |
|
|
Mar 03 12:43:05 PM PST 24 |
Mar 03 12:43:07 PM PST 24 |
174484491 ps |
| T822 |
/workspace/coverage/default/45.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.727745822 |
|
|
Mar 03 12:45:15 PM PST 24 |
Mar 03 12:45:19 PM PST 24 |
834308645 ps |
| T823 |
/workspace/coverage/default/3.pwrmgr_smoke.4204711961 |
|
|
Mar 03 12:43:12 PM PST 24 |
Mar 03 12:43:13 PM PST 24 |
41466186 ps |
| T824 |
/workspace/coverage/default/36.pwrmgr_glitch.238859474 |
|
|
Mar 03 12:44:56 PM PST 24 |
Mar 03 12:44:57 PM PST 24 |
43902909 ps |
| T825 |
/workspace/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3818644061 |
|
|
Mar 03 12:44:29 PM PST 24 |
Mar 03 12:44:33 PM PST 24 |
852500441 ps |
| T826 |
/workspace/coverage/default/22.pwrmgr_glitch.3830472784 |
|
|
Mar 03 12:44:10 PM PST 24 |
Mar 03 12:44:12 PM PST 24 |
119477213 ps |
| T827 |
/workspace/coverage/default/24.pwrmgr_wakeup.727487187 |
|
|
Mar 03 12:44:14 PM PST 24 |
Mar 03 12:44:19 PM PST 24 |
67785151 ps |
| T828 |
/workspace/coverage/default/20.pwrmgr_lowpower_wakeup_race.4159444515 |
|
|
Mar 03 12:44:00 PM PST 24 |
Mar 03 12:44:01 PM PST 24 |
364154184 ps |
| T829 |
/workspace/coverage/default/20.pwrmgr_aborted_low_power.1637880622 |
|
|
Mar 03 12:44:01 PM PST 24 |
Mar 03 12:44:02 PM PST 24 |
36957465 ps |
| T830 |
/workspace/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.3752105312 |
|
|
Mar 03 12:44:50 PM PST 24 |
Mar 03 12:44:53 PM PST 24 |
565285584 ps |
| T831 |
/workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.606601466 |
|
|
Mar 03 12:45:13 PM PST 24 |
Mar 03 12:45:14 PM PST 24 |
39372330 ps |
| T832 |
/workspace/coverage/default/32.pwrmgr_aborted_low_power.3344696376 |
|
|
Mar 03 12:44:51 PM PST 24 |
Mar 03 12:44:54 PM PST 24 |
42172579 ps |
| T833 |
/workspace/coverage/default/1.pwrmgr_wakeup_reset.455664486 |
|
|
Mar 03 12:43:12 PM PST 24 |
Mar 03 12:43:14 PM PST 24 |
351058404 ps |
| T834 |
/workspace/coverage/default/41.pwrmgr_lowpower_invalid.2891258894 |
|
|
Mar 03 12:45:08 PM PST 24 |
Mar 03 12:45:09 PM PST 24 |
54011991 ps |
| T835 |
/workspace/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.315911704 |
|
|
Mar 03 12:44:34 PM PST 24 |
Mar 03 12:44:38 PM PST 24 |
868717329 ps |
| T836 |
/workspace/coverage/default/17.pwrmgr_stress_all.689610865 |
|
|
Mar 03 12:43:59 PM PST 24 |
Mar 03 12:44:05 PM PST 24 |
1688473723 ps |
| T837 |
/workspace/coverage/default/48.pwrmgr_reset_invalid.904066925 |
|
|
Mar 03 12:45:30 PM PST 24 |
Mar 03 12:45:32 PM PST 24 |
99003679 ps |
| T838 |
/workspace/coverage/default/43.pwrmgr_global_esc.3155641612 |
|
|
Mar 03 12:45:22 PM PST 24 |
Mar 03 12:45:23 PM PST 24 |
58166117 ps |
| T839 |
/workspace/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.660919562 |
|
|
Mar 03 12:43:40 PM PST 24 |
Mar 03 12:43:41 PM PST 24 |
54724954 ps |
| T840 |
/workspace/coverage/default/8.pwrmgr_reset_invalid.3467707932 |
|
|
Mar 03 12:43:34 PM PST 24 |
Mar 03 12:43:36 PM PST 24 |
113344305 ps |
| T841 |
/workspace/coverage/default/26.pwrmgr_reset_invalid.4288986759 |
|
|
Mar 03 12:44:20 PM PST 24 |
Mar 03 12:44:21 PM PST 24 |
156779123 ps |
| T842 |
/workspace/coverage/default/36.pwrmgr_escalation_timeout.2740624835 |
|
|
Mar 03 12:44:56 PM PST 24 |
Mar 03 12:44:57 PM PST 24 |
240222458 ps |
| T843 |
/workspace/coverage/default/45.pwrmgr_lowpower_invalid.2783775698 |
|
|
Mar 03 12:45:26 PM PST 24 |
Mar 03 12:45:27 PM PST 24 |
54786151 ps |
| T844 |
/workspace/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.868740741 |
|
|
Mar 03 12:44:22 PM PST 24 |
Mar 03 12:44:23 PM PST 24 |
65657404 ps |
| T845 |
/workspace/coverage/default/9.pwrmgr_glitch.266957461 |
|
|
Mar 03 12:43:32 PM PST 24 |
Mar 03 12:43:33 PM PST 24 |
35660993 ps |
| T846 |
/workspace/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.2273853052 |
|
|
Mar 03 12:44:44 PM PST 24 |
Mar 03 12:44:47 PM PST 24 |
33470111 ps |
| T847 |
/workspace/coverage/default/45.pwrmgr_smoke.487204449 |
|
|
Mar 03 12:45:14 PM PST 24 |
Mar 03 12:45:14 PM PST 24 |
60383013 ps |
| T848 |
/workspace/coverage/default/34.pwrmgr_escalation_timeout.4100425105 |
|
|
Mar 03 12:44:47 PM PST 24 |
Mar 03 12:44:51 PM PST 24 |
937698472 ps |
| T849 |
/workspace/coverage/default/44.pwrmgr_wakeup_reset.1865430737 |
|
|
Mar 03 12:45:10 PM PST 24 |
Mar 03 12:45:11 PM PST 24 |
73327363 ps |
| T75 |
/workspace/coverage/default/10.pwrmgr_stress_all_with_rand_reset.1921046391 |
|
|
Mar 03 12:43:34 PM PST 24 |
Mar 03 12:44:03 PM PST 24 |
8501997858 ps |
| T850 |
/workspace/coverage/default/12.pwrmgr_stress_all.1236805130 |
|
|
Mar 03 12:43:43 PM PST 24 |
Mar 03 12:43:49 PM PST 24 |
1750065150 ps |
| T851 |
/workspace/coverage/default/30.pwrmgr_reset_invalid.3589349910 |
|
|
Mar 03 12:44:29 PM PST 24 |
Mar 03 12:44:31 PM PST 24 |
121371353 ps |
| T852 |
/workspace/coverage/default/44.pwrmgr_glitch.887594007 |
|
|
Mar 03 12:45:12 PM PST 24 |
Mar 03 12:45:13 PM PST 24 |
56845859 ps |
| T853 |
/workspace/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.1493902779 |
|
|
Mar 03 12:44:13 PM PST 24 |
Mar 03 12:44:16 PM PST 24 |
76768501 ps |
| T854 |
/workspace/coverage/default/39.pwrmgr_smoke.1928069080 |
|
|
Mar 03 12:45:04 PM PST 24 |
Mar 03 12:45:05 PM PST 24 |
30896852 ps |
| T855 |
/workspace/coverage/default/14.pwrmgr_smoke.1536237627 |
|
|
Mar 03 12:43:39 PM PST 24 |
Mar 03 12:43:40 PM PST 24 |
83900222 ps |
| T856 |
/workspace/coverage/default/30.pwrmgr_wakeup.1765295608 |
|
|
Mar 03 12:44:45 PM PST 24 |
Mar 03 12:44:49 PM PST 24 |
130451601 ps |
| T857 |
/workspace/coverage/default/21.pwrmgr_wakeup.145344073 |
|
|
Mar 03 12:44:10 PM PST 24 |
Mar 03 12:44:13 PM PST 24 |
292975203 ps |
| T858 |
/workspace/coverage/default/41.pwrmgr_lowpower_wakeup_race.2069578027 |
|
|
Mar 03 12:45:25 PM PST 24 |
Mar 03 12:45:26 PM PST 24 |
458616415 ps |
| T145 |
/workspace/coverage/default/43.pwrmgr_stress_all_with_rand_reset.1493251935 |
|
|
Mar 03 12:45:26 PM PST 24 |
Mar 03 12:45:42 PM PST 24 |
12102465673 ps |
| T859 |
/workspace/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.1285233603 |
|
|
Mar 03 12:42:55 PM PST 24 |
Mar 03 12:42:56 PM PST 24 |
41591666 ps |
| T860 |
/workspace/coverage/default/17.pwrmgr_aborted_low_power.2873511959 |
|
|
Mar 03 12:43:57 PM PST 24 |
Mar 03 12:43:58 PM PST 24 |
33917411 ps |
| T861 |
/workspace/coverage/default/16.pwrmgr_smoke.264665898 |
|
|
Mar 03 12:43:51 PM PST 24 |
Mar 03 12:43:52 PM PST 24 |
33314169 ps |
| T862 |
/workspace/coverage/default/22.pwrmgr_stress_all.2724194166 |
|
|
Mar 03 12:44:14 PM PST 24 |
Mar 03 12:44:23 PM PST 24 |
1317961883 ps |
| T863 |
/workspace/coverage/default/23.pwrmgr_wakeup.1476672486 |
|
|
Mar 03 12:44:09 PM PST 24 |
Mar 03 12:44:10 PM PST 24 |
170439084 ps |
| T864 |
/workspace/coverage/default/46.pwrmgr_sec_cm_rstmgr_intersig_mubi.2927923125 |
|
|
Mar 03 12:45:25 PM PST 24 |
Mar 03 12:45:26 PM PST 24 |
144594771 ps |
| T865 |
/workspace/coverage/default/3.pwrmgr_wakeup.430441167 |
|
|
Mar 03 12:43:17 PM PST 24 |
Mar 03 12:43:19 PM PST 24 |
333053565 ps |
| T866 |
/workspace/coverage/default/15.pwrmgr_disable_rom_integrity_check.678923453 |
|
|
Mar 03 12:43:49 PM PST 24 |
Mar 03 12:43:50 PM PST 24 |
68856389 ps |
| T867 |
/workspace/coverage/default/16.pwrmgr_lowpower_invalid.311690220 |
|
|
Mar 03 12:44:05 PM PST 24 |
Mar 03 12:44:06 PM PST 24 |
54590550 ps |
| T868 |
/workspace/coverage/default/0.pwrmgr_sec_cm_ctrl_config_regwen.2719006208 |
|
|
Mar 03 12:42:56 PM PST 24 |
Mar 03 12:42:57 PM PST 24 |
84701316 ps |
| T869 |
/workspace/coverage/default/37.pwrmgr_wakeup.2304400800 |
|
|
Mar 03 12:45:01 PM PST 24 |
Mar 03 12:45:01 PM PST 24 |
48617435 ps |
| T870 |
/workspace/coverage/default/6.pwrmgr_global_esc.632028428 |
|
|
Mar 03 12:43:22 PM PST 24 |
Mar 03 12:43:24 PM PST 24 |
77371601 ps |
| T871 |
/workspace/coverage/default/24.pwrmgr_lowpower_invalid.870320410 |
|
|
Mar 03 12:44:15 PM PST 24 |
Mar 03 12:44:19 PM PST 24 |
39995318 ps |
| T872 |
/workspace/coverage/default/0.pwrmgr_reset_invalid.1272410316 |
|
|
Mar 03 12:42:55 PM PST 24 |
Mar 03 12:42:56 PM PST 24 |
116025842 ps |
| T93 |
/workspace/coverage/default/37.pwrmgr_stress_all_with_rand_reset.346841664 |
|
|
Mar 03 12:44:59 PM PST 24 |
Mar 03 12:45:13 PM PST 24 |
8942154406 ps |
| T873 |
/workspace/coverage/default/16.pwrmgr_lowpower_wakeup_race.144112109 |
|
|
Mar 03 12:43:50 PM PST 24 |
Mar 03 12:43:51 PM PST 24 |
144163978 ps |
| T874 |
/workspace/coverage/default/29.pwrmgr_glitch.1711403563 |
|
|
Mar 03 12:44:26 PM PST 24 |
Mar 03 12:44:27 PM PST 24 |
65917361 ps |
| T875 |
/workspace/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2415438998 |
|
|
Mar 03 12:45:00 PM PST 24 |
Mar 03 12:45:03 PM PST 24 |
1191815139 ps |
| T876 |
/workspace/coverage/default/25.pwrmgr_lowpower_invalid.884301157 |
|
|
Mar 03 12:44:15 PM PST 24 |
Mar 03 12:44:19 PM PST 24 |
49826383 ps |
| T877 |
/workspace/coverage/default/37.pwrmgr_escalation_timeout.3317780560 |
|
|
Mar 03 12:45:00 PM PST 24 |
Mar 03 12:45:01 PM PST 24 |
308431659 ps |
| T878 |
/workspace/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.2741532920 |
|
|
Mar 03 12:43:36 PM PST 24 |
Mar 03 12:43:37 PM PST 24 |
74938119 ps |
| T879 |
/workspace/coverage/default/34.pwrmgr_glitch.4146615642 |
|
|
Mar 03 12:44:43 PM PST 24 |
Mar 03 12:44:47 PM PST 24 |
78294497 ps |
| T880 |
/workspace/coverage/default/48.pwrmgr_aborted_low_power.4250656013 |
|
|
Mar 03 12:45:25 PM PST 24 |
Mar 03 12:45:26 PM PST 24 |
34784027 ps |
| T881 |
/workspace/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.1866474913 |
|
|
Mar 03 12:44:03 PM PST 24 |
Mar 03 12:44:04 PM PST 24 |
67287828 ps |
| T882 |
/workspace/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.1777234076 |
|
|
Mar 03 12:44:19 PM PST 24 |
Mar 03 12:44:20 PM PST 24 |
103189019 ps |
| T883 |
/workspace/coverage/default/9.pwrmgr_reset.3365552869 |
|
|
Mar 03 12:43:34 PM PST 24 |
Mar 03 12:43:35 PM PST 24 |
55864294 ps |
| T884 |
/workspace/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.3138823113 |
|
|
Mar 03 12:44:43 PM PST 24 |
Mar 03 12:44:46 PM PST 24 |
175945452 ps |
| T885 |
/workspace/coverage/default/6.pwrmgr_reset.739265908 |
|
|
Mar 03 12:43:16 PM PST 24 |
Mar 03 12:43:17 PM PST 24 |
267581920 ps |
| T886 |
/workspace/coverage/default/37.pwrmgr_lowpower_invalid.816954483 |
|
|
Mar 03 12:44:57 PM PST 24 |
Mar 03 12:44:58 PM PST 24 |
75886699 ps |
| T887 |
/workspace/coverage/default/35.pwrmgr_lowpower_invalid.3279504149 |
|
|
Mar 03 12:44:49 PM PST 24 |
Mar 03 12:44:53 PM PST 24 |
53936718 ps |
| T888 |
/workspace/coverage/default/12.pwrmgr_reset.148586795 |
|
|
Mar 03 12:43:37 PM PST 24 |
Mar 03 12:43:38 PM PST 24 |
149812174 ps |
| T889 |
/workspace/coverage/default/47.pwrmgr_lowpower_invalid.47806496 |
|
|
Mar 03 12:45:27 PM PST 24 |
Mar 03 12:45:28 PM PST 24 |
43012754 ps |
| T890 |
/workspace/coverage/default/40.pwrmgr_aborted_low_power.4244711489 |
|
|
Mar 03 12:45:00 PM PST 24 |
Mar 03 12:45:01 PM PST 24 |
50158536 ps |
| T891 |
/workspace/coverage/default/2.pwrmgr_disable_rom_integrity_check.638364366 |
|
|
Mar 03 12:43:16 PM PST 24 |
Mar 03 12:43:17 PM PST 24 |
63044308 ps |
| T892 |
/workspace/coverage/default/2.pwrmgr_glitch.666491240 |
|
|
Mar 03 12:43:15 PM PST 24 |
Mar 03 12:43:16 PM PST 24 |
66010253 ps |
| T893 |
/workspace/coverage/default/5.pwrmgr_escalation_timeout.3875484708 |
|
|
Mar 03 12:43:14 PM PST 24 |
Mar 03 12:43:16 PM PST 24 |
159287176 ps |
| T894 |
/workspace/coverage/default/20.pwrmgr_wakeup_reset.3349608536 |
|
|
Mar 03 12:43:59 PM PST 24 |
Mar 03 12:44:00 PM PST 24 |
90574700 ps |
| T895 |
/workspace/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.3857498862 |
|
|
Mar 03 12:43:58 PM PST 24 |
Mar 03 12:43:58 PM PST 24 |
67987704 ps |
| T896 |
/workspace/coverage/default/15.pwrmgr_lowpower_invalid.4020175852 |
|
|
Mar 03 12:43:49 PM PST 24 |
Mar 03 12:43:49 PM PST 24 |
84360600 ps |
| T897 |
/workspace/coverage/default/22.pwrmgr_escalation_timeout.2598477693 |
|
|
Mar 03 12:44:04 PM PST 24 |
Mar 03 12:44:06 PM PST 24 |
311013090 ps |
| T898 |
/workspace/coverage/default/36.pwrmgr_lowpower_invalid.204979497 |
|
|
Mar 03 12:44:53 PM PST 24 |
Mar 03 12:44:55 PM PST 24 |
44288156 ps |
| T899 |
/workspace/coverage/default/26.pwrmgr_smoke.2930769772 |
|
|
Mar 03 12:44:23 PM PST 24 |
Mar 03 12:44:24 PM PST 24 |
52714314 ps |
| T900 |
/workspace/coverage/default/29.pwrmgr_reset.3203070866 |
|
|
Mar 03 12:44:33 PM PST 24 |
Mar 03 12:44:34 PM PST 24 |
52970978 ps |
| T901 |
/workspace/coverage/default/39.pwrmgr_stress_all.1452100180 |
|
|
Mar 03 12:45:04 PM PST 24 |
Mar 03 12:45:10 PM PST 24 |
3246554551 ps |
| T902 |
/workspace/coverage/default/18.pwrmgr_stress_all_with_rand_reset.3122842900 |
|
|
Mar 03 12:43:59 PM PST 24 |
Mar 03 12:44:17 PM PST 24 |
12006313370 ps |
| T903 |
/workspace/coverage/default/16.pwrmgr_reset.452850346 |
|
|
Mar 03 12:43:50 PM PST 24 |
Mar 03 12:43:51 PM PST 24 |
67047485 ps |
| T904 |
/workspace/coverage/default/5.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1710292540 |
|
|
Mar 03 12:43:14 PM PST 24 |
Mar 03 12:43:19 PM PST 24 |
801620553 ps |
| T905 |
/workspace/coverage/default/19.pwrmgr_aborted_low_power.4284395213 |
|
|
Mar 03 12:43:55 PM PST 24 |
Mar 03 12:43:55 PM PST 24 |
71077271 ps |
| T906 |
/workspace/coverage/default/2.pwrmgr_stress_all_with_rand_reset.2140224685 |
|
|
Mar 03 12:43:11 PM PST 24 |
Mar 03 12:43:37 PM PST 24 |
5393065380 ps |
| T907 |
/workspace/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.185591204 |
|
|
Mar 03 12:44:51 PM PST 24 |
Mar 03 12:44:57 PM PST 24 |
915512003 ps |
| T908 |
/workspace/coverage/default/16.pwrmgr_stress_all.3603962695 |
|
|
Mar 03 12:43:58 PM PST 24 |
Mar 03 12:44:03 PM PST 24 |
682072526 ps |
| T909 |
/workspace/coverage/default/39.pwrmgr_glitch.1951514766 |
|
|
Mar 03 12:45:05 PM PST 24 |
Mar 03 12:45:06 PM PST 24 |
41884902 ps |
| T910 |
/workspace/coverage/default/20.pwrmgr_escalation_timeout.3622695604 |
|
|
Mar 03 12:43:58 PM PST 24 |
Mar 03 12:43:59 PM PST 24 |
302354943 ps |
| T911 |
/workspace/coverage/default/48.pwrmgr_escalation_timeout.1931430756 |
|
|
Mar 03 12:45:31 PM PST 24 |
Mar 03 12:45:32 PM PST 24 |
611455417 ps |
| T912 |
/workspace/coverage/default/30.pwrmgr_glitch.2045312189 |
|
|
Mar 03 12:44:33 PM PST 24 |
Mar 03 12:44:34 PM PST 24 |
38365668 ps |
| T913 |
/workspace/coverage/default/7.pwrmgr_disable_rom_integrity_check.803822024 |
|
|
Mar 03 12:43:21 PM PST 24 |
Mar 03 12:43:22 PM PST 24 |
67555721 ps |
| T914 |
/workspace/coverage/default/14.pwrmgr_stress_all.3891767052 |
|
|
Mar 03 12:43:43 PM PST 24 |
Mar 03 12:43:46 PM PST 24 |
1298873689 ps |
| T915 |
/workspace/coverage/default/6.pwrmgr_sec_cm_rstmgr_intersig_mubi.1817869411 |
|
|
Mar 03 12:43:23 PM PST 24 |
Mar 03 12:43:24 PM PST 24 |
145679574 ps |
| T916 |
/workspace/coverage/default/3.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3554218960 |
|
|
Mar 03 12:43:15 PM PST 24 |
Mar 03 12:43:18 PM PST 24 |
1395585541 ps |
| T917 |
/workspace/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2951158051 |
|
|
Mar 03 12:45:13 PM PST 24 |
Mar 03 12:45:17 PM PST 24 |
820937975 ps |
| T918 |
/workspace/coverage/default/12.pwrmgr_smoke.2414386481 |
|
|
Mar 03 12:43:39 PM PST 24 |
Mar 03 12:43:39 PM PST 24 |
31506475 ps |
| T919 |
/workspace/coverage/default/32.pwrmgr_smoke.4049956215 |
|
|
Mar 03 12:44:46 PM PST 24 |
Mar 03 12:44:49 PM PST 24 |
30924608 ps |
| T920 |
/workspace/coverage/default/17.pwrmgr_lowpower_invalid.3131178422 |
|
|
Mar 03 12:43:58 PM PST 24 |
Mar 03 12:43:58 PM PST 24 |
43481508 ps |
| T24 |
/workspace/coverage/default/0.pwrmgr_sec_cm.2417868137 |
|
|
Mar 03 12:43:05 PM PST 24 |
Mar 03 12:43:06 PM PST 24 |
1802086221 ps |
| T921 |
/workspace/coverage/default/21.pwrmgr_escalation_timeout.170472505 |
|
|
Mar 03 12:44:10 PM PST 24 |
Mar 03 12:44:11 PM PST 24 |
161715885 ps |
| T922 |
/workspace/coverage/default/48.pwrmgr_global_esc.3022491275 |
|
|
Mar 03 12:45:30 PM PST 24 |
Mar 03 12:45:30 PM PST 24 |
79384051 ps |
| T923 |
/workspace/coverage/default/46.pwrmgr_stress_all.3440349780 |
|
|
Mar 03 12:45:20 PM PST 24 |
Mar 03 12:45:30 PM PST 24 |
1871496172 ps |
| T924 |
/workspace/coverage/default/10.pwrmgr_reset_invalid.4077581568 |
|
|
Mar 03 12:43:38 PM PST 24 |
Mar 03 12:43:39 PM PST 24 |
110222329 ps |
| T925 |
/workspace/coverage/default/0.pwrmgr_disable_rom_integrity_check.3537392940 |
|
|
Mar 03 12:42:55 PM PST 24 |
Mar 03 12:42:56 PM PST 24 |
104176241 ps |
| T926 |
/workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.850503579 |
|
|
Mar 03 12:44:42 PM PST 24 |
Mar 03 12:44:44 PM PST 24 |
215955032 ps |
| T927 |
/workspace/coverage/default/10.pwrmgr_escalation_timeout.2194568249 |
|
|
Mar 03 12:43:30 PM PST 24 |
Mar 03 12:43:31 PM PST 24 |
328632634 ps |
| T928 |
/workspace/coverage/default/14.pwrmgr_stress_all_with_rand_reset.1012166434 |
|
|
Mar 03 12:43:41 PM PST 24 |
Mar 03 12:43:53 PM PST 24 |
2784598878 ps |
| T929 |
/workspace/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.3701358726 |
|
|
Mar 03 12:44:04 PM PST 24 |
Mar 03 12:44:05 PM PST 24 |
116557393 ps |
| T930 |
/workspace/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3681638410 |
|
|
Mar 03 12:44:59 PM PST 24 |
Mar 03 12:45:02 PM PST 24 |
1885611089 ps |
| T931 |
/workspace/coverage/default/6.pwrmgr_wakeup.1854734449 |
|
|
Mar 03 12:43:19 PM PST 24 |
Mar 03 12:43:20 PM PST 24 |
317423652 ps |
| T932 |
/workspace/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1486133199 |
|
|
Mar 03 12:43:56 PM PST 24 |
Mar 03 12:43:58 PM PST 24 |
1290552353 ps |
| T933 |
/workspace/coverage/default/8.pwrmgr_stress_all_with_rand_reset.3359359775 |
|
|
Mar 03 12:43:31 PM PST 24 |
Mar 03 12:43:41 PM PST 24 |
6353332894 ps |
| T934 |
/workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.931785823 |
|
|
Mar 03 12:44:20 PM PST 24 |
Mar 03 12:44:22 PM PST 24 |
299685938 ps |
| T935 |
/workspace/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.3346053592 |
|
|
Mar 03 12:43:37 PM PST 24 |
Mar 03 12:43:39 PM PST 24 |
124502820 ps |
| T936 |
/workspace/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.1612210367 |
|
|
Mar 03 12:45:15 PM PST 24 |
Mar 03 12:45:16 PM PST 24 |
211755773 ps |
| T937 |
/workspace/coverage/default/6.pwrmgr_reset_invalid.3497416752 |
|
|
Mar 03 12:43:29 PM PST 24 |
Mar 03 12:43:30 PM PST 24 |
108809404 ps |
| T938 |
/workspace/coverage/default/21.pwrmgr_lowpower_invalid.412515573 |
|
|
Mar 03 12:44:13 PM PST 24 |
Mar 03 12:44:16 PM PST 24 |
252643612 ps |
| T939 |
/workspace/coverage/default/24.pwrmgr_reset.3681513435 |
|
|
Mar 03 12:44:21 PM PST 24 |
Mar 03 12:44:23 PM PST 24 |
203177227 ps |
| T940 |
/workspace/coverage/default/7.pwrmgr_glitch.4071516563 |
|
|
Mar 03 12:43:29 PM PST 24 |
Mar 03 12:43:30 PM PST 24 |
52372076 ps |
| T941 |
/workspace/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.3802850637 |
|
|
Mar 03 12:43:47 PM PST 24 |
Mar 03 12:43:48 PM PST 24 |
58151950 ps |
| T942 |
/workspace/coverage/default/42.pwrmgr_glitch.944770510 |
|
|
Mar 03 12:45:27 PM PST 24 |
Mar 03 12:45:28 PM PST 24 |
82912314 ps |
| T943 |
/workspace/coverage/default/12.pwrmgr_reset_invalid.1853879243 |
|
|
Mar 03 12:43:39 PM PST 24 |
Mar 03 12:43:40 PM PST 24 |
99347447 ps |
| T944 |
/workspace/coverage/default/33.pwrmgr_global_esc.2371934944 |
|
|
Mar 03 12:44:49 PM PST 24 |
Mar 03 12:44:52 PM PST 24 |
30571575 ps |
| T945 |
/workspace/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3982911145 |
|
|
Mar 03 12:45:03 PM PST 24 |
Mar 03 12:45:06 PM PST 24 |
1034525990 ps |
| T946 |
/workspace/coverage/default/29.pwrmgr_reset_invalid.2148577375 |
|
|
Mar 03 12:44:28 PM PST 24 |
Mar 03 12:44:29 PM PST 24 |
113675466 ps |
| T947 |
/workspace/coverage/default/10.pwrmgr_disable_rom_integrity_check.2466063423 |
|
|
Mar 03 12:43:34 PM PST 24 |
Mar 03 12:43:34 PM PST 24 |
43963028 ps |
| T948 |
/workspace/coverage/default/2.pwrmgr_global_esc.1360168971 |
|
|
Mar 03 12:43:16 PM PST 24 |
Mar 03 12:43:17 PM PST 24 |
25222692 ps |
| T949 |
/workspace/coverage/default/16.pwrmgr_wakeup_reset.3749833345 |
|
|
Mar 03 12:43:50 PM PST 24 |
Mar 03 12:43:51 PM PST 24 |
116908330 ps |
| T950 |
/workspace/coverage/default/15.pwrmgr_wakeup_reset.1499335155 |
|
|
Mar 03 12:43:41 PM PST 24 |
Mar 03 12:43:42 PM PST 24 |
292455882 ps |
| T951 |
/workspace/coverage/default/17.pwrmgr_glitch.1460660860 |
|
|
Mar 03 12:43:57 PM PST 24 |
Mar 03 12:43:58 PM PST 24 |
25759465 ps |
| T952 |
/workspace/coverage/default/35.pwrmgr_stress_all.2978314870 |
|
|
Mar 03 12:44:57 PM PST 24 |
Mar 03 12:45:02 PM PST 24 |
919266337 ps |
| T953 |
/workspace/coverage/default/21.pwrmgr_reset_invalid.1247988693 |
|
|
Mar 03 12:44:09 PM PST 24 |
Mar 03 12:44:11 PM PST 24 |
109002321 ps |
| T954 |
/workspace/coverage/default/38.pwrmgr_wakeup.3142232608 |
|
|
Mar 03 12:44:58 PM PST 24 |
Mar 03 12:44:59 PM PST 24 |
83091676 ps |
| T955 |
/workspace/coverage/default/28.pwrmgr_disable_rom_integrity_check.2016725475 |
|
|
Mar 03 12:44:26 PM PST 24 |
Mar 03 12:44:27 PM PST 24 |
62586214 ps |
| T956 |
/workspace/coverage/default/11.pwrmgr_wakeup.3079388229 |
|
|
Mar 03 12:43:39 PM PST 24 |
Mar 03 12:43:41 PM PST 24 |
355328511 ps |
| T957 |
/workspace/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.1357888815 |
|
|
Mar 03 12:44:21 PM PST 24 |
Mar 03 12:44:22 PM PST 24 |
35898958 ps |
| T958 |
/workspace/coverage/default/47.pwrmgr_wakeup_reset.227962859 |
|
|
Mar 03 12:45:26 PM PST 24 |
Mar 03 12:45:27 PM PST 24 |
211574288 ps |
| T959 |
/workspace/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.861050353 |
|
|
Mar 03 12:43:31 PM PST 24 |
Mar 03 12:43:32 PM PST 24 |
296354105 ps |
| T960 |
/workspace/coverage/default/41.pwrmgr_wakeup_reset.2114387869 |
|
|
Mar 03 12:45:05 PM PST 24 |
Mar 03 12:45:07 PM PST 24 |
470959584 ps |
| T961 |
/workspace/coverage/default/17.pwrmgr_reset.3606282023 |
|
|
Mar 03 12:43:58 PM PST 24 |
Mar 03 12:43:59 PM PST 24 |
247367097 ps |
| T962 |
/workspace/coverage/default/38.pwrmgr_lowpower_wakeup_race.1280595042 |
|
|
Mar 03 12:44:57 PM PST 24 |
Mar 03 12:44:58 PM PST 24 |
49738685 ps |
| T963 |
/workspace/coverage/default/29.pwrmgr_wakeup_reset.4011068166 |
|
|
Mar 03 12:44:20 PM PST 24 |
Mar 03 12:44:22 PM PST 24 |
283421015 ps |
| T964 |
/workspace/coverage/default/5.pwrmgr_lowpower_wakeup_race.2055502096 |
|
|
Mar 03 12:43:17 PM PST 24 |
Mar 03 12:43:19 PM PST 24 |
362810897 ps |
| T965 |
/workspace/coverage/default/19.pwrmgr_global_esc.3618262846 |
|
|
Mar 03 12:43:59 PM PST 24 |
Mar 03 12:44:00 PM PST 24 |
40397333 ps |
| T966 |
/workspace/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.1725500603 |
|
|
Mar 03 12:44:17 PM PST 24 |
Mar 03 12:44:20 PM PST 24 |
363494430 ps |
| T967 |
/workspace/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.1748743814 |
|
|
Mar 03 12:44:32 PM PST 24 |
Mar 03 12:44:33 PM PST 24 |
72144772 ps |
| T968 |
/workspace/coverage/default/36.pwrmgr_wakeup.2984119963 |
|
|
Mar 03 12:44:46 PM PST 24 |
Mar 03 12:44:50 PM PST 24 |
140782453 ps |
| T969 |
/workspace/coverage/default/18.pwrmgr_escalation_timeout.106172513 |
|
|
Mar 03 12:43:58 PM PST 24 |
Mar 03 12:43:59 PM PST 24 |
638453700 ps |
| T970 |
/workspace/coverage/default/29.pwrmgr_aborted_low_power.3958316744 |
|
|
Mar 03 12:44:26 PM PST 24 |
Mar 03 12:44:27 PM PST 24 |
17388855 ps |
| T971 |
/workspace/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4253561143 |
|
|
Mar 03 12:44:08 PM PST 24 |
Mar 03 12:44:10 PM PST 24 |
1422312425 ps |
| T25 |
/workspace/coverage/default/1.pwrmgr_sec_cm.840179298 |
|
|
Mar 03 12:43:03 PM PST 24 |
Mar 03 12:43:06 PM PST 24 |
587292989 ps |
| T972 |
/workspace/coverage/default/30.pwrmgr_disable_rom_integrity_check.4167367289 |
|
|
Mar 03 12:44:36 PM PST 24 |
Mar 03 12:44:37 PM PST 24 |
59037776 ps |
| T973 |
/workspace/coverage/default/34.pwrmgr_wakeup_reset.3723365981 |
|
|
Mar 03 12:44:47 PM PST 24 |
Mar 03 12:44:51 PM PST 24 |
468785479 ps |
| T974 |
/workspace/coverage/default/33.pwrmgr_wakeup_reset.2483434514 |
|
|
Mar 03 12:44:46 PM PST 24 |
Mar 03 12:44:50 PM PST 24 |
198910433 ps |
| T161 |
/workspace/coverage/default/45.pwrmgr_disable_rom_integrity_check.1958464399 |
|
|
Mar 03 12:45:20 PM PST 24 |
Mar 03 12:45:21 PM PST 24 |
64115067 ps |
| T975 |
/workspace/coverage/default/9.pwrmgr_smoke.3986113794 |
|
|
Mar 03 12:43:31 PM PST 24 |
Mar 03 12:43:32 PM PST 24 |
30525677 ps |
| T976 |
/workspace/coverage/default/43.pwrmgr_reset.1197719016 |
|
|
Mar 03 12:45:26 PM PST 24 |
Mar 03 12:45:27 PM PST 24 |
67686965 ps |
| T977 |
/workspace/coverage/default/2.pwrmgr_reset_invalid.4128746858 |
|
|
Mar 03 12:43:12 PM PST 24 |
Mar 03 12:43:14 PM PST 24 |
111672973 ps |
| T978 |
/workspace/coverage/default/36.pwrmgr_smoke.2161148330 |
|
|
Mar 03 12:44:48 PM PST 24 |
Mar 03 12:44:51 PM PST 24 |
62738775 ps |
| T72 |
/workspace/coverage/cover_reg_top/49.pwrmgr_intr_test.1610419034 |
|
|
Mar 03 12:36:32 PM PST 24 |
Mar 03 12:36:33 PM PST 24 |
47060421 ps |
| T73 |
/workspace/coverage/cover_reg_top/47.pwrmgr_intr_test.4068280529 |
|
|
Mar 03 12:36:50 PM PST 24 |
Mar 03 12:36:51 PM PST 24 |
18626756 ps |
| T74 |
/workspace/coverage/cover_reg_top/14.pwrmgr_intr_test.3835382388 |
|
|
Mar 03 12:36:26 PM PST 24 |
Mar 03 12:36:27 PM PST 24 |
24040358 ps |
| T51 |
/workspace/coverage/cover_reg_top/15.pwrmgr_tl_errors.3163701526 |
|
|
Mar 03 12:36:20 PM PST 24 |
Mar 03 12:36:22 PM PST 24 |
86204413 ps |
| T65 |
/workspace/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.2216586613 |
|
|
Mar 03 12:36:36 PM PST 24 |
Mar 03 12:36:37 PM PST 24 |
23193915 ps |
| T153 |
/workspace/coverage/cover_reg_top/18.pwrmgr_intr_test.3470564629 |
|
|
Mar 03 12:36:32 PM PST 24 |
Mar 03 12:36:33 PM PST 24 |
111794807 ps |
| T62 |
/workspace/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.3051961238 |
|
|
Mar 03 12:36:02 PM PST 24 |
Mar 03 12:36:03 PM PST 24 |
27669017 ps |
| T52 |
/workspace/coverage/cover_reg_top/10.pwrmgr_tl_errors.1507931195 |
|
|
Mar 03 12:36:17 PM PST 24 |
Mar 03 12:36:19 PM PST 24 |
89070721 ps |
| T63 |
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.3050205519 |
|
|
Mar 03 12:35:55 PM PST 24 |
Mar 03 12:35:56 PM PST 24 |
54867185 ps |
| T68 |
/workspace/coverage/cover_reg_top/5.pwrmgr_tl_errors.3643155911 |
|
|
Mar 03 12:35:57 PM PST 24 |
Mar 03 12:35:59 PM PST 24 |
132952227 ps |
| T154 |
/workspace/coverage/cover_reg_top/19.pwrmgr_intr_test.3176892371 |
|
|
Mar 03 12:36:23 PM PST 24 |
Mar 03 12:36:24 PM PST 24 |
23357478 ps |
| T113 |
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.1941448156 |
|
|
Mar 03 12:36:05 PM PST 24 |
Mar 03 12:36:06 PM PST 24 |
73576123 ps |
| T89 |
/workspace/coverage/cover_reg_top/19.pwrmgr_same_csr_outstanding.4279273274 |
|
|
Mar 03 12:36:17 PM PST 24 |
Mar 03 12:36:17 PM PST 24 |
47814694 ps |
| T64 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.3745714395 |
|
|
Mar 03 12:36:07 PM PST 24 |
Mar 03 12:36:07 PM PST 24 |
240272443 ps |
| T66 |
/workspace/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.1591686847 |
|
|
Mar 03 12:36:49 PM PST 24 |
Mar 03 12:36:50 PM PST 24 |
73299919 ps |
| T67 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_rw.409045633 |
|
|
Mar 03 12:36:03 PM PST 24 |
Mar 03 12:36:04 PM PST 24 |
19719126 ps |
| T71 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.659825880 |
|
|
Mar 03 12:36:05 PM PST 24 |
Mar 03 12:36:06 PM PST 24 |
94196316 ps |
| T55 |
/workspace/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.2095432575 |
|
|
Mar 03 12:36:46 PM PST 24 |
Mar 03 12:36:47 PM PST 24 |
108669276 ps |
| T58 |
/workspace/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.1794103470 |
|
|
Mar 03 12:36:33 PM PST 24 |
Mar 03 12:36:34 PM PST 24 |
229311310 ps |
| T59 |
/workspace/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.3645508747 |
|
|
Mar 03 12:36:08 PM PST 24 |
Mar 03 12:36:10 PM PST 24 |
508170394 ps |
| T69 |
/workspace/coverage/cover_reg_top/9.pwrmgr_tl_errors.1813339710 |
|
|
Mar 03 12:36:06 PM PST 24 |
Mar 03 12:36:07 PM PST 24 |
89221586 ps |
| T114 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.2092978263 |
|
|
Mar 03 12:36:02 PM PST 24 |
Mar 03 12:36:03 PM PST 24 |
27445994 ps |
| T124 |
/workspace/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.1373503833 |
|
|
Mar 03 12:36:02 PM PST 24 |
Mar 03 12:36:03 PM PST 24 |
72360948 ps |
| T115 |
/workspace/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.2011219503 |
|
|
Mar 03 12:36:30 PM PST 24 |
Mar 03 12:36:31 PM PST 24 |
60398451 ps |
| T116 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.1332869112 |
|
|
Mar 03 12:35:55 PM PST 24 |
Mar 03 12:35:56 PM PST 24 |
74467619 ps |
| T83 |
/workspace/coverage/cover_reg_top/0.pwrmgr_tl_errors.2902816455 |
|
|
Mar 03 12:35:51 PM PST 24 |
Mar 03 12:35:53 PM PST 24 |
184175577 ps |
| T979 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.2415956790 |
|
|
Mar 03 12:36:01 PM PST 24 |
Mar 03 12:36:02 PM PST 24 |
25860799 ps |
| T980 |
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_rw.3379579639 |
|
|
Mar 03 12:35:53 PM PST 24 |
Mar 03 12:35:54 PM PST 24 |
53799932 ps |
| T150 |
/workspace/coverage/cover_reg_top/10.pwrmgr_tl_intg_err.431350514 |
|
|
Mar 03 12:36:36 PM PST 24 |
Mar 03 12:36:38 PM PST 24 |
118359767 ps |
| T981 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.2523174396 |
|
|
Mar 03 12:35:58 PM PST 24 |
Mar 03 12:36:01 PM PST 24 |
828405132 ps |
| T982 |
/workspace/coverage/cover_reg_top/15.pwrmgr_csr_rw.593877829 |
|
|
Mar 03 12:36:30 PM PST 24 |
Mar 03 12:36:31 PM PST 24 |
19789662 ps |
| T983 |
/workspace/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.1700070165 |
|
|
Mar 03 12:36:20 PM PST 24 |
Mar 03 12:36:21 PM PST 24 |
40144736 ps |
| T984 |
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.1252765788 |
|
|
Mar 03 12:36:21 PM PST 24 |
Mar 03 12:36:22 PM PST 24 |
46229633 ps |
| T70 |
/workspace/coverage/cover_reg_top/12.pwrmgr_csr_mem_rw_with_rand_reset.606331921 |
|
|
Mar 03 12:36:30 PM PST 24 |
Mar 03 12:36:31 PM PST 24 |
52690070 ps |
| T155 |
/workspace/coverage/cover_reg_top/15.pwrmgr_intr_test.231002837 |
|
|
Mar 03 12:36:28 PM PST 24 |
Mar 03 12:36:29 PM PST 24 |
20650406 ps |
| T76 |
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_errors.1181182655 |
|
|
Mar 03 12:36:26 PM PST 24 |
Mar 03 12:36:27 PM PST 24 |
198072265 ps |
| T985 |
/workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.649350517 |
|
|
Mar 03 12:36:34 PM PST 24 |
Mar 03 12:36:35 PM PST 24 |
19610226 ps |
| T986 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.586841278 |
|
|
Mar 03 12:36:05 PM PST 24 |
Mar 03 12:36:06 PM PST 24 |
44661010 ps |
| T987 |
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.573345819 |
|
|
Mar 03 12:36:25 PM PST 24 |
Mar 03 12:36:27 PM PST 24 |
34312004 ps |
| T77 |
/workspace/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.1454831775 |
|
|
Mar 03 12:35:52 PM PST 24 |
Mar 03 12:35:53 PM PST 24 |
237504590 ps |
| T125 |
/workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.2466480447 |
|
|
Mar 03 12:36:09 PM PST 24 |
Mar 03 12:36:10 PM PST 24 |
37206617 ps |
| T151 |
/workspace/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.735662286 |
|
|
Mar 03 12:35:40 PM PST 24 |
Mar 03 12:35:41 PM PST 24 |
212240505 ps |
| T126 |
/workspace/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.3741082856 |
|
|
Mar 03 12:36:07 PM PST 24 |
Mar 03 12:36:08 PM PST 24 |
40459406 ps |
| T988 |
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_errors.1224874215 |
|
|
Mar 03 12:35:56 PM PST 24 |
Mar 03 12:35:57 PM PST 24 |
65985539 ps |
| T989 |
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.3948778599 |
|
|
Mar 03 12:35:57 PM PST 24 |
Mar 03 12:35:58 PM PST 24 |
399199260 ps |
| T127 |
/workspace/coverage/cover_reg_top/11.pwrmgr_csr_rw.33978001 |
|
|
Mar 03 12:36:19 PM PST 24 |
Mar 03 12:36:20 PM PST 24 |
47663186 ps |
| T128 |
/workspace/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.187169861 |
|
|
Mar 03 12:36:04 PM PST 24 |
Mar 03 12:36:05 PM PST 24 |
29758037 ps |
| T990 |
/workspace/coverage/cover_reg_top/21.pwrmgr_intr_test.2587547403 |
|
|
Mar 03 12:36:20 PM PST 24 |
Mar 03 12:36:21 PM PST 24 |
30305022 ps |
| T991 |
/workspace/coverage/cover_reg_top/17.pwrmgr_csr_mem_rw_with_rand_reset.955717955 |
|
|
Mar 03 12:36:18 PM PST 24 |
Mar 03 12:36:19 PM PST 24 |
124013586 ps |
| T992 |
/workspace/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.3526744131 |
|
|
Mar 03 12:36:01 PM PST 24 |
Mar 03 12:36:02 PM PST 24 |
21513401 ps |
| T993 |
/workspace/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.4057190612 |
|
|
Mar 03 12:35:48 PM PST 24 |
Mar 03 12:35:49 PM PST 24 |
371582792 ps |
| T157 |
/workspace/coverage/cover_reg_top/13.pwrmgr_intr_test.2017315201 |
|
|
Mar 03 12:36:19 PM PST 24 |
Mar 03 12:36:19 PM PST 24 |
28519767 ps |
| T117 |
/workspace/coverage/cover_reg_top/18.pwrmgr_csr_rw.1043948247 |
|
|
Mar 03 12:36:22 PM PST 24 |
Mar 03 12:36:28 PM PST 24 |
22398474 ps |
| T994 |
/workspace/coverage/cover_reg_top/6.pwrmgr_tl_errors.1271397403 |
|
|
Mar 03 12:35:51 PM PST 24 |
Mar 03 12:35:53 PM PST 24 |
80472418 ps |
| T995 |
/workspace/coverage/cover_reg_top/8.pwrmgr_csr_mem_rw_with_rand_reset.396195218 |
|
|
Mar 03 12:36:01 PM PST 24 |
Mar 03 12:36:02 PM PST 24 |
65696562 ps |
| T996 |
/workspace/coverage/cover_reg_top/19.pwrmgr_tl_errors.826660270 |
|
|
Mar 03 12:36:17 PM PST 24 |
Mar 03 12:36:19 PM PST 24 |
74316512 ps |
| T997 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_rw.2863990796 |
|
|
Mar 03 12:36:05 PM PST 24 |
Mar 03 12:36:06 PM PST 24 |
17935391 ps |
| T156 |
/workspace/coverage/cover_reg_top/38.pwrmgr_intr_test.1585955384 |
|
|
Mar 03 12:36:45 PM PST 24 |
Mar 03 12:36:46 PM PST 24 |
17555596 ps |
| T998 |
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.650449432 |
|
|
Mar 03 12:36:48 PM PST 24 |
Mar 03 12:36:50 PM PST 24 |
272665924 ps |
| T999 |
/workspace/coverage/cover_reg_top/8.pwrmgr_intr_test.3305693269 |
|
|
Mar 03 12:36:01 PM PST 24 |
Mar 03 12:36:02 PM PST 24 |
16742066 ps |
| T1000 |
/workspace/coverage/cover_reg_top/48.pwrmgr_intr_test.156615215 |
|
|
Mar 03 12:36:40 PM PST 24 |
Mar 03 12:36:40 PM PST 24 |
32406088 ps |
| T118 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.1883885201 |
|
|
Mar 03 12:35:49 PM PST 24 |
Mar 03 12:35:50 PM PST 24 |
43337270 ps |
| T1001 |
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.898375206 |
|
|
Mar 03 12:35:53 PM PST 24 |
Mar 03 12:35:54 PM PST 24 |
85275345 ps |
| T1002 |
/workspace/coverage/cover_reg_top/32.pwrmgr_intr_test.166355355 |
|
|
Mar 03 12:36:34 PM PST 24 |
Mar 03 12:36:35 PM PST 24 |
143647398 ps |
| T1003 |
/workspace/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.3734175544 |
|
|
Mar 03 12:36:10 PM PST 24 |
Mar 03 12:36:12 PM PST 24 |
69657917 ps |
| T119 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_rw.3871376641 |
|
|
Mar 03 12:35:42 PM PST 24 |
Mar 03 12:35:43 PM PST 24 |
59528038 ps |
| T1004 |
/workspace/coverage/cover_reg_top/45.pwrmgr_intr_test.3067404289 |
|
|
Mar 03 12:36:33 PM PST 24 |
Mar 03 12:36:33 PM PST 24 |
19350635 ps |
| T1005 |
/workspace/coverage/cover_reg_top/10.pwrmgr_intr_test.2949096981 |
|
|
Mar 03 12:36:23 PM PST 24 |
Mar 03 12:36:24 PM PST 24 |
54100857 ps |
| T1006 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.3096163353 |
|
|
Mar 03 12:35:53 PM PST 24 |
Mar 03 12:35:54 PM PST 24 |
66858080 ps |
| T1007 |
/workspace/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.817133945 |
|
|
Mar 03 12:36:35 PM PST 24 |
Mar 03 12:36:36 PM PST 24 |
69184316 ps |
| T1008 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.922496404 |
|
|
Mar 03 12:35:52 PM PST 24 |
Mar 03 12:35:53 PM PST 24 |
32789342 ps |
| T1009 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.3194977367 |
|
|
Mar 03 12:35:58 PM PST 24 |
Mar 03 12:35:59 PM PST 24 |
39792605 ps |