| T805 |
/workspace/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3367715590 |
|
|
Mar 10 12:34:48 PM PDT 24 |
Mar 10 12:34:52 PM PDT 24 |
1066493129 ps |
| T806 |
/workspace/coverage/default/47.pwrmgr_reset_invalid.3939124382 |
|
|
Mar 10 12:35:01 PM PDT 24 |
Mar 10 12:35:03 PM PDT 24 |
110233258 ps |
| T807 |
/workspace/coverage/default/23.pwrmgr_wakeup.3384887738 |
|
|
Mar 10 12:33:51 PM PDT 24 |
Mar 10 12:33:53 PM PDT 24 |
275338246 ps |
| T808 |
/workspace/coverage/default/14.pwrmgr_smoke.1783220604 |
|
|
Mar 10 12:33:15 PM PDT 24 |
Mar 10 12:33:16 PM PDT 24 |
42247392 ps |
| T809 |
/workspace/coverage/default/12.pwrmgr_glitch.90883652 |
|
|
Mar 10 12:33:09 PM PDT 24 |
Mar 10 12:33:10 PM PDT 24 |
48107708 ps |
| T810 |
/workspace/coverage/default/0.pwrmgr_sec_cm_ctrl_config_regwen.2056624659 |
|
|
Mar 10 12:32:08 PM PDT 24 |
Mar 10 12:32:10 PM PDT 24 |
178459473 ps |
| T811 |
/workspace/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1197596453 |
|
|
Mar 10 12:35:02 PM PDT 24 |
Mar 10 12:35:05 PM PDT 24 |
978355284 ps |
| T812 |
/workspace/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.3684978305 |
|
|
Mar 10 12:34:29 PM PDT 24 |
Mar 10 12:34:31 PM PDT 24 |
30404357 ps |
| T813 |
/workspace/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.4086184487 |
|
|
Mar 10 12:32:11 PM PDT 24 |
Mar 10 12:32:12 PM PDT 24 |
129715648 ps |
| T814 |
/workspace/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1375913548 |
|
|
Mar 10 12:32:34 PM PDT 24 |
Mar 10 12:32:36 PM PDT 24 |
1367875492 ps |
| T815 |
/workspace/coverage/default/24.pwrmgr_glitch.3826608145 |
|
|
Mar 10 12:33:53 PM PDT 24 |
Mar 10 12:33:54 PM PDT 24 |
57887241 ps |
| T816 |
/workspace/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1128002766 |
|
|
Mar 10 12:34:11 PM PDT 24 |
Mar 10 12:34:20 PM PDT 24 |
935655994 ps |
| T817 |
/workspace/coverage/default/46.pwrmgr_disable_rom_integrity_check.2207072823 |
|
|
Mar 10 12:38:50 PM PDT 24 |
Mar 10 12:38:51 PM PDT 24 |
54274224 ps |
| T818 |
/workspace/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1465236811 |
|
|
Mar 10 12:34:10 PM PDT 24 |
Mar 10 12:34:13 PM PDT 24 |
899252841 ps |
| T819 |
/workspace/coverage/default/35.pwrmgr_reset_invalid.306229833 |
|
|
Mar 10 12:34:33 PM PDT 24 |
Mar 10 12:34:34 PM PDT 24 |
162783388 ps |
| T820 |
/workspace/coverage/default/35.pwrmgr_wakeup.523977623 |
|
|
Mar 10 12:34:20 PM PDT 24 |
Mar 10 12:34:21 PM PDT 24 |
404334752 ps |
| T821 |
/workspace/coverage/default/43.pwrmgr_global_esc.2562952182 |
|
|
Mar 10 12:34:47 PM PDT 24 |
Mar 10 12:34:47 PM PDT 24 |
135836961 ps |
| T822 |
/workspace/coverage/default/46.pwrmgr_smoke.1019053569 |
|
|
Mar 10 12:35:01 PM PDT 24 |
Mar 10 12:35:03 PM PDT 24 |
126634283 ps |
| T823 |
/workspace/coverage/default/23.pwrmgr_stress_all.2659502031 |
|
|
Mar 10 12:34:02 PM PDT 24 |
Mar 10 12:34:05 PM PDT 24 |
2581641020 ps |
| T824 |
/workspace/coverage/default/38.pwrmgr_wakeup.2891272209 |
|
|
Mar 10 12:34:40 PM PDT 24 |
Mar 10 12:34:44 PM PDT 24 |
333326973 ps |
| T825 |
/workspace/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.2257917296 |
|
|
Mar 10 12:34:48 PM PDT 24 |
Mar 10 12:34:49 PM PDT 24 |
67069706 ps |
| T826 |
/workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.1820415616 |
|
|
Mar 10 12:33:54 PM PDT 24 |
Mar 10 12:33:55 PM PDT 24 |
329975654 ps |
| T827 |
/workspace/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2808042580 |
|
|
Mar 10 12:33:36 PM PDT 24 |
Mar 10 12:33:40 PM PDT 24 |
933131593 ps |
| T828 |
/workspace/coverage/default/26.pwrmgr_disable_rom_integrity_check.535293343 |
|
|
Mar 10 12:33:58 PM PDT 24 |
Mar 10 12:33:59 PM PDT 24 |
69542770 ps |
| T829 |
/workspace/coverage/default/29.pwrmgr_wakeup_reset.3623413831 |
|
|
Mar 10 12:34:08 PM PDT 24 |
Mar 10 12:34:09 PM PDT 24 |
559963554 ps |
| T830 |
/workspace/coverage/default/1.pwrmgr_lowpower_invalid.2384590993 |
|
|
Mar 10 12:32:00 PM PDT 24 |
Mar 10 12:32:01 PM PDT 24 |
70722894 ps |
| T831 |
/workspace/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1027858630 |
|
|
Mar 10 12:32:53 PM PDT 24 |
Mar 10 12:32:56 PM PDT 24 |
1025732189 ps |
| T832 |
/workspace/coverage/default/42.pwrmgr_lowpower_invalid.3284427976 |
|
|
Mar 10 12:34:55 PM PDT 24 |
Mar 10 12:34:56 PM PDT 24 |
71362010 ps |
| T833 |
/workspace/coverage/default/20.pwrmgr_glitch.4005936272 |
|
|
Mar 10 12:33:45 PM PDT 24 |
Mar 10 12:33:46 PM PDT 24 |
55386983 ps |
| T834 |
/workspace/coverage/default/15.pwrmgr_smoke.2838151593 |
|
|
Mar 10 12:33:22 PM PDT 24 |
Mar 10 12:33:24 PM PDT 24 |
33397323 ps |
| T835 |
/workspace/coverage/default/11.pwrmgr_wakeup.3766664576 |
|
|
Mar 10 12:33:03 PM PDT 24 |
Mar 10 12:33:04 PM PDT 24 |
196201674 ps |
| T836 |
/workspace/coverage/default/44.pwrmgr_reset_invalid.1641862900 |
|
|
Mar 10 12:34:50 PM PDT 24 |
Mar 10 12:34:52 PM PDT 24 |
119368668 ps |
| T837 |
/workspace/coverage/default/41.pwrmgr_lowpower_invalid.3296461539 |
|
|
Mar 10 12:34:40 PM PDT 24 |
Mar 10 12:34:40 PM PDT 24 |
52607094 ps |
| T838 |
/workspace/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.3583864165 |
|
|
Mar 10 12:35:11 PM PDT 24 |
Mar 10 12:35:13 PM PDT 24 |
83608020 ps |
| T839 |
/workspace/coverage/default/13.pwrmgr_global_esc.2029064877 |
|
|
Mar 10 12:33:18 PM PDT 24 |
Mar 10 12:33:19 PM PDT 24 |
42312071 ps |
| T840 |
/workspace/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.3787367059 |
|
|
Mar 10 12:33:03 PM PDT 24 |
Mar 10 12:33:04 PM PDT 24 |
49247860 ps |
| T841 |
/workspace/coverage/default/28.pwrmgr_stress_all.1124555391 |
|
|
Mar 10 12:34:08 PM PDT 24 |
Mar 10 12:34:11 PM PDT 24 |
1479952123 ps |
| T842 |
/workspace/coverage/default/37.pwrmgr_lowpower_invalid.2064153757 |
|
|
Mar 10 12:34:35 PM PDT 24 |
Mar 10 12:34:37 PM PDT 24 |
51076742 ps |
| T843 |
/workspace/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2554166587 |
|
|
Mar 10 12:31:45 PM PDT 24 |
Mar 10 12:31:49 PM PDT 24 |
834341630 ps |
| T844 |
/workspace/coverage/default/38.pwrmgr_smoke.1742385497 |
|
|
Mar 10 12:34:46 PM PDT 24 |
Mar 10 12:34:47 PM PDT 24 |
27792153 ps |
| T845 |
/workspace/coverage/default/5.pwrmgr_sec_cm_ctrl_config_regwen.1258737395 |
|
|
Mar 10 12:32:33 PM PDT 24 |
Mar 10 12:32:34 PM PDT 24 |
100726366 ps |
| T846 |
/workspace/coverage/default/41.pwrmgr_stress_all_with_rand_reset.1542075721 |
|
|
Mar 10 12:34:41 PM PDT 24 |
Mar 10 12:34:54 PM PDT 24 |
8963980356 ps |
| T847 |
/workspace/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2631770604 |
|
|
Mar 10 12:34:37 PM PDT 24 |
Mar 10 12:34:43 PM PDT 24 |
852834774 ps |
| T848 |
/workspace/coverage/default/44.pwrmgr_disable_rom_integrity_check.1774564515 |
|
|
Mar 10 12:34:58 PM PDT 24 |
Mar 10 12:34:59 PM PDT 24 |
92329388 ps |
| T849 |
/workspace/coverage/default/31.pwrmgr_global_esc.2291717589 |
|
|
Mar 10 12:34:16 PM PDT 24 |
Mar 10 12:34:17 PM PDT 24 |
58979413 ps |
| T850 |
/workspace/coverage/default/44.pwrmgr_lowpower_invalid.1544894654 |
|
|
Mar 10 12:34:49 PM PDT 24 |
Mar 10 12:34:50 PM PDT 24 |
54028060 ps |
| T851 |
/workspace/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3743934281 |
|
|
Mar 10 12:34:04 PM PDT 24 |
Mar 10 12:34:08 PM PDT 24 |
1149843227 ps |
| T852 |
/workspace/coverage/default/23.pwrmgr_escalation_timeout.352764237 |
|
|
Mar 10 12:33:56 PM PDT 24 |
Mar 10 12:33:57 PM PDT 24 |
325450337 ps |
| T853 |
/workspace/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.3613368960 |
|
|
Mar 10 12:34:04 PM PDT 24 |
Mar 10 12:34:05 PM PDT 24 |
52124179 ps |
| T854 |
/workspace/coverage/default/23.pwrmgr_lowpower_wakeup_race.2194408864 |
|
|
Mar 10 12:33:46 PM PDT 24 |
Mar 10 12:33:47 PM PDT 24 |
76827348 ps |
| T855 |
/workspace/coverage/default/48.pwrmgr_reset_invalid.275663416 |
|
|
Mar 10 12:35:01 PM PDT 24 |
Mar 10 12:35:03 PM PDT 24 |
115433139 ps |
| T856 |
/workspace/coverage/default/2.pwrmgr_global_esc.4126915600 |
|
|
Mar 10 12:32:12 PM PDT 24 |
Mar 10 12:32:13 PM PDT 24 |
27569475 ps |
| T857 |
/workspace/coverage/default/23.pwrmgr_lowpower_invalid.3803091875 |
|
|
Mar 10 12:33:54 PM PDT 24 |
Mar 10 12:33:55 PM PDT 24 |
51946844 ps |
| T858 |
/workspace/coverage/default/19.pwrmgr_reset_invalid.378882266 |
|
|
Mar 10 12:33:42 PM PDT 24 |
Mar 10 12:33:43 PM PDT 24 |
120027644 ps |
| T859 |
/workspace/coverage/default/23.pwrmgr_smoke.2637933848 |
|
|
Mar 10 12:33:46 PM PDT 24 |
Mar 10 12:33:47 PM PDT 24 |
41837084 ps |
| T860 |
/workspace/coverage/default/2.pwrmgr_aborted_low_power.2221809490 |
|
|
Mar 10 12:32:07 PM PDT 24 |
Mar 10 12:32:08 PM PDT 24 |
50047248 ps |
| T861 |
/workspace/coverage/default/40.pwrmgr_reset.892965057 |
|
|
Mar 10 12:34:35 PM PDT 24 |
Mar 10 12:34:37 PM PDT 24 |
29071252 ps |
| T862 |
/workspace/coverage/default/3.pwrmgr_escalation_timeout.537186837 |
|
|
Mar 10 12:32:24 PM PDT 24 |
Mar 10 12:32:25 PM PDT 24 |
321850426 ps |
| T863 |
/workspace/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1434391689 |
|
|
Mar 10 12:34:32 PM PDT 24 |
Mar 10 12:34:35 PM PDT 24 |
910289039 ps |
| T864 |
/workspace/coverage/default/1.pwrmgr_escalation_timeout.2292470651 |
|
|
Mar 10 12:31:53 PM PDT 24 |
Mar 10 12:31:55 PM PDT 24 |
166464665 ps |
| T865 |
/workspace/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.1955236025 |
|
|
Mar 10 12:35:04 PM PDT 24 |
Mar 10 12:35:06 PM PDT 24 |
30290131 ps |
| T866 |
/workspace/coverage/default/33.pwrmgr_aborted_low_power.1654433429 |
|
|
Mar 10 12:37:02 PM PDT 24 |
Mar 10 12:37:03 PM PDT 24 |
58881502 ps |
| T867 |
/workspace/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1171454089 |
|
|
Mar 10 12:34:34 PM PDT 24 |
Mar 10 12:34:38 PM PDT 24 |
894533252 ps |
| T868 |
/workspace/coverage/default/14.pwrmgr_reset_invalid.559972315 |
|
|
Mar 10 12:33:20 PM PDT 24 |
Mar 10 12:33:21 PM PDT 24 |
106077558 ps |
| T869 |
/workspace/coverage/default/36.pwrmgr_lowpower_wakeup_race.3528182413 |
|
|
Mar 10 12:34:28 PM PDT 24 |
Mar 10 12:34:31 PM PDT 24 |
101000433 ps |
| T870 |
/workspace/coverage/default/39.pwrmgr_glitch.3721927101 |
|
|
Mar 10 12:34:43 PM PDT 24 |
Mar 10 12:34:43 PM PDT 24 |
88965106 ps |
| T871 |
/workspace/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2297645061 |
|
|
Mar 10 12:33:37 PM PDT 24 |
Mar 10 12:33:40 PM PDT 24 |
1333485052 ps |
| T872 |
/workspace/coverage/default/35.pwrmgr_global_esc.310134392 |
|
|
Mar 10 12:34:39 PM PDT 24 |
Mar 10 12:34:40 PM PDT 24 |
32404191 ps |
| T873 |
/workspace/coverage/default/45.pwrmgr_smoke.2747253424 |
|
|
Mar 10 12:35:05 PM PDT 24 |
Mar 10 12:35:06 PM PDT 24 |
60738704 ps |
| T874 |
/workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.1595946007 |
|
|
Mar 10 12:34:20 PM PDT 24 |
Mar 10 12:34:21 PM PDT 24 |
369796544 ps |
| T875 |
/workspace/coverage/default/9.pwrmgr_wakeup_reset.348553048 |
|
|
Mar 10 12:33:13 PM PDT 24 |
Mar 10 12:33:15 PM PDT 24 |
321481597 ps |
| T876 |
/workspace/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.831027792 |
|
|
Mar 10 12:32:46 PM PDT 24 |
Mar 10 12:32:49 PM PDT 24 |
983040927 ps |
| T877 |
/workspace/coverage/default/20.pwrmgr_disable_rom_integrity_check.1442463296 |
|
|
Mar 10 12:33:49 PM PDT 24 |
Mar 10 12:33:51 PM PDT 24 |
73604389 ps |
| T878 |
/workspace/coverage/default/48.pwrmgr_lowpower_invalid.2405977435 |
|
|
Mar 10 12:35:08 PM PDT 24 |
Mar 10 12:35:09 PM PDT 24 |
101981723 ps |
| T879 |
/workspace/coverage/default/47.pwrmgr_lowpower_wakeup_race.2834520058 |
|
|
Mar 10 12:36:56 PM PDT 24 |
Mar 10 12:36:57 PM PDT 24 |
254193540 ps |
| T880 |
/workspace/coverage/default/25.pwrmgr_lowpower_wakeup_race.2284185786 |
|
|
Mar 10 12:34:01 PM PDT 24 |
Mar 10 12:34:01 PM PDT 24 |
170678056 ps |
| T881 |
/workspace/coverage/default/6.pwrmgr_disable_rom_integrity_check.3874432755 |
|
|
Mar 10 12:32:40 PM PDT 24 |
Mar 10 12:32:41 PM PDT 24 |
89890217 ps |
| T882 |
/workspace/coverage/default/3.pwrmgr_smoke.2833501435 |
|
|
Mar 10 12:32:18 PM PDT 24 |
Mar 10 12:32:19 PM PDT 24 |
54094606 ps |
| T883 |
/workspace/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.3218907093 |
|
|
Mar 10 12:32:11 PM PDT 24 |
Mar 10 12:32:12 PM PDT 24 |
39239880 ps |
| T884 |
/workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4048466524 |
|
|
Mar 10 12:32:23 PM PDT 24 |
Mar 10 12:32:27 PM PDT 24 |
809712197 ps |
| T885 |
/workspace/coverage/default/45.pwrmgr_global_esc.1895951293 |
|
|
Mar 10 12:34:56 PM PDT 24 |
Mar 10 12:34:57 PM PDT 24 |
58110968 ps |
| T886 |
/workspace/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.1563388452 |
|
|
Mar 10 12:33:12 PM PDT 24 |
Mar 10 12:33:14 PM PDT 24 |
64881583 ps |
| T887 |
/workspace/coverage/default/40.pwrmgr_reset_invalid.1666153990 |
|
|
Mar 10 12:34:40 PM PDT 24 |
Mar 10 12:34:44 PM PDT 24 |
109093672 ps |
| T888 |
/workspace/coverage/default/41.pwrmgr_reset.2820337168 |
|
|
Mar 10 12:34:42 PM PDT 24 |
Mar 10 12:34:45 PM PDT 24 |
61351182 ps |
| T889 |
/workspace/coverage/default/31.pwrmgr_aborted_low_power.3019238300 |
|
|
Mar 10 12:34:15 PM PDT 24 |
Mar 10 12:34:16 PM PDT 24 |
50343744 ps |
| T890 |
/workspace/coverage/default/28.pwrmgr_glitch.3612359534 |
|
|
Mar 10 12:34:07 PM PDT 24 |
Mar 10 12:34:08 PM PDT 24 |
58491959 ps |
| T891 |
/workspace/coverage/default/3.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2975126103 |
|
|
Mar 10 12:32:18 PM PDT 24 |
Mar 10 12:32:20 PM PDT 24 |
1227935870 ps |
| T892 |
/workspace/coverage/default/28.pwrmgr_aborted_low_power.3196825793 |
|
|
Mar 10 12:34:07 PM PDT 24 |
Mar 10 12:34:07 PM PDT 24 |
66354997 ps |
| T893 |
/workspace/coverage/default/13.pwrmgr_wakeup_reset.2552437506 |
|
|
Mar 10 12:33:16 PM PDT 24 |
Mar 10 12:33:17 PM PDT 24 |
142943718 ps |
| T894 |
/workspace/coverage/default/44.pwrmgr_reset.1030064673 |
|
|
Mar 10 12:34:57 PM PDT 24 |
Mar 10 12:34:58 PM PDT 24 |
198967881 ps |
| T895 |
/workspace/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.214918769 |
|
|
Mar 10 12:33:44 PM PDT 24 |
Mar 10 12:33:47 PM PDT 24 |
1022926308 ps |
| T896 |
/workspace/coverage/default/18.pwrmgr_reset_invalid.3060054491 |
|
|
Mar 10 12:33:31 PM PDT 24 |
Mar 10 12:33:32 PM PDT 24 |
123590269 ps |
| T897 |
/workspace/coverage/default/40.pwrmgr_disable_rom_integrity_check.788268016 |
|
|
Mar 10 12:34:48 PM PDT 24 |
Mar 10 12:34:50 PM PDT 24 |
77946389 ps |
| T898 |
/workspace/coverage/default/11.pwrmgr_smoke.1994216808 |
|
|
Mar 10 12:33:00 PM PDT 24 |
Mar 10 12:33:01 PM PDT 24 |
51545679 ps |
| T899 |
/workspace/coverage/default/34.pwrmgr_disable_rom_integrity_check.241967881 |
|
|
Mar 10 12:34:32 PM PDT 24 |
Mar 10 12:34:33 PM PDT 24 |
75055577 ps |
| T900 |
/workspace/coverage/default/8.pwrmgr_esc_clk_rst_malfunc.2733574788 |
|
|
Mar 10 12:32:57 PM PDT 24 |
Mar 10 12:32:58 PM PDT 24 |
28561459 ps |
| T901 |
/workspace/coverage/default/18.pwrmgr_global_esc.758011900 |
|
|
Mar 10 12:33:34 PM PDT 24 |
Mar 10 12:33:35 PM PDT 24 |
28238234 ps |
| T902 |
/workspace/coverage/default/7.pwrmgr_reset.685296021 |
|
|
Mar 10 12:32:44 PM PDT 24 |
Mar 10 12:32:45 PM PDT 24 |
73093485 ps |
| T903 |
/workspace/coverage/default/12.pwrmgr_aborted_low_power.2668876850 |
|
|
Mar 10 12:33:11 PM PDT 24 |
Mar 10 12:33:12 PM PDT 24 |
47305253 ps |
| T904 |
/workspace/coverage/default/37.pwrmgr_reset.308776447 |
|
|
Mar 10 12:34:36 PM PDT 24 |
Mar 10 12:34:38 PM PDT 24 |
84626999 ps |
| T905 |
/workspace/coverage/default/46.pwrmgr_lowpower_wakeup_race.530367712 |
|
|
Mar 10 12:34:53 PM PDT 24 |
Mar 10 12:34:55 PM PDT 24 |
128864924 ps |
| T906 |
/workspace/coverage/default/9.pwrmgr_escalation_timeout.314267733 |
|
|
Mar 10 12:32:55 PM PDT 24 |
Mar 10 12:32:56 PM PDT 24 |
165723116 ps |
| T907 |
/workspace/coverage/default/13.pwrmgr_stress_all.341548154 |
|
|
Mar 10 12:33:20 PM PDT 24 |
Mar 10 12:33:22 PM PDT 24 |
319072929 ps |
| T908 |
/workspace/coverage/default/49.pwrmgr_wakeup.2317534849 |
|
|
Mar 10 12:35:07 PM PDT 24 |
Mar 10 12:35:09 PM PDT 24 |
193621552 ps |
| T909 |
/workspace/coverage/default/21.pwrmgr_smoke.1646862130 |
|
|
Mar 10 12:33:50 PM PDT 24 |
Mar 10 12:33:51 PM PDT 24 |
52200780 ps |
| T910 |
/workspace/coverage/default/41.pwrmgr_aborted_low_power.2459630234 |
|
|
Mar 10 12:34:38 PM PDT 24 |
Mar 10 12:34:39 PM PDT 24 |
86193389 ps |
| T911 |
/workspace/coverage/default/49.pwrmgr_disable_rom_integrity_check.2735519140 |
|
|
Mar 10 12:35:17 PM PDT 24 |
Mar 10 12:35:19 PM PDT 24 |
218207784 ps |
| T912 |
/workspace/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.375455973 |
|
|
Mar 10 12:33:13 PM PDT 24 |
Mar 10 12:33:16 PM PDT 24 |
1022138269 ps |
| T913 |
/workspace/coverage/default/17.pwrmgr_reset_invalid.1259807890 |
|
|
Mar 10 12:33:34 PM PDT 24 |
Mar 10 12:33:35 PM PDT 24 |
145592027 ps |
| T914 |
/workspace/coverage/default/35.pwrmgr_lowpower_invalid.176522424 |
|
|
Mar 10 12:34:31 PM PDT 24 |
Mar 10 12:34:32 PM PDT 24 |
42865367 ps |
| T915 |
/workspace/coverage/default/27.pwrmgr_smoke.427904696 |
|
|
Mar 10 12:34:00 PM PDT 24 |
Mar 10 12:34:01 PM PDT 24 |
29883090 ps |
| T916 |
/workspace/coverage/default/5.pwrmgr_lowpower_invalid.2044795602 |
|
|
Mar 10 12:32:43 PM PDT 24 |
Mar 10 12:32:44 PM PDT 24 |
41334972 ps |
| T917 |
/workspace/coverage/default/44.pwrmgr_smoke.3094473400 |
|
|
Mar 10 12:36:59 PM PDT 24 |
Mar 10 12:37:00 PM PDT 24 |
85125991 ps |
| T918 |
/workspace/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1110671089 |
|
|
Mar 10 12:33:49 PM PDT 24 |
Mar 10 12:33:53 PM PDT 24 |
834453288 ps |
| T919 |
/workspace/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.3529568557 |
|
|
Mar 10 12:34:50 PM PDT 24 |
Mar 10 12:34:52 PM PDT 24 |
30547533 ps |
| T920 |
/workspace/coverage/default/25.pwrmgr_glitch.4240035048 |
|
|
Mar 10 12:33:57 PM PDT 24 |
Mar 10 12:33:58 PM PDT 24 |
42901923 ps |
| T921 |
/workspace/coverage/default/45.pwrmgr_reset_invalid.2577243725 |
|
|
Mar 10 12:36:57 PM PDT 24 |
Mar 10 12:36:58 PM PDT 24 |
111017399 ps |
| T922 |
/workspace/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.780218649 |
|
|
Mar 10 12:33:33 PM PDT 24 |
Mar 10 12:33:35 PM PDT 24 |
32066335 ps |
| T923 |
/workspace/coverage/default/43.pwrmgr_wakeup.3247394753 |
|
|
Mar 10 12:37:00 PM PDT 24 |
Mar 10 12:37:02 PM PDT 24 |
234640346 ps |
| T924 |
/workspace/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2535452015 |
|
|
Mar 10 12:34:19 PM PDT 24 |
Mar 10 12:34:24 PM PDT 24 |
856871202 ps |
| T925 |
/workspace/coverage/default/13.pwrmgr_smoke.1533767935 |
|
|
Mar 10 12:33:18 PM PDT 24 |
Mar 10 12:33:18 PM PDT 24 |
33496589 ps |
| T926 |
/workspace/coverage/default/33.pwrmgr_glitch.3231381175 |
|
|
Mar 10 12:34:21 PM PDT 24 |
Mar 10 12:34:22 PM PDT 24 |
48896854 ps |
| T927 |
/workspace/coverage/default/25.pwrmgr_aborted_low_power.4177297975 |
|
|
Mar 10 12:33:54 PM PDT 24 |
Mar 10 12:33:55 PM PDT 24 |
35385391 ps |
| T928 |
/workspace/coverage/default/6.pwrmgr_stress_all.3575459098 |
|
|
Mar 10 12:32:45 PM PDT 24 |
Mar 10 12:32:49 PM PDT 24 |
660591132 ps |
| T929 |
/workspace/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2585679516 |
|
|
Mar 10 12:33:57 PM PDT 24 |
Mar 10 12:33:59 PM PDT 24 |
2910774462 ps |
| T930 |
/workspace/coverage/default/1.pwrmgr_disable_rom_integrity_check.2270635646 |
|
|
Mar 10 12:32:01 PM PDT 24 |
Mar 10 12:32:02 PM PDT 24 |
70965130 ps |
| T931 |
/workspace/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.2127575252 |
|
|
Mar 10 12:34:38 PM PDT 24 |
Mar 10 12:34:39 PM PDT 24 |
31239892 ps |
| T932 |
/workspace/coverage/default/9.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.60301045 |
|
|
Mar 10 12:33:02 PM PDT 24 |
Mar 10 12:33:05 PM PDT 24 |
1009758374 ps |
| T933 |
/workspace/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3601052479 |
|
|
Mar 10 12:32:55 PM PDT 24 |
Mar 10 12:32:57 PM PDT 24 |
1409351527 ps |
| T934 |
/workspace/coverage/default/33.pwrmgr_wakeup_reset.2953038770 |
|
|
Mar 10 12:34:16 PM PDT 24 |
Mar 10 12:34:17 PM PDT 24 |
146588227 ps |
| T71 |
/workspace/coverage/default/12.pwrmgr_stress_all_with_rand_reset.1659583899 |
|
|
Mar 10 12:33:10 PM PDT 24 |
Mar 10 12:33:28 PM PDT 24 |
5014096402 ps |
| T935 |
/workspace/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.1701027008 |
|
|
Mar 10 12:33:45 PM PDT 24 |
Mar 10 12:33:45 PM PDT 24 |
245202043 ps |
| T936 |
/workspace/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.1225370799 |
|
|
Mar 10 12:34:58 PM PDT 24 |
Mar 10 12:35:00 PM PDT 24 |
329800227 ps |
| T937 |
/workspace/coverage/default/13.pwrmgr_wakeup.1498784710 |
|
|
Mar 10 12:33:19 PM PDT 24 |
Mar 10 12:33:20 PM PDT 24 |
290693174 ps |
| T938 |
/workspace/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.305163915 |
|
|
Mar 10 12:34:04 PM PDT 24 |
Mar 10 12:34:05 PM PDT 24 |
406420518 ps |
| T939 |
/workspace/coverage/default/47.pwrmgr_escalation_timeout.4192020025 |
|
|
Mar 10 12:35:07 PM PDT 24 |
Mar 10 12:35:09 PM PDT 24 |
630081367 ps |
| T940 |
/workspace/coverage/default/25.pwrmgr_stress_all.695864038 |
|
|
Mar 10 12:34:06 PM PDT 24 |
Mar 10 12:34:06 PM PDT 24 |
44137206 ps |
| T941 |
/workspace/coverage/default/28.pwrmgr_lowpower_wakeup_race.2888502631 |
|
|
Mar 10 12:34:04 PM PDT 24 |
Mar 10 12:34:05 PM PDT 24 |
300532239 ps |
| T942 |
/workspace/coverage/default/44.pwrmgr_aborted_low_power.1825684114 |
|
|
Mar 10 12:34:50 PM PDT 24 |
Mar 10 12:34:51 PM PDT 24 |
91431121 ps |
| T943 |
/workspace/coverage/default/0.pwrmgr_stress_all.4269459521 |
|
|
Mar 10 12:32:08 PM PDT 24 |
Mar 10 12:32:12 PM PDT 24 |
2964343063 ps |
| T944 |
/workspace/coverage/default/27.pwrmgr_global_esc.2025535566 |
|
|
Mar 10 12:34:13 PM PDT 24 |
Mar 10 12:34:15 PM PDT 24 |
48209309 ps |
| T945 |
/workspace/coverage/default/45.pwrmgr_lowpower_wakeup_race.1193608813 |
|
|
Mar 10 12:34:55 PM PDT 24 |
Mar 10 12:34:56 PM PDT 24 |
161845166 ps |
| T946 |
/workspace/coverage/default/40.pwrmgr_lowpower_invalid.1442326272 |
|
|
Mar 10 12:34:45 PM PDT 24 |
Mar 10 12:34:46 PM PDT 24 |
41167946 ps |
| T947 |
/workspace/coverage/default/19.pwrmgr_smoke.2575883957 |
|
|
Mar 10 12:33:37 PM PDT 24 |
Mar 10 12:33:38 PM PDT 24 |
119513032 ps |
| T948 |
/workspace/coverage/default/42.pwrmgr_reset.2927657874 |
|
|
Mar 10 12:34:43 PM PDT 24 |
Mar 10 12:34:45 PM PDT 24 |
183716182 ps |
| T949 |
/workspace/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.162870454 |
|
|
Mar 10 12:34:58 PM PDT 24 |
Mar 10 12:34:59 PM PDT 24 |
83728312 ps |
| T950 |
/workspace/coverage/default/19.pwrmgr_stress_all.2342569172 |
|
|
Mar 10 12:33:43 PM PDT 24 |
Mar 10 12:33:44 PM PDT 24 |
318054022 ps |
| T951 |
/workspace/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.3418396982 |
|
|
Mar 10 12:34:46 PM PDT 24 |
Mar 10 12:34:47 PM PDT 24 |
187104901 ps |
| T952 |
/workspace/coverage/default/45.pwrmgr_glitch.2942153673 |
|
|
Mar 10 12:34:46 PM PDT 24 |
Mar 10 12:34:47 PM PDT 24 |
60395391 ps |
| T953 |
/workspace/coverage/default/34.pwrmgr_escalation_timeout.2713028629 |
|
|
Mar 10 12:34:25 PM PDT 24 |
Mar 10 12:34:26 PM PDT 24 |
160117972 ps |
| T954 |
/workspace/coverage/default/2.pwrmgr_reset_invalid.3687407601 |
|
|
Mar 10 12:32:10 PM PDT 24 |
Mar 10 12:32:11 PM PDT 24 |
173305736 ps |
| T955 |
/workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.4216527653 |
|
|
Mar 10 12:34:52 PM PDT 24 |
Mar 10 12:34:55 PM PDT 24 |
30822071 ps |
| T956 |
/workspace/coverage/default/30.pwrmgr_wakeup_reset.3983586096 |
|
|
Mar 10 12:34:10 PM PDT 24 |
Mar 10 12:34:11 PM PDT 24 |
129225277 ps |
| T957 |
/workspace/coverage/default/13.pwrmgr_escalation_timeout.4120236547 |
|
|
Mar 10 12:33:16 PM PDT 24 |
Mar 10 12:33:17 PM PDT 24 |
609761402 ps |
| T958 |
/workspace/coverage/default/46.pwrmgr_escalation_timeout.2792507105 |
|
|
Mar 10 12:35:08 PM PDT 24 |
Mar 10 12:35:09 PM PDT 24 |
615523273 ps |
| T959 |
/workspace/coverage/default/9.pwrmgr_disable_rom_integrity_check.173575536 |
|
|
Mar 10 12:33:02 PM PDT 24 |
Mar 10 12:33:03 PM PDT 24 |
68065528 ps |
| T960 |
/workspace/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3138533278 |
|
|
Mar 10 12:34:59 PM PDT 24 |
Mar 10 12:35:03 PM PDT 24 |
903705487 ps |
| T961 |
/workspace/coverage/default/41.pwrmgr_escalation_timeout.111499381 |
|
|
Mar 10 12:34:51 PM PDT 24 |
Mar 10 12:34:53 PM PDT 24 |
695398580 ps |
| T29 |
/workspace/coverage/default/3.pwrmgr_sec_cm.4150272270 |
|
|
Mar 10 12:32:23 PM PDT 24 |
Mar 10 12:32:24 PM PDT 24 |
893857861 ps |
| T962 |
/workspace/coverage/default/4.pwrmgr_lowpower_invalid.2483734804 |
|
|
Mar 10 12:32:31 PM PDT 24 |
Mar 10 12:32:31 PM PDT 24 |
51232412 ps |
| T963 |
/workspace/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1032070743 |
|
|
Mar 10 12:33:48 PM PDT 24 |
Mar 10 12:33:51 PM PDT 24 |
998563096 ps |
| T964 |
/workspace/coverage/default/2.pwrmgr_escalation_timeout.3420263570 |
|
|
Mar 10 12:32:11 PM PDT 24 |
Mar 10 12:32:12 PM PDT 24 |
326321685 ps |
| T965 |
/workspace/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.2112555122 |
|
|
Mar 10 12:35:05 PM PDT 24 |
Mar 10 12:35:08 PM PDT 24 |
255853053 ps |
| T966 |
/workspace/coverage/default/27.pwrmgr_reset_invalid.1595049124 |
|
|
Mar 10 12:33:58 PM PDT 24 |
Mar 10 12:33:59 PM PDT 24 |
106779404 ps |
| T967 |
/workspace/coverage/default/16.pwrmgr_smoke.3505437140 |
|
|
Mar 10 12:33:26 PM PDT 24 |
Mar 10 12:33:27 PM PDT 24 |
40814159 ps |
| T968 |
/workspace/coverage/default/37.pwrmgr_global_esc.1295215279 |
|
|
Mar 10 12:34:37 PM PDT 24 |
Mar 10 12:34:39 PM PDT 24 |
34508083 ps |
| T969 |
/workspace/coverage/default/8.pwrmgr_aborted_low_power.1234527264 |
|
|
Mar 10 12:32:43 PM PDT 24 |
Mar 10 12:32:43 PM PDT 24 |
24758514 ps |
| T970 |
/workspace/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.1351115736 |
|
|
Mar 10 12:33:12 PM PDT 24 |
Mar 10 12:33:14 PM PDT 24 |
60798682 ps |
| T971 |
/workspace/coverage/default/46.pwrmgr_sec_cm_rstmgr_intersig_mubi.106134674 |
|
|
Mar 10 12:35:03 PM PDT 24 |
Mar 10 12:35:06 PM PDT 24 |
74146427 ps |
| T972 |
/workspace/coverage/default/29.pwrmgr_glitch.1974148595 |
|
|
Mar 10 12:34:08 PM PDT 24 |
Mar 10 12:34:08 PM PDT 24 |
65700502 ps |
| T973 |
/workspace/coverage/default/31.pwrmgr_lowpower_invalid.3980820855 |
|
|
Mar 10 12:36:56 PM PDT 24 |
Mar 10 12:36:57 PM PDT 24 |
56194808 ps |
| T974 |
/workspace/coverage/default/22.pwrmgr_lowpower_invalid.3278074036 |
|
|
Mar 10 12:33:45 PM PDT 24 |
Mar 10 12:33:46 PM PDT 24 |
67057531 ps |
| T975 |
/workspace/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.2442539747 |
|
|
Mar 10 12:34:10 PM PDT 24 |
Mar 10 12:34:11 PM PDT 24 |
104455058 ps |
| T976 |
/workspace/coverage/default/31.pwrmgr_escalation_timeout.3125966485 |
|
|
Mar 10 12:34:37 PM PDT 24 |
Mar 10 12:34:39 PM PDT 24 |
719867360 ps |
| T977 |
/workspace/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.976183941 |
|
|
Mar 10 12:34:10 PM PDT 24 |
Mar 10 12:34:11 PM PDT 24 |
150470543 ps |
| T978 |
/workspace/coverage/default/21.pwrmgr_stress_all.1231862529 |
|
|
Mar 10 12:34:05 PM PDT 24 |
Mar 10 12:34:11 PM PDT 24 |
1237965246 ps |
| T979 |
/workspace/coverage/default/7.pwrmgr_stress_all_with_rand_reset.786069834 |
|
|
Mar 10 12:32:47 PM PDT 24 |
Mar 10 12:33:00 PM PDT 24 |
8103157516 ps |
| T980 |
/workspace/coverage/default/33.pwrmgr_disable_rom_integrity_check.56128946 |
|
|
Mar 10 12:34:35 PM PDT 24 |
Mar 10 12:34:38 PM PDT 24 |
54345477 ps |
| T54 |
/workspace/coverage/cover_reg_top/9.pwrmgr_tl_errors.1736397645 |
|
|
Mar 10 12:30:19 PM PDT 24 |
Mar 10 12:30:21 PM PDT 24 |
113608333 ps |
| T72 |
/workspace/coverage/cover_reg_top/35.pwrmgr_intr_test.3311712050 |
|
|
Mar 10 12:21:26 PM PDT 24 |
Mar 10 12:21:27 PM PDT 24 |
16307085 ps |
| T73 |
/workspace/coverage/cover_reg_top/22.pwrmgr_intr_test.4027749572 |
|
|
Mar 10 12:32:49 PM PDT 24 |
Mar 10 12:32:50 PM PDT 24 |
36798460 ps |
| T55 |
/workspace/coverage/cover_reg_top/5.pwrmgr_tl_errors.4232872036 |
|
|
Mar 10 12:19:05 PM PDT 24 |
Mar 10 12:19:06 PM PDT 24 |
52940963 ps |
| T74 |
/workspace/coverage/cover_reg_top/34.pwrmgr_intr_test.4200187322 |
|
|
Mar 10 12:20:54 PM PDT 24 |
Mar 10 12:20:56 PM PDT 24 |
40883466 ps |
| T63 |
/workspace/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.857495011 |
|
|
Mar 10 12:24:28 PM PDT 24 |
Mar 10 12:24:30 PM PDT 24 |
25789854 ps |
| T156 |
/workspace/coverage/cover_reg_top/16.pwrmgr_intr_test.3562935694 |
|
|
Mar 10 12:20:19 PM PDT 24 |
Mar 10 12:20:21 PM PDT 24 |
75642718 ps |
| T157 |
/workspace/coverage/cover_reg_top/18.pwrmgr_intr_test.2125868132 |
|
|
Mar 10 12:27:12 PM PDT 24 |
Mar 10 12:27:13 PM PDT 24 |
23134800 ps |
| T56 |
/workspace/coverage/cover_reg_top/1.pwrmgr_tl_errors.506322201 |
|
|
Mar 10 12:31:12 PM PDT 24 |
Mar 10 12:31:13 PM PDT 24 |
837166490 ps |
| T75 |
/workspace/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.548048517 |
|
|
Mar 10 12:22:44 PM PDT 24 |
Mar 10 12:22:45 PM PDT 24 |
238561621 ps |
| T59 |
/workspace/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.2822070511 |
|
|
Mar 10 12:20:07 PM PDT 24 |
Mar 10 12:20:09 PM PDT 24 |
233908065 ps |
| T64 |
/workspace/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.358813280 |
|
|
Mar 10 12:29:54 PM PDT 24 |
Mar 10 12:29:56 PM PDT 24 |
48518419 ps |
| T65 |
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.2622026352 |
|
|
Mar 10 12:19:52 PM PDT 24 |
Mar 10 12:19:53 PM PDT 24 |
44966219 ps |
| T118 |
/workspace/coverage/cover_reg_top/18.pwrmgr_csr_rw.9283487 |
|
|
Mar 10 12:24:29 PM PDT 24 |
Mar 10 12:24:30 PM PDT 24 |
23981768 ps |
| T160 |
/workspace/coverage/cover_reg_top/8.pwrmgr_csr_mem_rw_with_rand_reset.1754720793 |
|
|
Mar 10 12:27:17 PM PDT 24 |
Mar 10 12:27:19 PM PDT 24 |
45432162 ps |
| T158 |
/workspace/coverage/cover_reg_top/11.pwrmgr_intr_test.4014131424 |
|
|
Mar 10 12:20:58 PM PDT 24 |
Mar 10 12:20:59 PM PDT 24 |
24658847 ps |
| T159 |
/workspace/coverage/cover_reg_top/33.pwrmgr_intr_test.454831863 |
|
|
Mar 10 12:30:28 PM PDT 24 |
Mar 10 12:30:30 PM PDT 24 |
17501079 ps |
| T78 |
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.2049040194 |
|
|
Mar 10 12:20:29 PM PDT 24 |
Mar 10 12:20:30 PM PDT 24 |
87528243 ps |
| T68 |
/workspace/coverage/cover_reg_top/10.pwrmgr_tl_errors.3362178727 |
|
|
Mar 10 12:19:08 PM PDT 24 |
Mar 10 12:19:11 PM PDT 24 |
578423041 ps |
| T119 |
/workspace/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.2602074705 |
|
|
Mar 10 12:24:06 PM PDT 24 |
Mar 10 12:24:07 PM PDT 24 |
31690774 ps |
| T981 |
/workspace/coverage/cover_reg_top/40.pwrmgr_intr_test.3242175899 |
|
|
Mar 10 12:20:52 PM PDT 24 |
Mar 10 12:20:54 PM PDT 24 |
28705477 ps |
| T120 |
/workspace/coverage/cover_reg_top/13.pwrmgr_csr_rw.855883397 |
|
|
Mar 10 12:20:10 PM PDT 24 |
Mar 10 12:20:11 PM PDT 24 |
48976259 ps |
| T131 |
/workspace/coverage/cover_reg_top/9.pwrmgr_csr_mem_rw_with_rand_reset.894654829 |
|
|
Mar 10 12:27:08 PM PDT 24 |
Mar 10 12:27:09 PM PDT 24 |
81718892 ps |
| T101 |
/workspace/coverage/cover_reg_top/16.pwrmgr_same_csr_outstanding.2828831502 |
|
|
Mar 10 12:20:22 PM PDT 24 |
Mar 10 12:20:23 PM PDT 24 |
21819188 ps |
| T60 |
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.2489090535 |
|
|
Mar 10 12:26:48 PM PDT 24 |
Mar 10 12:26:50 PM PDT 24 |
196086342 ps |
| T102 |
/workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.3177630086 |
|
|
Mar 10 12:27:17 PM PDT 24 |
Mar 10 12:27:19 PM PDT 24 |
26976563 ps |
| T69 |
/workspace/coverage/cover_reg_top/7.pwrmgr_tl_errors.1388078588 |
|
|
Mar 10 12:23:36 PM PDT 24 |
Mar 10 12:23:39 PM PDT 24 |
223018804 ps |
| T122 |
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.2918147727 |
|
|
Mar 10 12:18:38 PM PDT 24 |
Mar 10 12:18:41 PM PDT 24 |
817862881 ps |
| T982 |
/workspace/coverage/cover_reg_top/14.pwrmgr_intr_test.1854705300 |
|
|
Mar 10 12:20:18 PM PDT 24 |
Mar 10 12:20:19 PM PDT 24 |
26869929 ps |
| T983 |
/workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.3520011280 |
|
|
Mar 10 12:23:18 PM PDT 24 |
Mar 10 12:23:19 PM PDT 24 |
42783024 ps |
| T984 |
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_errors.2670321807 |
|
|
Mar 10 12:20:33 PM PDT 24 |
Mar 10 12:20:35 PM PDT 24 |
27435014 ps |
| T61 |
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.2470581397 |
|
|
Mar 10 12:32:50 PM PDT 24 |
Mar 10 12:32:51 PM PDT 24 |
506787445 ps |
| T121 |
/workspace/coverage/cover_reg_top/12.pwrmgr_same_csr_outstanding.3080069941 |
|
|
Mar 10 12:24:43 PM PDT 24 |
Mar 10 12:24:46 PM PDT 24 |
28578700 ps |
| T103 |
/workspace/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.3931167863 |
|
|
Mar 10 12:27:37 PM PDT 24 |
Mar 10 12:27:38 PM PDT 24 |
29487215 ps |
| T985 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.736143936 |
|
|
Mar 10 12:23:35 PM PDT 24 |
Mar 10 12:23:37 PM PDT 24 |
46627318 ps |
| T986 |
/workspace/coverage/cover_reg_top/46.pwrmgr_intr_test.1441046431 |
|
|
Mar 10 12:24:57 PM PDT 24 |
Mar 10 12:24:58 PM PDT 24 |
23417934 ps |
| T987 |
/workspace/coverage/cover_reg_top/28.pwrmgr_intr_test.3261441024 |
|
|
Mar 10 12:20:49 PM PDT 24 |
Mar 10 12:20:51 PM PDT 24 |
23678015 ps |
| T988 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.2453376570 |
|
|
Mar 10 12:30:28 PM PDT 24 |
Mar 10 12:30:30 PM PDT 24 |
58320951 ps |
| T148 |
/workspace/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.505735429 |
|
|
Mar 10 12:21:21 PM PDT 24 |
Mar 10 12:21:22 PM PDT 24 |
243466618 ps |
| T146 |
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.4013031675 |
|
|
Mar 10 12:19:20 PM PDT 24 |
Mar 10 12:19:21 PM PDT 24 |
117099482 ps |
| T989 |
/workspace/coverage/cover_reg_top/7.pwrmgr_intr_test.2689214446 |
|
|
Mar 10 12:21:00 PM PDT 24 |
Mar 10 12:21:01 PM PDT 24 |
18630694 ps |
| T149 |
/workspace/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.1740106371 |
|
|
Mar 10 12:22:28 PM PDT 24 |
Mar 10 12:22:29 PM PDT 24 |
142480595 ps |
| T990 |
/workspace/coverage/cover_reg_top/39.pwrmgr_intr_test.583347694 |
|
|
Mar 10 12:20:54 PM PDT 24 |
Mar 10 12:20:56 PM PDT 24 |
37925792 ps |
| T991 |
/workspace/coverage/cover_reg_top/31.pwrmgr_intr_test.3943743093 |
|
|
Mar 10 12:20:54 PM PDT 24 |
Mar 10 12:20:56 PM PDT 24 |
23831321 ps |
| T992 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.920640713 |
|
|
Mar 10 12:23:19 PM PDT 24 |
Mar 10 12:23:21 PM PDT 24 |
80807730 ps |
| T104 |
/workspace/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.915568592 |
|
|
Mar 10 12:20:18 PM PDT 24 |
Mar 10 12:20:19 PM PDT 24 |
162523024 ps |
| T105 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.900138692 |
|
|
Mar 10 12:26:40 PM PDT 24 |
Mar 10 12:26:43 PM PDT 24 |
922853865 ps |
| T993 |
/workspace/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.1349324655 |
|
|
Mar 10 12:20:12 PM PDT 24 |
Mar 10 12:20:13 PM PDT 24 |
64448966 ps |
| T106 |
/workspace/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.2525173141 |
|
|
Mar 10 12:29:21 PM PDT 24 |
Mar 10 12:29:23 PM PDT 24 |
26888489 ps |
| T994 |
/workspace/coverage/cover_reg_top/47.pwrmgr_intr_test.690643418 |
|
|
Mar 10 12:20:48 PM PDT 24 |
Mar 10 12:20:50 PM PDT 24 |
20342229 ps |
| T995 |
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.64493218 |
|
|
Mar 10 12:33:49 PM PDT 24 |
Mar 10 12:33:51 PM PDT 24 |
28907998 ps |
| T996 |
/workspace/coverage/cover_reg_top/37.pwrmgr_intr_test.138571216 |
|
|
Mar 10 12:33:05 PM PDT 24 |
Mar 10 12:33:06 PM PDT 24 |
60088612 ps |
| T997 |
/workspace/coverage/cover_reg_top/36.pwrmgr_intr_test.740284685 |
|
|
Mar 10 12:23:29 PM PDT 24 |
Mar 10 12:23:30 PM PDT 24 |
35401578 ps |
| T998 |
/workspace/coverage/cover_reg_top/17.pwrmgr_tl_errors.106923901 |
|
|
Mar 10 12:33:58 PM PDT 24 |
Mar 10 12:34:00 PM PDT 24 |
46135675 ps |
| T107 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.2660293536 |
|
|
Mar 10 12:23:44 PM PDT 24 |
Mar 10 12:23:47 PM PDT 24 |
31009103 ps |
| T999 |
/workspace/coverage/cover_reg_top/21.pwrmgr_intr_test.1141394957 |
|
|
Mar 10 12:20:40 PM PDT 24 |
Mar 10 12:20:41 PM PDT 24 |
32104904 ps |
| T1000 |
/workspace/coverage/cover_reg_top/3.pwrmgr_tl_errors.2473934179 |
|
|
Mar 10 12:27:04 PM PDT 24 |
Mar 10 12:27:06 PM PDT 24 |
647647137 ps |
| T1001 |
/workspace/coverage/cover_reg_top/17.pwrmgr_csr_mem_rw_with_rand_reset.3464226375 |
|
|
Mar 10 12:20:41 PM PDT 24 |
Mar 10 12:20:42 PM PDT 24 |
77088739 ps |
| T108 |
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_rw.3799601534 |
|
|
Mar 10 12:19:24 PM PDT 24 |
Mar 10 12:19:26 PM PDT 24 |
32130421 ps |
| T80 |
/workspace/coverage/cover_reg_top/16.pwrmgr_tl_intg_err.2006479112 |
|
|
Mar 10 12:33:06 PM PDT 24 |
Mar 10 12:33:08 PM PDT 24 |
205857989 ps |
| T1002 |
/workspace/coverage/cover_reg_top/44.pwrmgr_intr_test.207943858 |
|
|
Mar 10 12:24:57 PM PDT 24 |
Mar 10 12:24:58 PM PDT 24 |
19558116 ps |
| T1003 |
/workspace/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.1247033205 |
|
|
Mar 10 12:23:35 PM PDT 24 |
Mar 10 12:23:36 PM PDT 24 |
113908791 ps |
| T1004 |
/workspace/coverage/cover_reg_top/15.pwrmgr_intr_test.683650026 |
|
|
Mar 10 12:24:06 PM PDT 24 |
Mar 10 12:24:07 PM PDT 24 |
72056397 ps |
| T1005 |
/workspace/coverage/cover_reg_top/45.pwrmgr_intr_test.2677070670 |
|
|
Mar 10 12:24:30 PM PDT 24 |
Mar 10 12:24:30 PM PDT 24 |
19236267 ps |
| T109 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.3667381366 |
|
|
Mar 10 12:20:47 PM PDT 24 |
Mar 10 12:20:49 PM PDT 24 |
29087438 ps |
| T1006 |
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_errors.24432110 |
|
|
Mar 10 12:24:30 PM PDT 24 |
Mar 10 12:24:31 PM PDT 24 |
27698634 ps |
| T1007 |
/workspace/coverage/cover_reg_top/12.pwrmgr_tl_errors.3573956581 |
|
|
Mar 10 12:20:04 PM PDT 24 |
Mar 10 12:20:06 PM PDT 24 |
152466520 ps |
| T1008 |
/workspace/coverage/cover_reg_top/30.pwrmgr_intr_test.157510209 |
|
|
Mar 10 12:21:32 PM PDT 24 |
Mar 10 12:21:32 PM PDT 24 |
49783102 ps |
| T1009 |
/workspace/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.112614097 |
|
|
Mar 10 12:18:49 PM PDT 24 |
Mar 10 12:18:50 PM PDT 24 |
154493274 ps |
| T1010 |
/workspace/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.1924307778 |
|
|
Mar 10 12:27:06 PM PDT 24 |
Mar 10 12:27:07 PM PDT 24 |
83591021 ps |
| T1011 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.2944561723 |
|
|
Mar 10 12:29:21 PM PDT 24 |
Mar 10 12:29:23 PM PDT 24 |
57195717 ps |
| T1012 |
/workspace/coverage/cover_reg_top/6.pwrmgr_intr_test.2643727850 |
|
|
Mar 10 12:27:05 PM PDT 24 |
Mar 10 12:27:06 PM PDT 24 |
159943038 ps |