Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.92 98.23 96.58 99.44 96.00 96.37 100.00 98.85


Total test records in report: 1110
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T72 /workspace/coverage/default/3.pwrmgr_stress_all_with_rand_reset.798606899 Apr 28 02:57:24 PM PDT 24 Apr 28 02:57:38 PM PDT 24 5645506063 ps
T811 /workspace/coverage/default/27.pwrmgr_wakeup.3359514802 Apr 28 02:58:35 PM PDT 24 Apr 28 02:58:37 PM PDT 24 26201812 ps
T812 /workspace/coverage/default/18.pwrmgr_stress_all.3112980049 Apr 28 02:58:15 PM PDT 24 Apr 28 02:58:22 PM PDT 24 2602494030 ps
T813 /workspace/coverage/default/42.pwrmgr_wakeup.3652675934 Apr 28 02:59:21 PM PDT 24 Apr 28 02:59:24 PM PDT 24 258102966 ps
T814 /workspace/coverage/default/42.pwrmgr_reset.3403901225 Apr 28 02:59:22 PM PDT 24 Apr 28 02:59:25 PM PDT 24 68051690 ps
T815 /workspace/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.1007486956 Apr 28 02:59:32 PM PDT 24 Apr 28 02:59:34 PM PDT 24 29037151 ps
T816 /workspace/coverage/default/48.pwrmgr_lowpower_invalid.3411087301 Apr 28 02:59:36 PM PDT 24 Apr 28 02:59:40 PM PDT 24 46135427 ps
T817 /workspace/coverage/default/24.pwrmgr_global_esc.2615076217 Apr 28 02:58:25 PM PDT 24 Apr 28 02:58:26 PM PDT 24 47971565 ps
T818 /workspace/coverage/default/1.pwrmgr_wakeup_reset.308512580 Apr 28 02:56:56 PM PDT 24 Apr 28 02:56:57 PM PDT 24 85354893 ps
T819 /workspace/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2679870328 Apr 28 02:58:42 PM PDT 24 Apr 28 02:58:44 PM PDT 24 1131260817 ps
T820 /workspace/coverage/default/37.pwrmgr_wakeup.2258661525 Apr 28 02:59:09 PM PDT 24 Apr 28 02:59:10 PM PDT 24 52026779 ps
T821 /workspace/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.124769991 Apr 28 02:58:36 PM PDT 24 Apr 28 02:58:38 PM PDT 24 103327721 ps
T822 /workspace/coverage/default/16.pwrmgr_wakeup_reset.927160374 Apr 28 02:58:13 PM PDT 24 Apr 28 02:58:16 PM PDT 24 451798979 ps
T823 /workspace/coverage/default/15.pwrmgr_wakeup_reset.4174916300 Apr 28 02:57:59 PM PDT 24 Apr 28 02:58:01 PM PDT 24 50263958 ps
T824 /workspace/coverage/default/41.pwrmgr_reset.2616681844 Apr 28 02:59:19 PM PDT 24 Apr 28 02:59:21 PM PDT 24 37053746 ps
T825 /workspace/coverage/default/40.pwrmgr_wakeup.3038254279 Apr 28 02:59:18 PM PDT 24 Apr 28 02:59:20 PM PDT 24 119255879 ps
T826 /workspace/coverage/default/6.pwrmgr_glitch.1205702492 Apr 28 02:57:24 PM PDT 24 Apr 28 02:57:26 PM PDT 24 95748219 ps
T827 /workspace/coverage/default/31.pwrmgr_reset_invalid.3670495934 Apr 28 02:58:55 PM PDT 24 Apr 28 02:58:57 PM PDT 24 127727126 ps
T828 /workspace/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.433895841 Apr 28 02:58:26 PM PDT 24 Apr 28 02:58:27 PM PDT 24 37979110 ps
T829 /workspace/coverage/default/9.pwrmgr_escalation_timeout.3969465880 Apr 28 02:57:30 PM PDT 24 Apr 28 02:57:34 PM PDT 24 165505474 ps
T830 /workspace/coverage/default/38.pwrmgr_escalation_timeout.2627054127 Apr 28 02:59:11 PM PDT 24 Apr 28 02:59:13 PM PDT 24 569817429 ps
T831 /workspace/coverage/default/31.pwrmgr_aborted_low_power.2361658249 Apr 28 02:58:51 PM PDT 24 Apr 28 02:58:53 PM PDT 24 67383197 ps
T832 /workspace/coverage/default/49.pwrmgr_aborted_low_power.3729911287 Apr 28 02:59:37 PM PDT 24 Apr 28 02:59:41 PM PDT 24 25327077 ps
T833 /workspace/coverage/default/27.pwrmgr_lowpower_invalid.1968915417 Apr 28 02:58:41 PM PDT 24 Apr 28 02:58:42 PM PDT 24 43439943 ps
T834 /workspace/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.2915353233 Apr 28 02:57:44 PM PDT 24 Apr 28 02:57:45 PM PDT 24 88342264 ps
T835 /workspace/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.1572363320 Apr 28 02:57:11 PM PDT 24 Apr 28 02:57:12 PM PDT 24 46304319 ps
T836 /workspace/coverage/default/1.pwrmgr_stress_all_with_rand_reset.891891540 Apr 28 02:57:00 PM PDT 24 Apr 28 02:57:27 PM PDT 24 8179338636 ps
T837 /workspace/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1923700198 Apr 28 02:57:28 PM PDT 24 Apr 28 02:57:32 PM PDT 24 1529671292 ps
T838 /workspace/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.1418837118 Apr 28 02:58:15 PM PDT 24 Apr 28 02:58:18 PM PDT 24 95985322 ps
T839 /workspace/coverage/default/1.pwrmgr_reset_invalid.4111710519 Apr 28 02:56:55 PM PDT 24 Apr 28 02:56:57 PM PDT 24 107857800 ps
T840 /workspace/coverage/default/7.pwrmgr_smoke.856256788 Apr 28 02:57:24 PM PDT 24 Apr 28 02:57:27 PM PDT 24 33959802 ps
T841 /workspace/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.3214630601 Apr 28 02:59:15 PM PDT 24 Apr 28 02:59:17 PM PDT 24 44089892 ps
T842 /workspace/coverage/default/12.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.801547046 Apr 28 02:57:43 PM PDT 24 Apr 28 02:57:46 PM PDT 24 819591053 ps
T843 /workspace/coverage/default/17.pwrmgr_global_esc.749560018 Apr 28 02:58:07 PM PDT 24 Apr 28 02:58:09 PM PDT 24 64300273 ps
T844 /workspace/coverage/default/2.pwrmgr_lowpower_wakeup_race.1566803618 Apr 28 02:57:01 PM PDT 24 Apr 28 02:57:03 PM PDT 24 501644501 ps
T845 /workspace/coverage/default/35.pwrmgr_stress_all_with_rand_reset.4038931191 Apr 28 02:59:03 PM PDT 24 Apr 28 02:59:17 PM PDT 24 15367452131 ps
T846 /workspace/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4256553686 Apr 28 02:59:19 PM PDT 24 Apr 28 02:59:23 PM PDT 24 1029736368 ps
T847 /workspace/coverage/default/12.pwrmgr_global_esc.456191808 Apr 28 02:57:44 PM PDT 24 Apr 28 02:57:45 PM PDT 24 35252728 ps
T848 /workspace/coverage/default/19.pwrmgr_smoke.976634955 Apr 28 02:58:07 PM PDT 24 Apr 28 02:58:09 PM PDT 24 31752134 ps
T849 /workspace/coverage/default/6.pwrmgr_lowpower_wakeup_race.1747289906 Apr 28 02:57:25 PM PDT 24 Apr 28 02:57:28 PM PDT 24 308140682 ps
T850 /workspace/coverage/default/45.pwrmgr_escalation_timeout.3978126508 Apr 28 02:59:35 PM PDT 24 Apr 28 02:59:39 PM PDT 24 605510037 ps
T851 /workspace/coverage/default/9.pwrmgr_lowpower_wakeup_race.3882261042 Apr 28 02:57:28 PM PDT 24 Apr 28 02:57:31 PM PDT 24 228044152 ps
T852 /workspace/coverage/default/3.pwrmgr_aborted_low_power.785573565 Apr 28 02:57:12 PM PDT 24 Apr 28 02:57:14 PM PDT 24 23710858 ps
T853 /workspace/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.2126790602 Apr 28 02:58:50 PM PDT 24 Apr 28 02:58:52 PM PDT 24 28549328 ps
T854 /workspace/coverage/default/41.pwrmgr_stress_all.2904272114 Apr 28 02:59:22 PM PDT 24 Apr 28 02:59:27 PM PDT 24 866471563 ps
T855 /workspace/coverage/default/47.pwrmgr_stress_all.3219020595 Apr 28 02:59:36 PM PDT 24 Apr 28 02:59:42 PM PDT 24 767042755 ps
T856 /workspace/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4281279798 Apr 28 02:58:55 PM PDT 24 Apr 28 02:59:00 PM PDT 24 897427063 ps
T857 /workspace/coverage/default/6.pwrmgr_esc_clk_rst_malfunc.3916438726 Apr 28 02:57:28 PM PDT 24 Apr 28 02:57:30 PM PDT 24 39685775 ps
T858 /workspace/coverage/default/13.pwrmgr_stress_all.1108818648 Apr 28 02:57:54 PM PDT 24 Apr 28 02:57:56 PM PDT 24 113914772 ps
T859 /workspace/coverage/default/21.pwrmgr_glitch.3269958729 Apr 28 02:58:11 PM PDT 24 Apr 28 02:58:13 PM PDT 24 80427586 ps
T860 /workspace/coverage/default/20.pwrmgr_glitch.2845498107 Apr 28 02:58:15 PM PDT 24 Apr 28 02:58:19 PM PDT 24 60091086 ps
T861 /workspace/coverage/default/24.pwrmgr_reset_invalid.3814206308 Apr 28 02:58:31 PM PDT 24 Apr 28 02:58:34 PM PDT 24 148881228 ps
T862 /workspace/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.2988369800 Apr 28 02:57:37 PM PDT 24 Apr 28 02:57:39 PM PDT 24 424634143 ps
T863 /workspace/coverage/default/31.pwrmgr_disable_rom_integrity_check.3715683146 Apr 28 02:58:52 PM PDT 24 Apr 28 02:58:54 PM PDT 24 56298767 ps
T864 /workspace/coverage/default/21.pwrmgr_wakeup_reset.3935088869 Apr 28 02:58:12 PM PDT 24 Apr 28 02:58:15 PM PDT 24 215491551 ps
T865 /workspace/coverage/default/27.pwrmgr_lowpower_wakeup_race.3499484703 Apr 28 02:58:36 PM PDT 24 Apr 28 02:58:38 PM PDT 24 29929794 ps
T866 /workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.3766221565 Apr 28 02:59:34 PM PDT 24 Apr 28 02:59:37 PM PDT 24 33114817 ps
T867 /workspace/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1462253852 Apr 28 02:56:55 PM PDT 24 Apr 28 02:56:57 PM PDT 24 1321923107 ps
T868 /workspace/coverage/default/42.pwrmgr_disable_rom_integrity_check.566662197 Apr 28 02:59:29 PM PDT 24 Apr 28 02:59:30 PM PDT 24 65769247 ps
T869 /workspace/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.3936606878 Apr 28 02:58:39 PM PDT 24 Apr 28 02:58:41 PM PDT 24 318235777 ps
T870 /workspace/coverage/default/23.pwrmgr_global_esc.2089132167 Apr 28 02:58:22 PM PDT 24 Apr 28 02:58:23 PM PDT 24 76225219 ps
T871 /workspace/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.1025874813 Apr 28 02:59:00 PM PDT 24 Apr 28 02:59:03 PM PDT 24 313393887 ps
T872 /workspace/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2162317117 Apr 28 02:58:55 PM PDT 24 Apr 28 02:59:00 PM PDT 24 792327274 ps
T873 /workspace/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4029571258 Apr 28 02:58:48 PM PDT 24 Apr 28 02:58:52 PM PDT 24 1002286910 ps
T874 /workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.884696991 Apr 28 02:57:17 PM PDT 24 Apr 28 02:57:20 PM PDT 24 1126460002 ps
T875 /workspace/coverage/default/33.pwrmgr_smoke.218935972 Apr 28 02:58:56 PM PDT 24 Apr 28 02:58:59 PM PDT 24 43685835 ps
T876 /workspace/coverage/default/7.pwrmgr_lowpower_wakeup_race.1827934338 Apr 28 02:57:24 PM PDT 24 Apr 28 02:57:25 PM PDT 24 85746484 ps
T877 /workspace/coverage/default/40.pwrmgr_wakeup_reset.3099054038 Apr 28 02:59:19 PM PDT 24 Apr 28 02:59:21 PM PDT 24 206603068 ps
T878 /workspace/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.657965095 Apr 28 02:58:03 PM PDT 24 Apr 28 02:58:05 PM PDT 24 65714582 ps
T879 /workspace/coverage/default/29.pwrmgr_smoke.3334833597 Apr 28 02:58:52 PM PDT 24 Apr 28 02:58:54 PM PDT 24 37864234 ps
T880 /workspace/coverage/default/3.pwrmgr_sec_cm_ctrl_config_regwen.1672953528 Apr 28 02:57:20 PM PDT 24 Apr 28 02:57:22 PM PDT 24 490369219 ps
T881 /workspace/coverage/default/2.pwrmgr_glitch.1403037847 Apr 28 02:57:05 PM PDT 24 Apr 28 02:57:07 PM PDT 24 79533070 ps
T882 /workspace/coverage/default/17.pwrmgr_reset_invalid.3323559140 Apr 28 02:58:09 PM PDT 24 Apr 28 02:58:11 PM PDT 24 191772322 ps
T883 /workspace/coverage/default/12.pwrmgr_escalation_timeout.3135701556 Apr 28 02:57:51 PM PDT 24 Apr 28 02:57:53 PM PDT 24 317211477 ps
T884 /workspace/coverage/default/41.pwrmgr_wakeup.4043777022 Apr 28 02:59:17 PM PDT 24 Apr 28 02:59:18 PM PDT 24 189918019 ps
T885 /workspace/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.52597362 Apr 28 02:58:36 PM PDT 24 Apr 28 02:58:39 PM PDT 24 1486740374 ps
T886 /workspace/coverage/default/7.pwrmgr_disable_rom_integrity_check.626903080 Apr 28 02:57:28 PM PDT 24 Apr 28 02:57:32 PM PDT 24 100399809 ps
T887 /workspace/coverage/default/23.pwrmgr_aborted_low_power.3531114163 Apr 28 02:58:19 PM PDT 24 Apr 28 02:58:20 PM PDT 24 88548201 ps
T888 /workspace/coverage/default/33.pwrmgr_lowpower_wakeup_race.506560870 Apr 28 02:58:56 PM PDT 24 Apr 28 02:58:58 PM PDT 24 170933341 ps
T889 /workspace/coverage/default/4.pwrmgr_reset_invalid.2489532028 Apr 28 02:57:19 PM PDT 24 Apr 28 02:57:21 PM PDT 24 148006335 ps
T890 /workspace/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.136658233 Apr 28 02:59:09 PM PDT 24 Apr 28 02:59:11 PM PDT 24 41478494 ps
T891 /workspace/coverage/default/20.pwrmgr_reset_invalid.2565939554 Apr 28 02:58:10 PM PDT 24 Apr 28 02:58:13 PM PDT 24 107714573 ps
T892 /workspace/coverage/default/35.pwrmgr_lowpower_wakeup_race.3074723326 Apr 28 02:59:03 PM PDT 24 Apr 28 02:59:06 PM PDT 24 365610761 ps
T893 /workspace/coverage/default/39.pwrmgr_wakeup.44237921 Apr 28 02:59:10 PM PDT 24 Apr 28 02:59:12 PM PDT 24 399124737 ps
T894 /workspace/coverage/default/16.pwrmgr_lowpower_wakeup_race.4047077863 Apr 28 02:58:08 PM PDT 24 Apr 28 02:58:10 PM PDT 24 560125006 ps
T895 /workspace/coverage/default/5.pwrmgr_lowpower_wakeup_race.4176541961 Apr 28 02:57:26 PM PDT 24 Apr 28 02:57:29 PM PDT 24 286881378 ps
T896 /workspace/coverage/default/19.pwrmgr_escalation_timeout.2039747492 Apr 28 02:58:10 PM PDT 24 Apr 28 02:58:13 PM PDT 24 165784180 ps
T897 /workspace/coverage/default/35.pwrmgr_reset_invalid.339950987 Apr 28 02:59:02 PM PDT 24 Apr 28 02:59:05 PM PDT 24 107819690 ps
T898 /workspace/coverage/default/36.pwrmgr_global_esc.1027736458 Apr 28 02:59:04 PM PDT 24 Apr 28 02:59:07 PM PDT 24 62535777 ps
T899 /workspace/coverage/default/8.pwrmgr_stress_all.2516525650 Apr 28 02:57:29 PM PDT 24 Apr 28 02:57:36 PM PDT 24 1312748812 ps
T900 /workspace/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.2564571113 Apr 28 02:58:23 PM PDT 24 Apr 28 02:58:24 PM PDT 24 42442186 ps
T162 /workspace/coverage/default/35.pwrmgr_disable_rom_integrity_check.4131355051 Apr 28 02:59:02 PM PDT 24 Apr 28 02:59:04 PM PDT 24 67424370 ps
T901 /workspace/coverage/default/47.pwrmgr_smoke.56028332 Apr 28 02:59:33 PM PDT 24 Apr 28 02:59:35 PM PDT 24 33055021 ps
T902 /workspace/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1585400548 Apr 28 02:59:04 PM PDT 24 Apr 28 02:59:08 PM PDT 24 979124410 ps
T903 /workspace/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.3149681066 Apr 28 02:59:00 PM PDT 24 Apr 28 02:59:03 PM PDT 24 83279457 ps
T904 /workspace/coverage/default/48.pwrmgr_lowpower_wakeup_race.4151129913 Apr 28 02:59:37 PM PDT 24 Apr 28 02:59:41 PM PDT 24 217066000 ps
T905 /workspace/coverage/default/11.pwrmgr_lowpower_wakeup_race.4059536316 Apr 28 02:57:33 PM PDT 24 Apr 28 02:57:36 PM PDT 24 239730954 ps
T906 /workspace/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.1789696384 Apr 28 02:57:25 PM PDT 24 Apr 28 02:57:28 PM PDT 24 85050503 ps
T907 /workspace/coverage/default/33.pwrmgr_global_esc.3087607753 Apr 28 02:59:03 PM PDT 24 Apr 28 02:59:05 PM PDT 24 58362283 ps
T908 /workspace/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2621084389 Apr 28 02:57:24 PM PDT 24 Apr 28 02:57:28 PM PDT 24 703615602 ps
T909 /workspace/coverage/default/4.pwrmgr_sec_cm_ctrl_config_regwen.508987258 Apr 28 02:57:17 PM PDT 24 Apr 28 02:57:18 PM PDT 24 92954043 ps
T910 /workspace/coverage/default/3.pwrmgr_stress_all.1821871921 Apr 28 02:57:17 PM PDT 24 Apr 28 02:57:20 PM PDT 24 282923247 ps
T911 /workspace/coverage/default/42.pwrmgr_smoke.4043662719 Apr 28 02:59:20 PM PDT 24 Apr 28 02:59:23 PM PDT 24 54410438 ps
T912 /workspace/coverage/default/29.pwrmgr_disable_rom_integrity_check.3933137540 Apr 28 02:58:47 PM PDT 24 Apr 28 02:58:49 PM PDT 24 49677588 ps
T913 /workspace/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.888253307 Apr 28 02:59:04 PM PDT 24 Apr 28 02:59:09 PM PDT 24 821033557 ps
T139 /workspace/coverage/default/22.pwrmgr_stress_all_with_rand_reset.1494096343 Apr 28 02:58:16 PM PDT 24 Apr 28 02:58:29 PM PDT 24 6640416327 ps
T914 /workspace/coverage/default/33.pwrmgr_reset.1588934407 Apr 28 02:58:54 PM PDT 24 Apr 28 02:58:56 PM PDT 24 76077479 ps
T915 /workspace/coverage/default/28.pwrmgr_lowpower_invalid.3384204597 Apr 28 02:58:52 PM PDT 24 Apr 28 02:58:54 PM PDT 24 55884116 ps
T916 /workspace/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.584125245 Apr 28 02:59:30 PM PDT 24 Apr 28 02:59:32 PM PDT 24 411744628 ps
T917 /workspace/coverage/default/17.pwrmgr_disable_rom_integrity_check.2826977816 Apr 28 02:58:09 PM PDT 24 Apr 28 02:58:12 PM PDT 24 46521027 ps
T918 /workspace/coverage/default/44.pwrmgr_disable_rom_integrity_check.1946371831 Apr 28 02:59:33 PM PDT 24 Apr 28 02:59:36 PM PDT 24 52628828 ps
T919 /workspace/coverage/default/41.pwrmgr_aborted_low_power.986733249 Apr 28 02:59:21 PM PDT 24 Apr 28 02:59:24 PM PDT 24 27074629 ps
T920 /workspace/coverage/default/16.pwrmgr_stress_all_with_rand_reset.3096522334 Apr 28 02:58:07 PM PDT 24 Apr 28 02:58:35 PM PDT 24 8764234656 ps
T921 /workspace/coverage/default/48.pwrmgr_reset_invalid.459862310 Apr 28 02:59:36 PM PDT 24 Apr 28 02:59:40 PM PDT 24 99728625 ps
T922 /workspace/coverage/default/5.pwrmgr_reset.1196336844 Apr 28 02:57:23 PM PDT 24 Apr 28 02:57:25 PM PDT 24 52787591 ps
T923 /workspace/coverage/default/48.pwrmgr_glitch.3869928590 Apr 28 02:59:39 PM PDT 24 Apr 28 02:59:43 PM PDT 24 72382394 ps
T924 /workspace/coverage/default/30.pwrmgr_disable_rom_integrity_check.3085771154 Apr 28 02:58:51 PM PDT 24 Apr 28 02:58:52 PM PDT 24 55353950 ps
T925 /workspace/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.3946803146 Apr 28 02:59:35 PM PDT 24 Apr 28 02:59:39 PM PDT 24 215866775 ps
T926 /workspace/coverage/default/22.pwrmgr_lowpower_invalid.3885504588 Apr 28 02:58:25 PM PDT 24 Apr 28 02:58:27 PM PDT 24 41238927 ps
T927 /workspace/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.3362372335 Apr 28 02:57:23 PM PDT 24 Apr 28 02:57:24 PM PDT 24 84319490 ps
T928 /workspace/coverage/default/39.pwrmgr_reset.1692009134 Apr 28 02:59:09 PM PDT 24 Apr 28 02:59:11 PM PDT 24 123920090 ps
T929 /workspace/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.2156835572 Apr 28 02:59:20 PM PDT 24 Apr 28 02:59:23 PM PDT 24 69474163 ps
T930 /workspace/coverage/default/43.pwrmgr_stress_all_with_rand_reset.997259706 Apr 28 02:59:35 PM PDT 24 Apr 28 03:00:00 PM PDT 24 7046321213 ps
T931 /workspace/coverage/default/17.pwrmgr_lowpower_invalid.876462248 Apr 28 02:58:06 PM PDT 24 Apr 28 02:58:07 PM PDT 24 43199774 ps
T932 /workspace/coverage/default/38.pwrmgr_wakeup_reset.1721717786 Apr 28 02:59:20 PM PDT 24 Apr 28 02:59:23 PM PDT 24 204924083 ps
T933 /workspace/coverage/default/3.pwrmgr_wakeup_reset.1245241314 Apr 28 02:57:14 PM PDT 24 Apr 28 02:57:15 PM PDT 24 146545636 ps
T934 /workspace/coverage/default/37.pwrmgr_stress_all.1924898625 Apr 28 02:59:09 PM PDT 24 Apr 28 02:59:10 PM PDT 24 490428383 ps
T935 /workspace/coverage/default/31.pwrmgr_glitch.3625848281 Apr 28 02:58:49 PM PDT 24 Apr 28 02:58:51 PM PDT 24 38655990 ps
T936 /workspace/coverage/default/25.pwrmgr_reset_invalid.1509777894 Apr 28 02:58:29 PM PDT 24 Apr 28 02:58:30 PM PDT 24 155582771 ps
T937 /workspace/coverage/default/8.pwrmgr_wakeup.3878590775 Apr 28 02:57:29 PM PDT 24 Apr 28 02:57:33 PM PDT 24 65844825 ps
T938 /workspace/coverage/default/21.pwrmgr_stress_all.3043328387 Apr 28 02:58:16 PM PDT 24 Apr 28 02:58:23 PM PDT 24 1639226199 ps
T939 /workspace/coverage/default/48.pwrmgr_global_esc.3569068137 Apr 28 02:59:39 PM PDT 24 Apr 28 02:59:43 PM PDT 24 39513325 ps
T940 /workspace/coverage/default/19.pwrmgr_lowpower_invalid.278486740 Apr 28 02:58:10 PM PDT 24 Apr 28 02:58:13 PM PDT 24 86649670 ps
T941 /workspace/coverage/default/11.pwrmgr_escalation_timeout.326700949 Apr 28 02:57:39 PM PDT 24 Apr 28 02:57:41 PM PDT 24 168774911 ps
T942 /workspace/coverage/default/0.pwrmgr_wakeup.4128235294 Apr 28 02:56:50 PM PDT 24 Apr 28 02:56:51 PM PDT 24 291283746 ps
T943 /workspace/coverage/default/16.pwrmgr_reset_invalid.78200758 Apr 28 02:58:07 PM PDT 24 Apr 28 02:58:09 PM PDT 24 220308780 ps
T944 /workspace/coverage/default/15.pwrmgr_reset_invalid.602650074 Apr 28 02:57:59 PM PDT 24 Apr 28 02:58:01 PM PDT 24 101309711 ps
T945 /workspace/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2202600773 Apr 28 02:59:36 PM PDT 24 Apr 28 02:59:42 PM PDT 24 1272108764 ps
T946 /workspace/coverage/default/16.pwrmgr_aborted_low_power.4107520822 Apr 28 02:58:00 PM PDT 24 Apr 28 02:58:02 PM PDT 24 66728009 ps
T947 /workspace/coverage/default/10.pwrmgr_stress_all_with_rand_reset.1153760475 Apr 28 02:57:34 PM PDT 24 Apr 28 02:57:53 PM PDT 24 5837252334 ps
T948 /workspace/coverage/default/25.pwrmgr_glitch.1314997954 Apr 28 02:58:29 PM PDT 24 Apr 28 02:58:31 PM PDT 24 63574661 ps
T949 /workspace/coverage/default/19.pwrmgr_disable_rom_integrity_check.2824648265 Apr 28 02:58:14 PM PDT 24 Apr 28 02:58:17 PM PDT 24 65576159 ps
T950 /workspace/coverage/default/40.pwrmgr_global_esc.618862046 Apr 28 02:59:17 PM PDT 24 Apr 28 02:59:18 PM PDT 24 119127011 ps
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T961 /workspace/coverage/default/3.pwrmgr_global_esc.2750061788 Apr 28 02:57:15 PM PDT 24 Apr 28 02:57:16 PM PDT 24 43322057 ps
T962 /workspace/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2170412172 Apr 28 02:59:00 PM PDT 24 Apr 28 02:59:04 PM PDT 24 1169464341 ps
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T964 /workspace/coverage/default/18.pwrmgr_disable_rom_integrity_check.3219222327 Apr 28 02:58:11 PM PDT 24 Apr 28 02:58:13 PM PDT 24 144865753 ps
T965 /workspace/coverage/default/34.pwrmgr_global_esc.1018113943 Apr 28 02:58:57 PM PDT 24 Apr 28 02:59:00 PM PDT 24 92785136 ps
T966 /workspace/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.130536794 Apr 28 02:59:30 PM PDT 24 Apr 28 02:59:32 PM PDT 24 1219281751 ps
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T968 /workspace/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.112320649 Apr 28 02:59:09 PM PDT 24 Apr 28 02:59:13 PM PDT 24 894669959 ps
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T973 /workspace/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3810280617 Apr 28 02:59:21 PM PDT 24 Apr 28 02:59:26 PM PDT 24 1316490312 ps
T974 /workspace/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1683149508 Apr 28 02:57:34 PM PDT 24 Apr 28 02:57:39 PM PDT 24 763312829 ps
T975 /workspace/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.3650269959 Apr 28 02:59:04 PM PDT 24 Apr 28 02:59:07 PM PDT 24 66828221 ps
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T981 /workspace/coverage/default/8.pwrmgr_reset_invalid.1823760722 Apr 28 02:57:30 PM PDT 24 Apr 28 02:57:34 PM PDT 24 176775184 ps
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T983 /workspace/coverage/default/36.pwrmgr_disable_rom_integrity_check.2452871391 Apr 28 02:59:03 PM PDT 24 Apr 28 02:59:04 PM PDT 24 68257096 ps
T984 /workspace/coverage/default/46.pwrmgr_reset_invalid.2433318804 Apr 28 02:59:34 PM PDT 24 Apr 28 02:59:38 PM PDT 24 102301653 ps
T985 /workspace/coverage/default/45.pwrmgr_aborted_low_power.2280502772 Apr 28 02:59:33 PM PDT 24 Apr 28 02:59:36 PM PDT 24 33988923 ps
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T1001 /workspace/coverage/default/16.pwrmgr_lowpower_invalid.4291270462 Apr 28 02:58:06 PM PDT 24 Apr 28 02:58:07 PM PDT 24 121965231 ps
T43 /workspace/coverage/cover_reg_top/5.pwrmgr_tl_errors.3247234455 Apr 28 12:50:41 PM PDT 24 Apr 28 12:50:43 PM PDT 24 30430926 ps
T61 /workspace/coverage/cover_reg_top/1.pwrmgr_intr_test.2724219288 Apr 28 12:50:33 PM PDT 24 Apr 28 12:50:34 PM PDT 24 32502286 ps
T62 /workspace/coverage/cover_reg_top/2.pwrmgr_intr_test.3967204437 Apr 28 12:50:37 PM PDT 24 Apr 28 12:50:38 PM PDT 24 18802102 ps
T63 /workspace/coverage/cover_reg_top/19.pwrmgr_intr_test.2986507676 Apr 28 12:51:13 PM PDT 24 Apr 28 12:51:14 PM PDT 24 46523592 ps
T166 /workspace/coverage/cover_reg_top/40.pwrmgr_intr_test.777242631 Apr 28 12:51:13 PM PDT 24 Apr 28 12:51:15 PM PDT 24 73426195 ps
T44 /workspace/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.1197192119 Apr 28 12:51:07 PM PDT 24 Apr 28 12:51:09 PM PDT 24 234758920 ps
T65 /workspace/coverage/cover_reg_top/1.pwrmgr_csr_rw.1178880751 Apr 28 12:50:34 PM PDT 24 Apr 28 12:50:35 PM PDT 24 19764530 ps
T56 /workspace/coverage/cover_reg_top/12.pwrmgr_tl_errors.3952723188 Apr 28 12:50:57 PM PDT 24 Apr 28 12:50:59 PM PDT 24 220090149 ps
T55 /workspace/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.4178381014 Apr 28 12:50:37 PM PDT 24 Apr 28 12:50:38 PM PDT 24 57146966 ps
T59 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.801699731 Apr 28 12:50:37 PM PDT 24 Apr 28 12:50:38 PM PDT 24 38713392 ps
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T46 /workspace/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.1517818120 Apr 28 12:51:14 PM PDT 24 Apr 28 12:51:16 PM PDT 24 118367099 ps
T51 /workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.1762192418 Apr 28 12:50:41 PM PDT 24 Apr 28 12:50:43 PM PDT 24 190637549 ps
T168 /workspace/coverage/cover_reg_top/10.pwrmgr_intr_test.3221723944 Apr 28 12:50:57 PM PDT 24 Apr 28 12:50:58 PM PDT 24 38595996 ps
T1002 /workspace/coverage/cover_reg_top/0.pwrmgr_intr_test.2895628228 Apr 28 12:50:28 PM PDT 24 Apr 28 12:50:29 PM PDT 24 48935957 ps
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T169 /workspace/coverage/cover_reg_top/11.pwrmgr_intr_test.3128090439 Apr 28 12:50:56 PM PDT 24 Apr 28 12:50:57 PM PDT 24 33364839 ps
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T117 /workspace/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.2999463338 Apr 28 12:51:06 PM PDT 24 Apr 28 12:51:08 PM PDT 24 47764893 ps
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T1003 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.1467075667 Apr 28 12:50:40 PM PDT 24 Apr 28 12:50:41 PM PDT 24 19353206 ps
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T118 /workspace/coverage/cover_reg_top/10.pwrmgr_same_csr_outstanding.156333966 Apr 28 12:50:59 PM PDT 24 Apr 28 12:51:00 PM PDT 24 28332199 ps
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T1005 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.2290923131 Apr 28 12:50:42 PM PDT 24 Apr 28 12:50:43 PM PDT 24 28465466 ps
T1006 /workspace/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.2970898558 Apr 28 12:50:58 PM PDT 24 Apr 28 12:50:59 PM PDT 24 61229935 ps
T172 /workspace/coverage/cover_reg_top/15.pwrmgr_csr_rw.1692833630 Apr 28 12:51:05 PM PDT 24 Apr 28 12:51:07 PM PDT 24 18888340 ps
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T70 /workspace/coverage/cover_reg_top/10.pwrmgr_tl_errors.438493232 Apr 28 12:50:55 PM PDT 24 Apr 28 12:50:57 PM PDT 24 115395029 ps
T100 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.422693474 Apr 28 12:50:38 PM PDT 24 Apr 28 12:50:40 PM PDT 24 32318832 ps
T60 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.3577806887 Apr 28 12:50:44 PM PDT 24 Apr 28 12:50:45 PM PDT 24 87516161 ps
T122 /workspace/coverage/cover_reg_top/17.pwrmgr_same_csr_outstanding.3308088978 Apr 28 12:51:05 PM PDT 24 Apr 28 12:51:07 PM PDT 24 39498889 ps
T73 /workspace/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.3937526196 Apr 28 12:51:05 PM PDT 24 Apr 28 12:51:07 PM PDT 24 208335709 ps
T1010 /workspace/coverage/cover_reg_top/15.pwrmgr_csr_mem_rw_with_rand_reset.2008732294 Apr 28 12:51:06 PM PDT 24 Apr 28 12:51:08 PM PDT 24 40834013 ps
T1011 /workspace/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.2014997681 Apr 28 12:50:33 PM PDT 24 Apr 28 12:50:34 PM PDT 24 46398101 ps
T1012 /workspace/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.4117445006 Apr 28 12:50:53 PM PDT 24 Apr 28 12:50:54 PM PDT 24 52173544 ps
T109 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.142227797 Apr 28 12:50:44 PM PDT 24 Apr 28 12:50:46 PM PDT 24 46903737 ps
T1013 /workspace/coverage/cover_reg_top/34.pwrmgr_intr_test.1667140121 Apr 28 12:51:13 PM PDT 24 Apr 28 12:51:15 PM PDT 24 52923606 ps
T57 /workspace/coverage/cover_reg_top/9.pwrmgr_tl_errors.3013333786 Apr 28 12:50:52 PM PDT 24 Apr 28 12:50:54 PM PDT 24 149026967 ps
T101 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.3288813954 Apr 28 12:50:35 PM PDT 24 Apr 28 12:50:36 PM PDT 24 122497406 ps
T58 /workspace/coverage/cover_reg_top/3.pwrmgr_tl_errors.40709137 Apr 28 12:50:40 PM PDT 24 Apr 28 12:50:43 PM PDT 24 121187443 ps
T1014 /workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.3822924672 Apr 28 12:51:09 PM PDT 24 Apr 28 12:51:10 PM PDT 24 37806603 ps
T1015 /workspace/coverage/cover_reg_top/9.pwrmgr_intr_test.453626128 Apr 28 12:50:59 PM PDT 24 Apr 28 12:51:00 PM PDT 24 17295036 ps
T1016 /workspace/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.2850085155 Apr 28 12:50:57 PM PDT 24 Apr 28 12:50:58 PM PDT 24 87693813 ps
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