Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.44 96.00 96.37 100.00 99.02


Total test records in report: 1119
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T809 /workspace/coverage/default/12.pwrmgr_sec_cm_ctrl_config_regwen.658881510 Apr 30 02:13:14 PM PDT 24 Apr 30 02:13:15 PM PDT 24 363228692 ps
T810 /workspace/coverage/default/11.pwrmgr_disable_rom_integrity_check.444637656 Apr 30 02:13:18 PM PDT 24 Apr 30 02:13:20 PM PDT 24 64936614 ps
T811 /workspace/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.3778025503 Apr 30 02:14:51 PM PDT 24 Apr 30 02:14:53 PM PDT 24 208028083 ps
T812 /workspace/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.909404051 Apr 30 02:14:42 PM PDT 24 Apr 30 02:14:44 PM PDT 24 116942003 ps
T813 /workspace/coverage/default/45.pwrmgr_stress_all.830897349 Apr 30 02:15:15 PM PDT 24 Apr 30 02:15:16 PM PDT 24 94119974 ps
T814 /workspace/coverage/default/2.pwrmgr_reset.1199715799 Apr 30 02:12:51 PM PDT 24 Apr 30 02:12:52 PM PDT 24 158314518 ps
T815 /workspace/coverage/default/36.pwrmgr_smoke.1916052032 Apr 30 02:14:53 PM PDT 24 Apr 30 02:14:54 PM PDT 24 69415040 ps
T82 /workspace/coverage/default/3.pwrmgr_stress_all_with_rand_reset.1641488083 Apr 30 02:13:05 PM PDT 24 Apr 30 02:13:26 PM PDT 24 5890284955 ps
T816 /workspace/coverage/default/44.pwrmgr_global_esc.3570895524 Apr 30 02:15:34 PM PDT 24 Apr 30 02:15:35 PM PDT 24 44933719 ps
T817 /workspace/coverage/default/15.pwrmgr_glitch.511008020 Apr 30 02:13:59 PM PDT 24 Apr 30 02:14:00 PM PDT 24 23452986 ps
T818 /workspace/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.3274447137 Apr 30 02:15:07 PM PDT 24 Apr 30 02:15:08 PM PDT 24 39875922 ps
T819 /workspace/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1845503215 Apr 30 02:13:50 PM PDT 24 Apr 30 02:13:53 PM PDT 24 718172565 ps
T820 /workspace/coverage/default/30.pwrmgr_lowpower_invalid.3235010554 Apr 30 02:14:43 PM PDT 24 Apr 30 02:14:45 PM PDT 24 50182958 ps
T821 /workspace/coverage/default/47.pwrmgr_aborted_low_power.1140952427 Apr 30 02:15:23 PM PDT 24 Apr 30 02:15:25 PM PDT 24 24098411 ps
T822 /workspace/coverage/default/46.pwrmgr_glitch.1737549829 Apr 30 02:15:17 PM PDT 24 Apr 30 02:15:18 PM PDT 24 67400092 ps
T823 /workspace/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.4094217280 Apr 30 02:15:05 PM PDT 24 Apr 30 02:15:07 PM PDT 24 122766220 ps
T824 /workspace/coverage/default/32.pwrmgr_disable_rom_integrity_check.4063874277 Apr 30 02:14:50 PM PDT 24 Apr 30 02:14:51 PM PDT 24 67721486 ps
T825 /workspace/coverage/default/4.pwrmgr_lowpower_wakeup_race.723431082 Apr 30 02:12:56 PM PDT 24 Apr 30 02:12:58 PM PDT 24 412895870 ps
T826 /workspace/coverage/default/17.pwrmgr_disable_rom_integrity_check.1943525755 Apr 30 02:14:06 PM PDT 24 Apr 30 02:14:07 PM PDT 24 64529444 ps
T827 /workspace/coverage/default/48.pwrmgr_wakeup_reset.4288380679 Apr 30 02:15:45 PM PDT 24 Apr 30 02:15:46 PM PDT 24 203289298 ps
T828 /workspace/coverage/default/19.pwrmgr_glitch.696322668 Apr 30 02:13:45 PM PDT 24 Apr 30 02:13:47 PM PDT 24 51494243 ps
T829 /workspace/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.3229249224 Apr 30 02:13:52 PM PDT 24 Apr 30 02:13:53 PM PDT 24 28508839 ps
T830 /workspace/coverage/default/2.pwrmgr_stress_all.781996158 Apr 30 02:12:58 PM PDT 24 Apr 30 02:13:00 PM PDT 24 351076899 ps
T831 /workspace/coverage/default/37.pwrmgr_reset.2976411771 Apr 30 02:15:03 PM PDT 24 Apr 30 02:15:04 PM PDT 24 63533683 ps
T832 /workspace/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.2325109290 Apr 30 02:15:39 PM PDT 24 Apr 30 02:15:41 PM PDT 24 75840677 ps
T833 /workspace/coverage/default/20.pwrmgr_glitch.591811531 Apr 30 02:13:55 PM PDT 24 Apr 30 02:13:57 PM PDT 24 41114397 ps
T83 /workspace/coverage/default/12.pwrmgr_stress_all_with_rand_reset.91604156 Apr 30 02:13:21 PM PDT 24 Apr 30 02:13:42 PM PDT 24 23784092500 ps
T834 /workspace/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1841054495 Apr 30 02:14:43 PM PDT 24 Apr 30 02:14:46 PM PDT 24 852635129 ps
T835 /workspace/coverage/default/29.pwrmgr_stress_all_with_rand_reset.3100360870 Apr 30 02:14:44 PM PDT 24 Apr 30 02:14:53 PM PDT 24 5016431685 ps
T836 /workspace/coverage/default/17.pwrmgr_smoke.2767058950 Apr 30 02:13:42 PM PDT 24 Apr 30 02:13:43 PM PDT 24 53222188 ps
T837 /workspace/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4202251963 Apr 30 02:15:17 PM PDT 24 Apr 30 02:15:20 PM PDT 24 1127738600 ps
T838 /workspace/coverage/default/0.pwrmgr_lowpower_wakeup_race.57619549 Apr 30 02:13:10 PM PDT 24 Apr 30 02:13:11 PM PDT 24 54522715 ps
T839 /workspace/coverage/default/24.pwrmgr_reset_invalid.2769712997 Apr 30 02:14:32 PM PDT 24 Apr 30 02:14:33 PM PDT 24 219220944 ps
T840 /workspace/coverage/default/19.pwrmgr_disable_rom_integrity_check.3278836040 Apr 30 02:13:48 PM PDT 24 Apr 30 02:13:50 PM PDT 24 64887170 ps
T841 /workspace/coverage/default/20.pwrmgr_stress_all_with_rand_reset.2284253710 Apr 30 02:14:15 PM PDT 24 Apr 30 02:14:27 PM PDT 24 9215721011 ps
T842 /workspace/coverage/default/31.pwrmgr_reset_invalid.1472424527 Apr 30 02:14:47 PM PDT 24 Apr 30 02:14:49 PM PDT 24 98442332 ps
T843 /workspace/coverage/default/33.pwrmgr_wakeup.864305511 Apr 30 02:14:39 PM PDT 24 Apr 30 02:14:41 PM PDT 24 131262846 ps
T844 /workspace/coverage/default/11.pwrmgr_global_esc.1746665731 Apr 30 02:13:14 PM PDT 24 Apr 30 02:13:15 PM PDT 24 29129923 ps
T845 /workspace/coverage/default/20.pwrmgr_wakeup_reset.3379786438 Apr 30 02:13:59 PM PDT 24 Apr 30 02:14:00 PM PDT 24 266778692 ps
T144 /workspace/coverage/default/40.pwrmgr_stress_all_with_rand_reset.673315997 Apr 30 02:15:00 PM PDT 24 Apr 30 02:15:27 PM PDT 24 8077089923 ps
T846 /workspace/coverage/default/8.pwrmgr_glitch.4089193888 Apr 30 02:13:15 PM PDT 24 Apr 30 02:13:17 PM PDT 24 71504953 ps
T847 /workspace/coverage/default/47.pwrmgr_stress_all.4145730470 Apr 30 02:15:33 PM PDT 24 Apr 30 02:15:38 PM PDT 24 1712848711 ps
T848 /workspace/coverage/default/11.pwrmgr_escalation_timeout.3101523766 Apr 30 02:13:10 PM PDT 24 Apr 30 02:13:12 PM PDT 24 214197863 ps
T849 /workspace/coverage/default/37.pwrmgr_stress_all.631098439 Apr 30 02:15:01 PM PDT 24 Apr 30 02:15:10 PM PDT 24 711992567 ps
T850 /workspace/coverage/default/17.pwrmgr_reset_invalid.3102629501 Apr 30 02:14:01 PM PDT 24 Apr 30 02:14:02 PM PDT 24 297245611 ps
T851 /workspace/coverage/default/38.pwrmgr_aborted_low_power.1083123885 Apr 30 02:15:03 PM PDT 24 Apr 30 02:15:05 PM PDT 24 66975436 ps
T852 /workspace/coverage/default/10.pwrmgr_reset_invalid.329270540 Apr 30 02:13:14 PM PDT 24 Apr 30 02:13:16 PM PDT 24 124254488 ps
T853 /workspace/coverage/default/26.pwrmgr_wakeup.865376091 Apr 30 02:14:45 PM PDT 24 Apr 30 02:14:47 PM PDT 24 670912132 ps
T854 /workspace/coverage/default/19.pwrmgr_wakeup_reset.2156092353 Apr 30 02:13:59 PM PDT 24 Apr 30 02:14:00 PM PDT 24 441879906 ps
T855 /workspace/coverage/default/9.pwrmgr_reset.1525309019 Apr 30 02:13:18 PM PDT 24 Apr 30 02:13:19 PM PDT 24 68517804 ps
T856 /workspace/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.59368964 Apr 30 02:14:52 PM PDT 24 Apr 30 02:14:54 PM PDT 24 1560743031 ps
T857 /workspace/coverage/default/14.pwrmgr_reset.3986985643 Apr 30 02:13:37 PM PDT 24 Apr 30 02:13:39 PM PDT 24 71898087 ps
T858 /workspace/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.4066768349 Apr 30 02:13:50 PM PDT 24 Apr 30 02:13:53 PM PDT 24 222625674 ps
T859 /workspace/coverage/default/6.pwrmgr_global_esc.576411820 Apr 30 02:12:56 PM PDT 24 Apr 30 02:12:58 PM PDT 24 149502576 ps
T860 /workspace/coverage/default/7.pwrmgr_wakeup_reset.1300024863 Apr 30 02:13:10 PM PDT 24 Apr 30 02:13:12 PM PDT 24 222791149 ps
T861 /workspace/coverage/default/25.pwrmgr_disable_rom_integrity_check.3042256286 Apr 30 02:14:24 PM PDT 24 Apr 30 02:14:25 PM PDT 24 66641625 ps
T862 /workspace/coverage/default/5.pwrmgr_wakeup_reset.3141506051 Apr 30 02:13:05 PM PDT 24 Apr 30 02:13:07 PM PDT 24 502761317 ps
T863 /workspace/coverage/default/15.pwrmgr_aborted_low_power.2587280712 Apr 30 02:13:44 PM PDT 24 Apr 30 02:13:46 PM PDT 24 90176883 ps
T864 /workspace/coverage/default/0.pwrmgr_sec_cm_ctrl_config_regwen.3733904516 Apr 30 02:12:42 PM PDT 24 Apr 30 02:12:44 PM PDT 24 140173673 ps
T865 /workspace/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.2066426238 Apr 30 02:15:30 PM PDT 24 Apr 30 02:15:32 PM PDT 24 52319602 ps
T866 /workspace/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2722893085 Apr 30 02:13:59 PM PDT 24 Apr 30 02:14:03 PM PDT 24 909269736 ps
T867 /workspace/coverage/default/12.pwrmgr_reset.2236023429 Apr 30 02:13:44 PM PDT 24 Apr 30 02:13:45 PM PDT 24 40411347 ps
T868 /workspace/coverage/default/18.pwrmgr_wakeup_reset.339149546 Apr 30 02:13:52 PM PDT 24 Apr 30 02:13:53 PM PDT 24 42816062 ps
T869 /workspace/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.1800906180 Apr 30 02:14:30 PM PDT 24 Apr 30 02:14:31 PM PDT 24 28577614 ps
T75 /workspace/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2893586450 Apr 30 02:13:40 PM PDT 24 Apr 30 02:14:02 PM PDT 24 17009211552 ps
T870 /workspace/coverage/default/21.pwrmgr_glitch.2491372045 Apr 30 02:13:59 PM PDT 24 Apr 30 02:14:00 PM PDT 24 32569830 ps
T871 /workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1599360388 Apr 30 02:12:59 PM PDT 24 Apr 30 02:13:02 PM PDT 24 841903456 ps
T872 /workspace/coverage/default/13.pwrmgr_global_esc.494279117 Apr 30 02:13:52 PM PDT 24 Apr 30 02:13:53 PM PDT 24 70417000 ps
T873 /workspace/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2096200166 Apr 30 02:14:59 PM PDT 24 Apr 30 02:15:03 PM PDT 24 875653588 ps
T874 /workspace/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.457384755 Apr 30 02:14:07 PM PDT 24 Apr 30 02:14:08 PM PDT 24 27835784 ps
T875 /workspace/coverage/default/47.pwrmgr_reset.1388588581 Apr 30 02:15:14 PM PDT 24 Apr 30 02:15:16 PM PDT 24 67925168 ps
T19 /workspace/coverage/default/0.pwrmgr_sec_cm.3560912147 Apr 30 02:12:42 PM PDT 24 Apr 30 02:12:44 PM PDT 24 722127704 ps
T20 /workspace/coverage/default/1.pwrmgr_sec_cm.763828259 Apr 30 02:12:55 PM PDT 24 Apr 30 02:12:58 PM PDT 24 359201439 ps
T876 /workspace/coverage/default/17.pwrmgr_wakeup.3308790383 Apr 30 02:13:53 PM PDT 24 Apr 30 02:13:55 PM PDT 24 216380630 ps
T877 /workspace/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.2358056190 Apr 30 02:14:30 PM PDT 24 Apr 30 02:14:31 PM PDT 24 33760191 ps
T878 /workspace/coverage/default/25.pwrmgr_stress_all.2387204464 Apr 30 02:14:41 PM PDT 24 Apr 30 02:14:46 PM PDT 24 1742613062 ps
T879 /workspace/coverage/default/46.pwrmgr_reset_invalid.587486506 Apr 30 02:15:23 PM PDT 24 Apr 30 02:15:25 PM PDT 24 123211194 ps
T880 /workspace/coverage/default/16.pwrmgr_lowpower_invalid.1218967393 Apr 30 02:13:52 PM PDT 24 Apr 30 02:13:53 PM PDT 24 39962814 ps
T881 /workspace/coverage/default/38.pwrmgr_stress_all.2877501471 Apr 30 02:14:57 PM PDT 24 Apr 30 02:15:00 PM PDT 24 1612872718 ps
T882 /workspace/coverage/default/39.pwrmgr_reset.1843043666 Apr 30 02:14:48 PM PDT 24 Apr 30 02:14:50 PM PDT 24 32234977 ps
T883 /workspace/coverage/default/17.pwrmgr_aborted_low_power.2986349634 Apr 30 02:13:46 PM PDT 24 Apr 30 02:13:48 PM PDT 24 29189679 ps
T884 /workspace/coverage/default/23.pwrmgr_global_esc.2440461389 Apr 30 02:14:17 PM PDT 24 Apr 30 02:14:19 PM PDT 24 37510382 ps
T885 /workspace/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.2292874337 Apr 30 02:14:10 PM PDT 24 Apr 30 02:14:12 PM PDT 24 29909665 ps
T886 /workspace/coverage/default/34.pwrmgr_reset_invalid.2258076607 Apr 30 02:15:06 PM PDT 24 Apr 30 02:15:07 PM PDT 24 111812220 ps
T887 /workspace/coverage/default/11.pwrmgr_sec_cm_ctrl_config_regwen.1189062995 Apr 30 02:13:16 PM PDT 24 Apr 30 02:13:18 PM PDT 24 46918710 ps
T888 /workspace/coverage/default/9.pwrmgr_stress_all.3368223764 Apr 30 02:13:18 PM PDT 24 Apr 30 02:13:22 PM PDT 24 1042347911 ps
T889 /workspace/coverage/default/49.pwrmgr_stress_all.1854647399 Apr 30 02:15:20 PM PDT 24 Apr 30 02:15:24 PM PDT 24 920112290 ps
T890 /workspace/coverage/default/31.pwrmgr_glitch.3676714167 Apr 30 02:14:46 PM PDT 24 Apr 30 02:14:47 PM PDT 24 32355706 ps
T891 /workspace/coverage/default/14.pwrmgr_escalation_timeout.3330790916 Apr 30 02:13:31 PM PDT 24 Apr 30 02:13:32 PM PDT 24 162374024 ps
T892 /workspace/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.642397099 Apr 30 02:13:52 PM PDT 24 Apr 30 02:13:54 PM PDT 24 169702672 ps
T893 /workspace/coverage/default/27.pwrmgr_lowpower_invalid.1282882198 Apr 30 02:14:34 PM PDT 24 Apr 30 02:14:35 PM PDT 24 75620581 ps
T894 /workspace/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.1922936970 Apr 30 02:14:58 PM PDT 24 Apr 30 02:14:59 PM PDT 24 33012269 ps
T895 /workspace/coverage/default/10.pwrmgr_stress_all.729916373 Apr 30 02:13:28 PM PDT 24 Apr 30 02:13:37 PM PDT 24 2274583145 ps
T896 /workspace/coverage/default/49.pwrmgr_smoke.1595030000 Apr 30 02:15:40 PM PDT 24 Apr 30 02:15:42 PM PDT 24 84659216 ps
T897 /workspace/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.3459607005 Apr 30 02:14:22 PM PDT 24 Apr 30 02:14:23 PM PDT 24 28308145 ps
T898 /workspace/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.4008564631 Apr 30 02:14:30 PM PDT 24 Apr 30 02:14:31 PM PDT 24 96579865 ps
T899 /workspace/coverage/default/42.pwrmgr_smoke.3565422776 Apr 30 02:15:16 PM PDT 24 Apr 30 02:15:17 PM PDT 24 63296645 ps
T900 /workspace/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.1532628037 Apr 30 02:14:47 PM PDT 24 Apr 30 02:14:49 PM PDT 24 49764294 ps
T901 /workspace/coverage/default/29.pwrmgr_smoke.1008890561 Apr 30 02:15:01 PM PDT 24 Apr 30 02:15:08 PM PDT 24 55299416 ps
T902 /workspace/coverage/default/33.pwrmgr_aborted_low_power.1579508609 Apr 30 02:14:40 PM PDT 24 Apr 30 02:14:42 PM PDT 24 43385091 ps
T903 /workspace/coverage/default/8.pwrmgr_reset.2831657208 Apr 30 02:12:58 PM PDT 24 Apr 30 02:13:00 PM PDT 24 87547316 ps
T904 /workspace/coverage/default/39.pwrmgr_stress_all.819376170 Apr 30 02:14:55 PM PDT 24 Apr 30 02:15:00 PM PDT 24 912106755 ps
T905 /workspace/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.1683756375 Apr 30 02:13:48 PM PDT 24 Apr 30 02:13:50 PM PDT 24 30433806 ps
T906 /workspace/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2862215688 Apr 30 02:15:03 PM PDT 24 Apr 30 02:15:08 PM PDT 24 879112131 ps
T907 /workspace/coverage/default/6.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.409131377 Apr 30 02:12:58 PM PDT 24 Apr 30 02:13:02 PM PDT 24 877085135 ps
T908 /workspace/coverage/default/19.pwrmgr_lowpower_wakeup_race.3343256149 Apr 30 02:14:07 PM PDT 24 Apr 30 02:14:09 PM PDT 24 68490660 ps
T909 /workspace/coverage/default/5.pwrmgr_glitch.3235574452 Apr 30 02:12:54 PM PDT 24 Apr 30 02:12:56 PM PDT 24 110289558 ps
T910 /workspace/coverage/default/22.pwrmgr_lowpower_invalid.4278602667 Apr 30 02:14:20 PM PDT 24 Apr 30 02:14:21 PM PDT 24 42635124 ps
T94 /workspace/coverage/default/33.pwrmgr_stress_all_with_rand_reset.1287793209 Apr 30 02:15:07 PM PDT 24 Apr 30 02:15:46 PM PDT 24 11477485523 ps
T911 /workspace/coverage/default/36.pwrmgr_stress_all.235717745 Apr 30 02:14:45 PM PDT 24 Apr 30 02:14:49 PM PDT 24 455289201 ps
T912 /workspace/coverage/default/29.pwrmgr_reset_invalid.803355007 Apr 30 02:14:39 PM PDT 24 Apr 30 02:14:41 PM PDT 24 115413373 ps
T913 /workspace/coverage/default/24.pwrmgr_glitch.3661916320 Apr 30 02:14:33 PM PDT 24 Apr 30 02:14:35 PM PDT 24 47739470 ps
T914 /workspace/coverage/default/44.pwrmgr_glitch.2968720000 Apr 30 02:15:21 PM PDT 24 Apr 30 02:15:22 PM PDT 24 45369427 ps
T915 /workspace/coverage/default/26.pwrmgr_lowpower_wakeup_race.3403948471 Apr 30 02:14:47 PM PDT 24 Apr 30 02:14:48 PM PDT 24 49011912 ps
T916 /workspace/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.86994988 Apr 30 02:13:57 PM PDT 24 Apr 30 02:13:59 PM PDT 24 207133004 ps
T917 /workspace/coverage/default/24.pwrmgr_lowpower_invalid.1277123396 Apr 30 02:14:46 PM PDT 24 Apr 30 02:14:48 PM PDT 24 50689947 ps
T29 /workspace/coverage/default/4.pwrmgr_sec_cm.152198669 Apr 30 02:13:04 PM PDT 24 Apr 30 02:13:06 PM PDT 24 329442323 ps
T918 /workspace/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.1667303297 Apr 30 02:13:04 PM PDT 24 Apr 30 02:13:05 PM PDT 24 187301578 ps
T919 /workspace/coverage/default/35.pwrmgr_lowpower_invalid.3638085304 Apr 30 02:14:46 PM PDT 24 Apr 30 02:14:48 PM PDT 24 44433411 ps
T920 /workspace/coverage/default/27.pwrmgr_aborted_low_power.249232720 Apr 30 02:14:34 PM PDT 24 Apr 30 02:14:35 PM PDT 24 22503706 ps
T921 /workspace/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.1935182143 Apr 30 02:14:33 PM PDT 24 Apr 30 02:14:35 PM PDT 24 53450895 ps
T922 /workspace/coverage/default/1.pwrmgr_stress_all_with_rand_reset.3238438085 Apr 30 02:12:53 PM PDT 24 Apr 30 02:13:01 PM PDT 24 3189811077 ps
T923 /workspace/coverage/default/37.pwrmgr_lowpower_wakeup_race.767091488 Apr 30 02:14:41 PM PDT 24 Apr 30 02:14:44 PM PDT 24 448756282 ps
T924 /workspace/coverage/default/11.pwrmgr_stress_all_with_rand_reset.1103118728 Apr 30 02:13:21 PM PDT 24 Apr 30 02:13:38 PM PDT 24 7103257890 ps
T925 /workspace/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.2930412432 Apr 30 02:14:58 PM PDT 24 Apr 30 02:14:59 PM PDT 24 39345500 ps
T926 /workspace/coverage/default/37.pwrmgr_wakeup_reset.3491374346 Apr 30 02:14:44 PM PDT 24 Apr 30 02:14:46 PM PDT 24 604367830 ps
T927 /workspace/coverage/default/47.pwrmgr_escalation_timeout.535786269 Apr 30 02:15:23 PM PDT 24 Apr 30 02:15:25 PM PDT 24 159230858 ps
T928 /workspace/coverage/default/49.pwrmgr_escalation_timeout.1181367198 Apr 30 02:15:20 PM PDT 24 Apr 30 02:15:22 PM PDT 24 163304808 ps
T929 /workspace/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.1477811258 Apr 30 02:14:43 PM PDT 24 Apr 30 02:14:50 PM PDT 24 66558128 ps
T930 /workspace/coverage/default/1.pwrmgr_global_esc.3038977329 Apr 30 02:12:54 PM PDT 24 Apr 30 02:12:56 PM PDT 24 51255367 ps
T931 /workspace/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1389077623 Apr 30 02:13:00 PM PDT 24 Apr 30 02:13:02 PM PDT 24 2293924457 ps
T932 /workspace/coverage/default/47.pwrmgr_smoke.2303209411 Apr 30 02:15:16 PM PDT 24 Apr 30 02:15:17 PM PDT 24 32285136 ps
T933 /workspace/coverage/default/39.pwrmgr_wakeup.3083131886 Apr 30 02:15:07 PM PDT 24 Apr 30 02:15:09 PM PDT 24 260403779 ps
T934 /workspace/coverage/default/43.pwrmgr_glitch.3154324845 Apr 30 02:15:17 PM PDT 24 Apr 30 02:15:18 PM PDT 24 45027610 ps
T30 /workspace/coverage/default/3.pwrmgr_sec_cm.3645245604 Apr 30 02:12:54 PM PDT 24 Apr 30 02:12:56 PM PDT 24 464312482 ps
T179 /workspace/coverage/default/23.pwrmgr_disable_rom_integrity_check.1981366191 Apr 30 02:14:07 PM PDT 24 Apr 30 02:14:08 PM PDT 24 73443788 ps
T935 /workspace/coverage/default/6.pwrmgr_stress_all.276469325 Apr 30 02:13:09 PM PDT 24 Apr 30 02:13:12 PM PDT 24 1394394587 ps
T936 /workspace/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3163162691 Apr 30 02:15:45 PM PDT 24 Apr 30 02:15:49 PM PDT 24 864861809 ps
T937 /workspace/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.4002296041 Apr 30 02:15:33 PM PDT 24 Apr 30 02:15:44 PM PDT 24 185730402 ps
T938 /workspace/coverage/default/3.pwrmgr_wakeup_reset.3125026663 Apr 30 02:13:04 PM PDT 24 Apr 30 02:13:05 PM PDT 24 195512956 ps
T939 /workspace/coverage/default/40.pwrmgr_stress_all.1066009546 Apr 30 02:15:01 PM PDT 24 Apr 30 02:15:07 PM PDT 24 3340414385 ps
T940 /workspace/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.212590357 Apr 30 02:15:24 PM PDT 24 Apr 30 02:15:25 PM PDT 24 43831624 ps
T941 /workspace/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.701572464 Apr 30 02:14:32 PM PDT 24 Apr 30 02:14:33 PM PDT 24 93690371 ps
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T943 /workspace/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.917999847 Apr 30 02:13:48 PM PDT 24 Apr 30 02:13:52 PM PDT 24 806400950 ps
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T962 /workspace/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.119082797 Apr 30 02:14:57 PM PDT 24 Apr 30 02:15:00 PM PDT 24 1018202793 ps
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T965 /workspace/coverage/default/6.pwrmgr_reset_invalid.2234256095 Apr 30 02:12:54 PM PDT 24 Apr 30 02:12:56 PM PDT 24 114848047 ps
T966 /workspace/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1784024860 Apr 30 02:14:47 PM PDT 24 Apr 30 02:14:51 PM PDT 24 887938468 ps
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T971 /workspace/coverage/default/44.pwrmgr_escalation_timeout.3096921520 Apr 30 02:15:18 PM PDT 24 Apr 30 02:15:20 PM PDT 24 610725748 ps
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T976 /workspace/coverage/default/27.pwrmgr_wakeup.2804555913 Apr 30 02:14:42 PM PDT 24 Apr 30 02:14:45 PM PDT 24 165846183 ps
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T982 /workspace/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.219778293 Apr 30 02:14:26 PM PDT 24 Apr 30 02:14:27 PM PDT 24 40193323 ps
T983 /workspace/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.251380392 Apr 30 02:13:35 PM PDT 24 Apr 30 02:13:37 PM PDT 24 977337055 ps
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T996 /workspace/coverage/default/38.pwrmgr_glitch.1807463158 Apr 30 02:15:04 PM PDT 24 Apr 30 02:15:05 PM PDT 24 38845028 ps
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T999 /workspace/coverage/default/14.pwrmgr_lowpower_wakeup_race.2832094739 Apr 30 02:13:29 PM PDT 24 Apr 30 02:13:30 PM PDT 24 69803076 ps
T1000 /workspace/coverage/default/46.pwrmgr_global_esc.3448551855 Apr 30 02:15:15 PM PDT 24 Apr 30 02:15:16 PM PDT 24 50478983 ps
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T50 /workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.3252285752 Apr 30 02:21:16 PM PDT 24 Apr 30 02:21:19 PM PDT 24 190389296 ps
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T114 /workspace/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.1339894254 Apr 30 02:21:01 PM PDT 24 Apr 30 02:21:03 PM PDT 24 47663684 ps
T51 /workspace/coverage/cover_reg_top/19.pwrmgr_tl_intg_err.2260726142 Apr 30 02:21:13 PM PDT 24 Apr 30 02:21:15 PM PDT 24 181573314 ps
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T115 /workspace/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.3165589452 Apr 30 02:21:03 PM PDT 24 Apr 30 02:21:05 PM PDT 24 32131600 ps
T63 /workspace/coverage/cover_reg_top/0.pwrmgr_tl_errors.4041714731 Apr 30 02:20:53 PM PDT 24 Apr 30 02:20:56 PM PDT 24 207337730 ps
T72 /workspace/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.1107516691 Apr 30 02:20:59 PM PDT 24 Apr 30 02:21:02 PM PDT 24 86820136 ps
T65 /workspace/coverage/cover_reg_top/18.pwrmgr_intr_test.1995103747 Apr 30 02:21:13 PM PDT 24 Apr 30 02:21:14 PM PDT 24 27539152 ps
T116 /workspace/coverage/cover_reg_top/15.pwrmgr_csr_rw.2625875702 Apr 30 02:21:05 PM PDT 24 Apr 30 02:21:06 PM PDT 24 21649829 ps
T174 /workspace/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.1154043704 Apr 30 02:21:05 PM PDT 24 Apr 30 02:21:06 PM PDT 24 115934679 ps
T56 /workspace/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.938801139 Apr 30 02:21:02 PM PDT 24 Apr 30 02:21:04 PM PDT 24 193878231 ps
T66 /workspace/coverage/cover_reg_top/4.pwrmgr_intr_test.2759491884 Apr 30 02:20:59 PM PDT 24 Apr 30 02:21:00 PM PDT 24 31960572 ps
T67 /workspace/coverage/cover_reg_top/0.pwrmgr_intr_test.4013783854 Apr 30 02:20:51 PM PDT 24 Apr 30 02:20:53 PM PDT 24 17649972 ps
T117 /workspace/coverage/cover_reg_top/18.pwrmgr_csr_rw.1880278941 Apr 30 02:21:13 PM PDT 24 Apr 30 02:21:14 PM PDT 24 57181928 ps
T64 /workspace/coverage/cover_reg_top/3.pwrmgr_tl_errors.2630239258 Apr 30 02:21:02 PM PDT 24 Apr 30 02:21:04 PM PDT 24 708877574 ps
T169 /workspace/coverage/cover_reg_top/1.pwrmgr_intr_test.4256240243 Apr 30 02:21:02 PM PDT 24 Apr 30 02:21:04 PM PDT 24 19118512 ps
T102 /workspace/coverage/cover_reg_top/10.pwrmgr_csr_rw.3010152051 Apr 30 02:21:15 PM PDT 24 Apr 30 02:21:16 PM PDT 24 97536867 ps
T1003 /workspace/coverage/cover_reg_top/9.pwrmgr_csr_rw.612603583 Apr 30 02:21:00 PM PDT 24 Apr 30 02:21:02 PM PDT 24 20057922 ps
T103 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.573099007 Apr 30 02:20:58 PM PDT 24 Apr 30 02:21:00 PM PDT 24 32734417 ps
T57 /workspace/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.3682728190 Apr 30 02:21:16 PM PDT 24 Apr 30 02:21:18 PM PDT 24 215349300 ps
T111 /workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.2795728406 Apr 30 02:21:01 PM PDT 24 Apr 30 02:21:05 PM PDT 24 191038320 ps
T170 /workspace/coverage/cover_reg_top/41.pwrmgr_intr_test.2934013074 Apr 30 02:21:18 PM PDT 24 Apr 30 02:21:19 PM PDT 24 31001412 ps
T118 /workspace/coverage/cover_reg_top/12.pwrmgr_csr_rw.1229213106 Apr 30 02:21:09 PM PDT 24 Apr 30 02:21:10 PM PDT 24 26547739 ps
T119 /workspace/coverage/cover_reg_top/11.pwrmgr_csr_rw.305447879 Apr 30 02:21:07 PM PDT 24 Apr 30 02:21:08 PM PDT 24 60067474 ps
T73 /workspace/coverage/cover_reg_top/7.pwrmgr_tl_errors.2846325802 Apr 30 02:21:02 PM PDT 24 Apr 30 02:21:05 PM PDT 24 74095682 ps
T1004 /workspace/coverage/cover_reg_top/49.pwrmgr_intr_test.184197687 Apr 30 02:21:21 PM PDT 24 Apr 30 02:21:22 PM PDT 24 28952040 ps
T120 /workspace/coverage/cover_reg_top/12.pwrmgr_same_csr_outstanding.670984565 Apr 30 02:21:09 PM PDT 24 Apr 30 02:21:10 PM PDT 24 68900420 ps
T121 /workspace/coverage/cover_reg_top/11.pwrmgr_same_csr_outstanding.2018182540 Apr 30 02:21:12 PM PDT 24 Apr 30 02:21:13 PM PDT 24 143793366 ps
T171 /workspace/coverage/cover_reg_top/31.pwrmgr_intr_test.3468441857 Apr 30 02:21:21 PM PDT 24 Apr 30 02:21:22 PM PDT 24 18532546 ps
T1005 /workspace/coverage/cover_reg_top/17.pwrmgr_tl_intg_err.1370403477 Apr 30 02:21:10 PM PDT 24 Apr 30 02:21:12 PM PDT 24 203009623 ps
T1006 /workspace/coverage/cover_reg_top/4.pwrmgr_tl_errors.2681233948 Apr 30 02:20:59 PM PDT 24 Apr 30 02:21:02 PM PDT 24 50394962 ps
T69 /workspace/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.2218347940 Apr 30 02:21:09 PM PDT 24 Apr 30 02:21:10 PM PDT 24 192325002 ps
T104 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.3734369725 Apr 30 02:21:00 PM PDT 24 Apr 30 02:21:02 PM PDT 24 34447433 ps
T1007 /workspace/coverage/cover_reg_top/16.pwrmgr_tl_errors.2209686360 Apr 30 02:21:08 PM PDT 24 Apr 30 02:21:11 PM PDT 24 231258909 ps
T1008 /workspace/coverage/cover_reg_top/2.pwrmgr_tl_errors.3709422636 Apr 30 02:21:01 PM PDT 24 Apr 30 02:21:04 PM PDT 24 35929729 ps
T167 /workspace/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.95352083 Apr 30 02:21:06 PM PDT 24 Apr 30 02:21:08 PM PDT 24 298868579 ps
T1009 /workspace/coverage/cover_reg_top/12.pwrmgr_tl_errors.183582368 Apr 30 02:21:07 PM PDT 24 Apr 30 02:21:09 PM PDT 24 214786771 ps
T172 /workspace/coverage/cover_reg_top/26.pwrmgr_intr_test.1766849073 Apr 30 02:21:18 PM PDT 24 Apr 30 02:21:19 PM PDT 24 17664103 ps
T173 /workspace/coverage/cover_reg_top/14.pwrmgr_intr_test.960061769 Apr 30 02:21:06 PM PDT 24 Apr 30 02:21:07 PM PDT 24 24661110 ps
T1010 /workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.299512265 Apr 30 02:21:00 PM PDT 24 Apr 30 02:21:01 PM PDT 24 77732547 ps
T1011 /workspace/coverage/cover_reg_top/48.pwrmgr_intr_test.3617019519 Apr 30 02:21:21 PM PDT 24 Apr 30 02:21:22 PM PDT 24 222738152 ps
T1012 /workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.3431978142 Apr 30 02:21:12 PM PDT 24 Apr 30 02:21:13 PM PDT 24 20135039 ps
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