Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.92 98.23 96.58 99.44 96.00 96.37 100.00 98.85


Total test records in report: 1118
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T802 /workspace/coverage/default/15.pwrmgr_aborted_low_power.133905448 May 21 12:48:50 PM PDT 24 May 21 12:48:57 PM PDT 24 96284959 ps
T803 /workspace/coverage/default/21.pwrmgr_global_esc.3836311414 May 21 12:49:22 PM PDT 24 May 21 12:49:30 PM PDT 24 47941738 ps
T804 /workspace/coverage/default/10.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1180004805 May 21 12:48:35 PM PDT 24 May 21 12:48:46 PM PDT 24 868887727 ps
T805 /workspace/coverage/default/22.pwrmgr_wakeup.2211380501 May 21 12:49:12 PM PDT 24 May 21 12:49:19 PM PDT 24 172783162 ps
T806 /workspace/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2640510971 May 21 12:48:29 PM PDT 24 May 21 12:48:40 PM PDT 24 819727629 ps
T807 /workspace/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.1588150321 May 21 12:50:00 PM PDT 24 May 21 12:50:09 PM PDT 24 292961708 ps
T808 /workspace/coverage/default/32.pwrmgr_escalation_timeout.1783199895 May 21 12:49:40 PM PDT 24 May 21 12:49:47 PM PDT 24 310364857 ps
T809 /workspace/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.1139407647 May 21 12:48:16 PM PDT 24 May 21 12:48:21 PM PDT 24 31647128 ps
T810 /workspace/coverage/default/3.pwrmgr_lowpower_wakeup_race.234421263 May 21 12:48:15 PM PDT 24 May 21 12:48:20 PM PDT 24 73757546 ps
T811 /workspace/coverage/default/25.pwrmgr_stress_all_with_rand_reset.955963641 May 21 12:49:30 PM PDT 24 May 21 12:49:55 PM PDT 24 19095579435 ps
T812 /workspace/coverage/default/4.pwrmgr_escalation_timeout.4167656281 May 21 12:48:21 PM PDT 24 May 21 12:48:27 PM PDT 24 630739223 ps
T813 /workspace/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2977881502 May 21 12:49:21 PM PDT 24 May 21 12:49:32 PM PDT 24 1987414325 ps
T814 /workspace/coverage/default/11.pwrmgr_wakeup_reset.1260922857 May 21 12:48:42 PM PDT 24 May 21 12:48:50 PM PDT 24 304741829 ps
T815 /workspace/coverage/default/24.pwrmgr_lowpower_invalid.2565051030 May 21 12:49:20 PM PDT 24 May 21 12:49:27 PM PDT 24 43073420 ps
T83 /workspace/coverage/default/44.pwrmgr_stress_all_with_rand_reset.999263727 May 21 12:50:09 PM PDT 24 May 21 12:50:46 PM PDT 24 6844563222 ps
T816 /workspace/coverage/default/28.pwrmgr_reset_invalid.1900052164 May 21 12:49:29 PM PDT 24 May 21 12:49:37 PM PDT 24 104818041 ps
T817 /workspace/coverage/default/9.pwrmgr_wakeup.2571749709 May 21 12:48:39 PM PDT 24 May 21 12:48:47 PM PDT 24 166532344 ps
T818 /workspace/coverage/default/1.pwrmgr_lowpower_wakeup_race.3406073777 May 21 12:48:08 PM PDT 24 May 21 12:48:13 PM PDT 24 197578403 ps
T819 /workspace/coverage/default/44.pwrmgr_reset.2296580824 May 21 12:50:08 PM PDT 24 May 21 12:50:20 PM PDT 24 116007662 ps
T820 /workspace/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.712402399 May 21 12:48:29 PM PDT 24 May 21 12:48:37 PM PDT 24 942348032 ps
T821 /workspace/coverage/default/3.pwrmgr_stress_all_with_rand_reset.1220964995 May 21 12:48:21 PM PDT 24 May 21 12:48:40 PM PDT 24 3617952243 ps
T822 /workspace/coverage/default/17.pwrmgr_wakeup.708719311 May 21 12:49:03 PM PDT 24 May 21 12:49:10 PM PDT 24 153540089 ps
T823 /workspace/coverage/default/14.pwrmgr_escalation_timeout.1381957157 May 21 12:48:52 PM PDT 24 May 21 12:48:59 PM PDT 24 629739289 ps
T824 /workspace/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.3124519242 May 21 12:49:56 PM PDT 24 May 21 12:50:02 PM PDT 24 29075451 ps
T825 /workspace/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.1771851645 May 21 12:49:22 PM PDT 24 May 21 12:49:30 PM PDT 24 31166330 ps
T826 /workspace/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.4248715283 May 21 12:48:46 PM PDT 24 May 21 12:48:53 PM PDT 24 96371178 ps
T827 /workspace/coverage/default/12.pwrmgr_stress_all.2019027354 May 21 12:48:43 PM PDT 24 May 21 12:48:54 PM PDT 24 5098990488 ps
T828 /workspace/coverage/default/26.pwrmgr_glitch.3845495000 May 21 12:49:21 PM PDT 24 May 21 12:49:30 PM PDT 24 48231588 ps
T829 /workspace/coverage/default/0.pwrmgr_lowpower_invalid.602213162 May 21 12:48:09 PM PDT 24 May 21 12:48:13 PM PDT 24 42897635 ps
T830 /workspace/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1859286620 May 21 12:49:11 PM PDT 24 May 21 12:49:20 PM PDT 24 780696692 ps
T831 /workspace/coverage/default/1.pwrmgr_reset.2331612258 May 21 12:48:05 PM PDT 24 May 21 12:48:09 PM PDT 24 89201764 ps
T832 /workspace/coverage/default/7.pwrmgr_esc_clk_rst_malfunc.3279676683 May 21 12:48:29 PM PDT 24 May 21 12:48:36 PM PDT 24 31975199 ps
T833 /workspace/coverage/default/49.pwrmgr_wakeup.3942243768 May 21 12:50:32 PM PDT 24 May 21 12:50:42 PM PDT 24 226938108 ps
T834 /workspace/coverage/default/2.pwrmgr_stress_all.3181401448 May 21 12:48:15 PM PDT 24 May 21 12:48:23 PM PDT 24 1204881394 ps
T835 /workspace/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.3862625865 May 21 12:49:20 PM PDT 24 May 21 12:49:28 PM PDT 24 66094453 ps
T836 /workspace/coverage/default/3.pwrmgr_global_esc.3837526461 May 21 12:48:23 PM PDT 24 May 21 12:48:29 PM PDT 24 179953663 ps
T837 /workspace/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.3901584569 May 21 12:49:00 PM PDT 24 May 21 12:49:05 PM PDT 24 101077674 ps
T838 /workspace/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.3096295591 May 21 12:50:01 PM PDT 24 May 21 12:50:10 PM PDT 24 37414590 ps
T839 /workspace/coverage/default/25.pwrmgr_aborted_low_power.2534521253 May 21 12:49:18 PM PDT 24 May 21 12:49:25 PM PDT 24 96374979 ps
T840 /workspace/coverage/default/36.pwrmgr_reset_invalid.2626057755 May 21 12:49:58 PM PDT 24 May 21 12:50:06 PM PDT 24 143182425 ps
T841 /workspace/coverage/default/0.pwrmgr_smoke.538089907 May 21 12:48:10 PM PDT 24 May 21 12:48:14 PM PDT 24 43729056 ps
T842 /workspace/coverage/default/37.pwrmgr_disable_rom_integrity_check.1940409043 May 21 12:49:59 PM PDT 24 May 21 12:50:07 PM PDT 24 58135201 ps
T843 /workspace/coverage/default/41.pwrmgr_wakeup.1674538299 May 21 12:50:05 PM PDT 24 May 21 12:50:21 PM PDT 24 131032435 ps
T844 /workspace/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.3867263424 May 21 12:49:01 PM PDT 24 May 21 12:49:08 PM PDT 24 58114248 ps
T845 /workspace/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1989419523 May 21 12:49:20 PM PDT 24 May 21 12:49:29 PM PDT 24 1236999578 ps
T846 /workspace/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.940771455 May 21 12:48:45 PM PDT 24 May 21 12:48:54 PM PDT 24 996322326 ps
T847 /workspace/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.957830035 May 21 12:49:13 PM PDT 24 May 21 12:49:22 PM PDT 24 860077235 ps
T848 /workspace/coverage/default/30.pwrmgr_stress_all_with_rand_reset.3265081178 May 21 12:49:36 PM PDT 24 May 21 12:49:53 PM PDT 24 3216281689 ps
T104 /workspace/coverage/default/35.pwrmgr_stress_all_with_rand_reset.2816366292 May 21 12:49:41 PM PDT 24 May 21 12:49:59 PM PDT 24 8274156911 ps
T849 /workspace/coverage/default/14.pwrmgr_global_esc.1499780057 May 21 12:48:49 PM PDT 24 May 21 12:48:56 PM PDT 24 76805460 ps
T850 /workspace/coverage/default/17.pwrmgr_global_esc.861631456 May 21 12:48:58 PM PDT 24 May 21 12:49:03 PM PDT 24 37402913 ps
T851 /workspace/coverage/default/43.pwrmgr_glitch.3750033543 May 21 12:50:07 PM PDT 24 May 21 12:50:18 PM PDT 24 48981455 ps
T852 /workspace/coverage/default/36.pwrmgr_glitch.1700846200 May 21 12:49:53 PM PDT 24 May 21 12:49:59 PM PDT 24 124802888 ps
T853 /workspace/coverage/default/37.pwrmgr_aborted_low_power.1869172789 May 21 12:50:03 PM PDT 24 May 21 12:50:14 PM PDT 24 51127636 ps
T854 /workspace/coverage/default/3.pwrmgr_sec_cm_rstmgr_intersig_mubi.3898722849 May 21 12:48:26 PM PDT 24 May 21 12:48:34 PM PDT 24 234318660 ps
T855 /workspace/coverage/default/27.pwrmgr_wakeup.3105939338 May 21 12:49:21 PM PDT 24 May 21 12:49:31 PM PDT 24 271537407 ps
T856 /workspace/coverage/default/20.pwrmgr_glitch.2693152618 May 21 12:49:02 PM PDT 24 May 21 12:49:08 PM PDT 24 63099250 ps
T857 /workspace/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.3238905856 May 21 12:50:19 PM PDT 24 May 21 12:50:30 PM PDT 24 360532752 ps
T858 /workspace/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2127958540 May 21 12:49:05 PM PDT 24 May 21 12:49:31 PM PDT 24 6534097141 ps
T859 /workspace/coverage/default/20.pwrmgr_lowpower_invalid.4182155353 May 21 12:49:06 PM PDT 24 May 21 12:49:13 PM PDT 24 260070371 ps
T860 /workspace/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2971035244 May 21 12:49:55 PM PDT 24 May 21 12:50:04 PM PDT 24 993595856 ps
T861 /workspace/coverage/default/18.pwrmgr_disable_rom_integrity_check.2794433476 May 21 12:49:02 PM PDT 24 May 21 12:49:08 PM PDT 24 87214000 ps
T862 /workspace/coverage/default/44.pwrmgr_lowpower_invalid.1131577898 May 21 12:50:04 PM PDT 24 May 21 12:50:15 PM PDT 24 46283997 ps
T863 /workspace/coverage/default/8.pwrmgr_wakeup_reset.3943034252 May 21 12:48:35 PM PDT 24 May 21 12:48:43 PM PDT 24 113138989 ps
T864 /workspace/coverage/default/49.pwrmgr_stress_all.2494377853 May 21 12:50:24 PM PDT 24 May 21 12:50:36 PM PDT 24 790132196 ps
T865 /workspace/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2419953404 May 21 12:48:13 PM PDT 24 May 21 12:48:18 PM PDT 24 878689639 ps
T866 /workspace/coverage/default/6.pwrmgr_lowpower_invalid.3446869124 May 21 12:48:28 PM PDT 24 May 21 12:48:35 PM PDT 24 230664750 ps
T867 /workspace/coverage/default/18.pwrmgr_lowpower_wakeup_race.267623225 May 21 12:49:05 PM PDT 24 May 21 12:49:12 PM PDT 24 58933942 ps
T868 /workspace/coverage/default/4.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2832131254 May 21 12:48:22 PM PDT 24 May 21 12:48:29 PM PDT 24 1430504448 ps
T869 /workspace/coverage/default/49.pwrmgr_lowpower_wakeup_race.4058024848 May 21 12:50:26 PM PDT 24 May 21 12:50:38 PM PDT 24 310154705 ps
T870 /workspace/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3615921870 May 21 12:49:53 PM PDT 24 May 21 12:50:01 PM PDT 24 769988985 ps
T871 /workspace/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.1947805756 May 21 12:49:10 PM PDT 24 May 21 12:49:18 PM PDT 24 196460508 ps
T872 /workspace/coverage/default/38.pwrmgr_lowpower_invalid.3988396866 May 21 12:49:51 PM PDT 24 May 21 12:49:57 PM PDT 24 41926890 ps
T873 /workspace/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1233103957 May 21 12:49:21 PM PDT 24 May 21 12:49:32 PM PDT 24 869291383 ps
T874 /workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.2130992380 May 21 12:50:06 PM PDT 24 May 21 12:50:18 PM PDT 24 69424659 ps
T875 /workspace/coverage/default/7.pwrmgr_reset_invalid.311136747 May 21 12:48:28 PM PDT 24 May 21 12:48:36 PM PDT 24 265389704 ps
T876 /workspace/coverage/default/21.pwrmgr_reset_invalid.724935077 May 21 12:49:11 PM PDT 24 May 21 12:49:19 PM PDT 24 110003635 ps
T877 /workspace/coverage/default/29.pwrmgr_escalation_timeout.3529485149 May 21 12:49:41 PM PDT 24 May 21 12:49:48 PM PDT 24 159478449 ps
T878 /workspace/coverage/default/41.pwrmgr_escalation_timeout.932650541 May 21 12:50:05 PM PDT 24 May 21 12:50:17 PM PDT 24 636215127 ps
T879 /workspace/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1193773083 May 21 12:50:09 PM PDT 24 May 21 12:50:22 PM PDT 24 910993707 ps
T880 /workspace/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.1630746412 May 21 12:49:51 PM PDT 24 May 21 12:49:57 PM PDT 24 91051090 ps
T881 /workspace/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3338465861 May 21 12:50:14 PM PDT 24 May 21 12:50:27 PM PDT 24 806672375 ps
T882 /workspace/coverage/default/3.pwrmgr_glitch.2610022951 May 21 12:48:21 PM PDT 24 May 21 12:48:27 PM PDT 24 23231533 ps
T883 /workspace/coverage/default/32.pwrmgr_stress_all.4169787351 May 21 12:49:42 PM PDT 24 May 21 12:49:51 PM PDT 24 786639590 ps
T884 /workspace/coverage/default/13.pwrmgr_lowpower_invalid.2301400777 May 21 12:48:50 PM PDT 24 May 21 12:48:57 PM PDT 24 59106173 ps
T885 /workspace/coverage/default/26.pwrmgr_lowpower_invalid.1411946535 May 21 12:49:31 PM PDT 24 May 21 12:49:38 PM PDT 24 50982570 ps
T886 /workspace/coverage/default/37.pwrmgr_wakeup_reset.3752404314 May 21 12:49:50 PM PDT 24 May 21 12:49:56 PM PDT 24 288050684 ps
T887 /workspace/coverage/default/22.pwrmgr_disable_rom_integrity_check.124905170 May 21 12:49:15 PM PDT 24 May 21 12:49:21 PM PDT 24 83060878 ps
T888 /workspace/coverage/default/44.pwrmgr_smoke.4017794772 May 21 12:50:01 PM PDT 24 May 21 12:50:10 PM PDT 24 27566873 ps
T889 /workspace/coverage/default/12.pwrmgr_lowpower_wakeup_race.293708986 May 21 12:48:45 PM PDT 24 May 21 12:48:52 PM PDT 24 126605292 ps
T890 /workspace/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.2667377787 May 21 12:50:07 PM PDT 24 May 21 12:50:18 PM PDT 24 29963395 ps
T891 /workspace/coverage/default/30.pwrmgr_global_esc.595563456 May 21 12:49:32 PM PDT 24 May 21 12:49:38 PM PDT 24 68112434 ps
T892 /workspace/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.3678376804 May 21 12:49:36 PM PDT 24 May 21 12:49:43 PM PDT 24 50881004 ps
T893 /workspace/coverage/default/19.pwrmgr_escalation_timeout.3659807892 May 21 12:49:02 PM PDT 24 May 21 12:49:09 PM PDT 24 166038329 ps
T894 /workspace/coverage/default/8.pwrmgr_sec_cm_rstmgr_intersig_mubi.1177843562 May 21 12:48:31 PM PDT 24 May 21 12:48:38 PM PDT 24 67944448 ps
T895 /workspace/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.2435891273 May 21 12:49:57 PM PDT 24 May 21 12:50:04 PM PDT 24 231568972 ps
T896 /workspace/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.74684779 May 21 12:50:02 PM PDT 24 May 21 12:50:14 PM PDT 24 762308339 ps
T897 /workspace/coverage/default/3.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3126467474 May 21 12:48:24 PM PDT 24 May 21 12:48:33 PM PDT 24 890597370 ps
T898 /workspace/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.3177218995 May 21 12:49:24 PM PDT 24 May 21 12:49:33 PM PDT 24 31757297 ps
T899 /workspace/coverage/default/11.pwrmgr_wakeup.3501768773 May 21 12:48:43 PM PDT 24 May 21 12:48:51 PM PDT 24 576417513 ps
T900 /workspace/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.1509714311 May 21 12:49:47 PM PDT 24 May 21 12:49:52 PM PDT 24 141794239 ps
T901 /workspace/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3468414367 May 21 12:49:06 PM PDT 24 May 21 12:49:14 PM PDT 24 982781284 ps
T902 /workspace/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.3441330048 May 21 12:48:55 PM PDT 24 May 21 12:49:01 PM PDT 24 287189824 ps
T903 /workspace/coverage/default/45.pwrmgr_escalation_timeout.403369491 May 21 12:50:06 PM PDT 24 May 21 12:50:18 PM PDT 24 634532068 ps
T904 /workspace/coverage/default/44.pwrmgr_lowpower_wakeup_race.462176664 May 21 12:50:13 PM PDT 24 May 21 12:50:24 PM PDT 24 100223548 ps
T905 /workspace/coverage/default/36.pwrmgr_lowpower_invalid.3743706515 May 21 12:49:57 PM PDT 24 May 21 12:50:04 PM PDT 24 247617108 ps
T906 /workspace/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.3852854882 May 21 12:49:23 PM PDT 24 May 21 12:49:32 PM PDT 24 92090533 ps
T907 /workspace/coverage/default/10.pwrmgr_smoke.1657891413 May 21 12:48:37 PM PDT 24 May 21 12:48:45 PM PDT 24 33074598 ps
T908 /workspace/coverage/default/4.pwrmgr_lowpower_invalid.2763847212 May 21 12:48:26 PM PDT 24 May 21 12:48:34 PM PDT 24 94366620 ps
T909 /workspace/coverage/default/27.pwrmgr_stress_all.3281864805 May 21 12:49:21 PM PDT 24 May 21 12:49:31 PM PDT 24 194926842 ps
T910 /workspace/coverage/default/15.pwrmgr_reset.1683083942 May 21 12:48:54 PM PDT 24 May 21 12:48:59 PM PDT 24 25652993 ps
T911 /workspace/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2000297723 May 21 12:48:49 PM PDT 24 May 21 12:48:58 PM PDT 24 942150425 ps
T912 /workspace/coverage/default/29.pwrmgr_aborted_low_power.4129710691 May 21 12:49:27 PM PDT 24 May 21 12:49:35 PM PDT 24 32698971 ps
T913 /workspace/coverage/default/13.pwrmgr_stress_all_with_rand_reset.3102884455 May 21 12:48:57 PM PDT 24 May 21 12:49:25 PM PDT 24 30650539234 ps
T914 /workspace/coverage/default/10.pwrmgr_lowpower_wakeup_race.1746791760 May 21 12:48:41 PM PDT 24 May 21 12:48:49 PM PDT 24 344943898 ps
T915 /workspace/coverage/default/7.pwrmgr_glitch.1090351663 May 21 12:48:28 PM PDT 24 May 21 12:48:35 PM PDT 24 52890140 ps
T166 /workspace/coverage/default/12.pwrmgr_disable_rom_integrity_check.225028920 May 21 12:48:40 PM PDT 24 May 21 12:48:47 PM PDT 24 63086978 ps
T916 /workspace/coverage/default/25.pwrmgr_wakeup_reset.2643319364 May 21 12:49:20 PM PDT 24 May 21 12:49:29 PM PDT 24 132505935 ps
T917 /workspace/coverage/default/35.pwrmgr_global_esc.1007538937 May 21 12:49:42 PM PDT 24 May 21 12:49:48 PM PDT 24 57302044 ps
T918 /workspace/coverage/default/0.pwrmgr_global_esc.1146948396 May 21 12:48:16 PM PDT 24 May 21 12:48:20 PM PDT 24 28670778 ps
T919 /workspace/coverage/default/16.pwrmgr_aborted_low_power.159146316 May 21 12:49:01 PM PDT 24 May 21 12:49:07 PM PDT 24 65483366 ps
T920 /workspace/coverage/default/43.pwrmgr_wakeup.2943396675 May 21 12:50:09 PM PDT 24 May 21 12:50:20 PM PDT 24 84206647 ps
T921 /workspace/coverage/default/21.pwrmgr_wakeup.41323462 May 21 12:49:07 PM PDT 24 May 21 12:49:14 PM PDT 24 246270816 ps
T922 /workspace/coverage/default/3.pwrmgr_aborted_low_power.3542172907 May 21 12:48:14 PM PDT 24 May 21 12:48:17 PM PDT 24 29467085 ps
T923 /workspace/coverage/default/34.pwrmgr_smoke.2337526089 May 21 12:49:46 PM PDT 24 May 21 12:49:52 PM PDT 24 28020803 ps
T924 /workspace/coverage/default/47.pwrmgr_stress_all_with_rand_reset.1812630149 May 21 12:50:22 PM PDT 24 May 21 12:50:49 PM PDT 24 4525609726 ps
T925 /workspace/coverage/default/18.pwrmgr_stress_all.3673920953 May 21 12:49:00 PM PDT 24 May 21 12:49:07 PM PDT 24 498136734 ps
T926 /workspace/coverage/default/23.pwrmgr_glitch.1518057476 May 21 12:49:13 PM PDT 24 May 21 12:49:19 PM PDT 24 52559257 ps
T927 /workspace/coverage/default/49.pwrmgr_reset_invalid.342702244 May 21 12:50:17 PM PDT 24 May 21 12:50:28 PM PDT 24 105717753 ps
T928 /workspace/coverage/default/42.pwrmgr_stress_all.3642564243 May 21 12:50:07 PM PDT 24 May 21 12:50:25 PM PDT 24 1712596377 ps
T929 /workspace/coverage/default/25.pwrmgr_glitch.1445333508 May 21 12:49:17 PM PDT 24 May 21 12:49:24 PM PDT 24 151563952 ps
T930 /workspace/coverage/default/38.pwrmgr_wakeup.2474264164 May 21 12:50:10 PM PDT 24 May 21 12:50:21 PM PDT 24 265556441 ps
T931 /workspace/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3543936233 May 21 12:49:26 PM PDT 24 May 21 12:49:35 PM PDT 24 53808744 ps
T932 /workspace/coverage/default/4.pwrmgr_sec_cm_rstmgr_intersig_mubi.2819558248 May 21 12:48:27 PM PDT 24 May 21 12:48:34 PM PDT 24 68220731 ps
T933 /workspace/coverage/default/5.pwrmgr_stress_all.2256277893 May 21 12:48:24 PM PDT 24 May 21 12:48:33 PM PDT 24 256328261 ps
T934 /workspace/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1918935244 May 21 12:50:01 PM PDT 24 May 21 12:50:12 PM PDT 24 848726066 ps
T935 /workspace/coverage/default/7.pwrmgr_disable_rom_integrity_check.1454405279 May 21 12:48:33 PM PDT 24 May 21 12:48:41 PM PDT 24 98102089 ps
T936 /workspace/coverage/default/10.pwrmgr_stress_all_with_rand_reset.3178900014 May 21 12:48:44 PM PDT 24 May 21 12:49:18 PM PDT 24 8499236046 ps
T937 /workspace/coverage/default/5.pwrmgr_sec_cm_ctrl_config_regwen.4183176390 May 21 12:48:23 PM PDT 24 May 21 12:48:31 PM PDT 24 152328671 ps
T938 /workspace/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.4017064092 May 21 12:50:25 PM PDT 24 May 21 12:50:36 PM PDT 24 28203001 ps
T939 /workspace/coverage/default/20.pwrmgr_escalation_timeout.3204070604 May 21 12:49:03 PM PDT 24 May 21 12:49:10 PM PDT 24 607217491 ps
T150 /workspace/coverage/default/11.pwrmgr_stress_all_with_rand_reset.131897204 May 21 12:48:43 PM PDT 24 May 21 12:49:00 PM PDT 24 8016181484 ps
T940 /workspace/coverage/default/3.pwrmgr_wakeup.3568647676 May 21 12:48:15 PM PDT 24 May 21 12:48:19 PM PDT 24 96880845 ps
T941 /workspace/coverage/default/11.pwrmgr_stress_all.1811573965 May 21 12:48:44 PM PDT 24 May 21 12:48:52 PM PDT 24 463522751 ps
T942 /workspace/coverage/default/35.pwrmgr_disable_rom_integrity_check.3954907231 May 21 12:49:42 PM PDT 24 May 21 12:49:49 PM PDT 24 75501392 ps
T943 /workspace/coverage/default/36.pwrmgr_wakeup_reset.3819531253 May 21 12:49:47 PM PDT 24 May 21 12:49:52 PM PDT 24 51925201 ps
T944 /workspace/coverage/default/9.pwrmgr_stress_all.3644800156 May 21 12:48:36 PM PDT 24 May 21 12:48:49 PM PDT 24 4695088989 ps
T945 /workspace/coverage/default/31.pwrmgr_aborted_low_power.3194088634 May 21 12:49:40 PM PDT 24 May 21 12:49:47 PM PDT 24 38296804 ps
T946 /workspace/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.916452746 May 21 12:49:44 PM PDT 24 May 21 12:49:50 PM PDT 24 37312162 ps
T947 /workspace/coverage/default/8.pwrmgr_lowpower_wakeup_race.457196745 May 21 12:48:29 PM PDT 24 May 21 12:48:36 PM PDT 24 49585266 ps
T948 /workspace/coverage/default/1.pwrmgr_wakeup.2678570588 May 21 12:48:10 PM PDT 24 May 21 12:48:14 PM PDT 24 259869589 ps
T949 /workspace/coverage/default/18.pwrmgr_lowpower_invalid.2743200607 May 21 12:48:59 PM PDT 24 May 21 12:49:05 PM PDT 24 43853761 ps
T950 /workspace/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.880604897 May 21 12:50:27 PM PDT 24 May 21 12:50:38 PM PDT 24 130146468 ps
T951 /workspace/coverage/default/25.pwrmgr_escalation_timeout.1549113821 May 21 12:49:20 PM PDT 24 May 21 12:49:28 PM PDT 24 610889405 ps
T952 /workspace/coverage/default/15.pwrmgr_disable_rom_integrity_check.1859501723 May 21 12:48:49 PM PDT 24 May 21 12:48:56 PM PDT 24 69391669 ps
T953 /workspace/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1122729190 May 21 12:48:50 PM PDT 24 May 21 12:48:59 PM PDT 24 852596232 ps
T954 /workspace/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3520908877 May 21 12:49:23 PM PDT 24 May 21 12:49:34 PM PDT 24 884558843 ps
T955 /workspace/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1664515023 May 21 12:50:17 PM PDT 24 May 21 12:50:28 PM PDT 24 1050259696 ps
T956 /workspace/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.2404087169 May 21 12:49:19 PM PDT 24 May 21 12:49:26 PM PDT 24 28349688 ps
T957 /workspace/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3717987710 May 21 12:49:04 PM PDT 24 May 21 12:49:12 PM PDT 24 1278838782 ps
T958 /workspace/coverage/default/40.pwrmgr_glitch.4050346793 May 21 12:49:58 PM PDT 24 May 21 12:50:05 PM PDT 24 44227810 ps
T959 /workspace/coverage/default/47.pwrmgr_wakeup.3100878515 May 21 12:50:05 PM PDT 24 May 21 12:50:17 PM PDT 24 230475866 ps
T960 /workspace/coverage/default/34.pwrmgr_wakeup_reset.1650731850 May 21 12:49:57 PM PDT 24 May 21 12:50:06 PM PDT 24 312145906 ps
T961 /workspace/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.1256707555 May 21 12:49:38 PM PDT 24 May 21 12:49:45 PM PDT 24 38730117 ps
T962 /workspace/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.3517981594 May 21 12:49:05 PM PDT 24 May 21 12:49:12 PM PDT 24 86839685 ps
T963 /workspace/coverage/default/37.pwrmgr_escalation_timeout.3254943604 May 21 12:50:01 PM PDT 24 May 21 12:50:10 PM PDT 24 636147961 ps
T964 /workspace/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.3520056973 May 21 12:49:07 PM PDT 24 May 21 12:49:13 PM PDT 24 36493880 ps
T965 /workspace/coverage/default/30.pwrmgr_wakeup.3521794522 May 21 12:49:30 PM PDT 24 May 21 12:49:38 PM PDT 24 293117413 ps
T966 /workspace/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.704762676 May 21 12:49:47 PM PDT 24 May 21 12:49:53 PM PDT 24 38166377 ps
T967 /workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.1686640372 May 21 12:50:04 PM PDT 24 May 21 12:50:15 PM PDT 24 437508573 ps
T968 /workspace/coverage/default/42.pwrmgr_reset.581432323 May 21 12:50:07 PM PDT 24 May 21 12:50:19 PM PDT 24 84512761 ps
T969 /workspace/coverage/default/27.pwrmgr_wakeup_reset.1726335791 May 21 12:49:22 PM PDT 24 May 21 12:49:32 PM PDT 24 56902241 ps
T970 /workspace/coverage/default/34.pwrmgr_stress_all_with_rand_reset.1752064065 May 21 12:49:53 PM PDT 24 May 21 12:50:19 PM PDT 24 15876578967 ps
T971 /workspace/coverage/default/31.pwrmgr_reset.458842111 May 21 12:49:37 PM PDT 24 May 21 12:49:44 PM PDT 24 140408223 ps
T972 /workspace/coverage/default/16.pwrmgr_escalation_timeout.4068867942 May 21 12:49:07 PM PDT 24 May 21 12:49:14 PM PDT 24 610381992 ps
T973 /workspace/coverage/default/37.pwrmgr_lowpower_invalid.2347075363 May 21 12:49:46 PM PDT 24 May 21 12:49:51 PM PDT 24 49327502 ps
T974 /workspace/coverage/default/29.pwrmgr_wakeup_reset.686352764 May 21 12:49:33 PM PDT 24 May 21 12:49:45 PM PDT 24 78872542 ps
T975 /workspace/coverage/default/21.pwrmgr_stress_all_with_rand_reset.1658487857 May 21 12:49:10 PM PDT 24 May 21 12:49:46 PM PDT 24 16983192360 ps
T976 /workspace/coverage/default/11.pwrmgr_disable_rom_integrity_check.3141847773 May 21 12:48:54 PM PDT 24 May 21 12:49:00 PM PDT 24 68146284 ps
T977 /workspace/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1744825143 May 21 12:49:02 PM PDT 24 May 21 12:49:11 PM PDT 24 916892058 ps
T978 /workspace/coverage/default/19.pwrmgr_wakeup.721398330 May 21 12:49:06 PM PDT 24 May 21 12:49:13 PM PDT 24 247499440 ps
T979 /workspace/coverage/default/44.pwrmgr_global_esc.2480201868 May 21 12:50:07 PM PDT 24 May 21 12:50:18 PM PDT 24 49708319 ps
T980 /workspace/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2855846850 May 21 12:50:22 PM PDT 24 May 21 12:50:34 PM PDT 24 1270940982 ps
T981 /workspace/coverage/default/44.pwrmgr_glitch.1371302617 May 21 12:50:07 PM PDT 24 May 21 12:50:19 PM PDT 24 106772370 ps
T982 /workspace/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.653267357 May 21 12:48:15 PM PDT 24 May 21 12:48:21 PM PDT 24 1455260947 ps
T983 /workspace/coverage/default/23.pwrmgr_aborted_low_power.2022948402 May 21 12:49:15 PM PDT 24 May 21 12:49:21 PM PDT 24 19513861 ps
T984 /workspace/coverage/default/47.pwrmgr_aborted_low_power.1969018993 May 21 12:50:24 PM PDT 24 May 21 12:50:34 PM PDT 24 46528676 ps
T985 /workspace/coverage/default/37.pwrmgr_stress_all.3100123000 May 21 12:50:05 PM PDT 24 May 21 12:50:19 PM PDT 24 2368181831 ps
T986 /workspace/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.2892416065 May 21 12:49:58 PM PDT 24 May 21 12:50:06 PM PDT 24 31576580 ps
T27 /workspace/coverage/default/3.pwrmgr_sec_cm.1888437063 May 21 12:48:23 PM PDT 24 May 21 12:48:30 PM PDT 24 749165726 ps
T987 /workspace/coverage/default/16.pwrmgr_stress_all.2601080910 May 21 12:48:59 PM PDT 24 May 21 12:49:06 PM PDT 24 1839457846 ps
T988 /workspace/coverage/default/28.pwrmgr_reset.2720345057 May 21 12:49:22 PM PDT 24 May 21 12:49:32 PM PDT 24 77821248 ps
T989 /workspace/coverage/default/48.pwrmgr_global_esc.3996479238 May 21 12:50:20 PM PDT 24 May 21 12:50:30 PM PDT 24 31055461 ps
T990 /workspace/coverage/default/7.pwrmgr_lowpower_wakeup_race.2197208946 May 21 12:48:31 PM PDT 24 May 21 12:48:38 PM PDT 24 60032023 ps
T991 /workspace/coverage/default/4.pwrmgr_wakeup.4279671602 May 21 12:48:25 PM PDT 24 May 21 12:48:32 PM PDT 24 282052732 ps
T992 /workspace/coverage/default/31.pwrmgr_global_esc.1834760529 May 21 12:49:35 PM PDT 24 May 21 12:49:41 PM PDT 24 58972197 ps
T993 /workspace/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.479427094 May 21 12:48:26 PM PDT 24 May 21 12:48:34 PM PDT 24 74734284 ps
T994 /workspace/coverage/default/35.pwrmgr_stress_all.1177732220 May 21 12:49:58 PM PDT 24 May 21 12:50:10 PM PDT 24 1283819638 ps
T995 /workspace/coverage/default/10.pwrmgr_aborted_low_power.2043412511 May 21 12:48:36 PM PDT 24 May 21 12:48:44 PM PDT 24 74416926 ps
T996 /workspace/coverage/default/29.pwrmgr_smoke.2427931335 May 21 12:49:29 PM PDT 24 May 21 12:49:37 PM PDT 24 35693588 ps
T997 /workspace/coverage/default/28.pwrmgr_smoke.65302835 May 21 12:49:24 PM PDT 24 May 21 12:49:33 PM PDT 24 69809013 ps
T998 /workspace/coverage/default/0.pwrmgr_lowpower_wakeup_race.1511232531 May 21 12:48:08 PM PDT 24 May 21 12:48:12 PM PDT 24 159404186 ps
T999 /workspace/coverage/default/32.pwrmgr_glitch.3139078307 May 21 12:49:37 PM PDT 24 May 21 12:49:44 PM PDT 24 56131954 ps
T62 /workspace/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.65627956 May 21 01:55:22 PM PDT 24 May 21 01:55:25 PM PDT 24 56009114 ps
T63 /workspace/coverage/cover_reg_top/17.pwrmgr_intr_test.1434451333 May 21 01:55:40 PM PDT 24 May 21 01:55:43 PM PDT 24 25356416 ps
T64 /workspace/coverage/cover_reg_top/6.pwrmgr_intr_test.2882495950 May 21 01:55:18 PM PDT 24 May 21 01:55:19 PM PDT 24 19034612 ps
T67 /workspace/coverage/cover_reg_top/8.pwrmgr_csr_rw.2893976890 May 21 01:55:19 PM PDT 24 May 21 01:55:21 PM PDT 24 21925303 ps
T49 /workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.2145959796 May 21 01:55:30 PM PDT 24 May 21 01:55:33 PM PDT 24 247171481 ps
T52 /workspace/coverage/cover_reg_top/16.pwrmgr_tl_intg_err.3546052791 May 21 01:55:42 PM PDT 24 May 21 01:55:48 PM PDT 24 194009716 ps
T65 /workspace/coverage/cover_reg_top/8.pwrmgr_intr_test.2954799517 May 21 01:55:20 PM PDT 24 May 21 01:55:21 PM PDT 24 134611410 ps
T170 /workspace/coverage/cover_reg_top/47.pwrmgr_intr_test.1036127184 May 21 01:55:49 PM PDT 24 May 21 01:55:54 PM PDT 24 39055386 ps
T59 /workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.585138832 May 21 01:55:06 PM PDT 24 May 21 01:55:09 PM PDT 24 145856068 ps
T60 /workspace/coverage/cover_reg_top/10.pwrmgr_same_csr_outstanding.2637619606 May 21 01:55:27 PM PDT 24 May 21 01:55:29 PM PDT 24 27083329 ps
T53 /workspace/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.3202306891 May 21 01:55:42 PM PDT 24 May 21 01:55:48 PM PDT 24 94352135 ps
T54 /workspace/coverage/cover_reg_top/9.pwrmgr_tl_errors.1332713216 May 21 01:55:26 PM PDT 24 May 21 01:55:29 PM PDT 24 56966712 ps
T55 /workspace/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.1174304866 May 21 01:54:55 PM PDT 24 May 21 01:54:57 PM PDT 24 153896332 ps
T1000 /workspace/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.3378218104 May 21 01:54:55 PM PDT 24 May 21 01:54:57 PM PDT 24 34100833 ps
T61 /workspace/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.3279500004 May 21 01:55:33 PM PDT 24 May 21 01:55:36 PM PDT 24 433483815 ps
T171 /workspace/coverage/cover_reg_top/3.pwrmgr_intr_test.1485234746 May 21 01:55:07 PM PDT 24 May 21 01:55:09 PM PDT 24 21344420 ps
T56 /workspace/coverage/cover_reg_top/10.pwrmgr_tl_intg_err.576461408 May 21 01:55:32 PM PDT 24 May 21 01:55:34 PM PDT 24 116212985 ps
T1001 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.556714284 May 21 01:55:03 PM PDT 24 May 21 01:55:04 PM PDT 24 24622498 ps
T130 /workspace/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.1567352556 May 21 01:55:19 PM PDT 24 May 21 01:55:21 PM PDT 24 30789682 ps
T1002 /workspace/coverage/cover_reg_top/26.pwrmgr_intr_test.3635470791 May 21 01:55:47 PM PDT 24 May 21 01:55:52 PM PDT 24 21488159 ps
T1003 /workspace/coverage/cover_reg_top/2.pwrmgr_intr_test.566232057 May 21 01:55:00 PM PDT 24 May 21 01:55:02 PM PDT 24 42387111 ps
T1004 /workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.3455951442 May 21 01:55:50 PM PDT 24 May 21 01:55:54 PM PDT 24 91886407 ps
T1005 /workspace/coverage/cover_reg_top/5.pwrmgr_intr_test.3533465765 May 21 01:55:16 PM PDT 24 May 21 01:55:17 PM PDT 24 32381706 ps
T66 /workspace/coverage/cover_reg_top/2.pwrmgr_tl_errors.2990853515 May 21 01:55:02 PM PDT 24 May 21 01:55:05 PM PDT 24 168275383 ps
T1006 /workspace/coverage/cover_reg_top/32.pwrmgr_intr_test.4075654438 May 21 01:55:49 PM PDT 24 May 21 01:55:54 PM PDT 24 19746474 ps
T1007 /workspace/coverage/cover_reg_top/38.pwrmgr_intr_test.2799246700 May 21 01:55:47 PM PDT 24 May 21 01:55:52 PM PDT 24 44447129 ps
T131 /workspace/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.101679113 May 21 01:55:33 PM PDT 24 May 21 01:55:35 PM PDT 24 57691938 ps
T172 /workspace/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.3295756653 May 21 01:55:40 PM PDT 24 May 21 01:55:46 PM PDT 24 169830364 ps
T132 /workspace/coverage/cover_reg_top/18.pwrmgr_csr_rw.1783397562 May 21 01:55:41 PM PDT 24 May 21 01:55:46 PM PDT 24 44041357 ps
T133 /workspace/coverage/cover_reg_top/12.pwrmgr_same_csr_outstanding.3955442584 May 21 01:55:34 PM PDT 24 May 21 01:55:36 PM PDT 24 166664293 ps
T1008 /workspace/coverage/cover_reg_top/14.pwrmgr_intr_test.3742362707 May 21 01:55:34 PM PDT 24 May 21 01:55:37 PM PDT 24 22470307 ps
T117 /workspace/coverage/cover_reg_top/3.pwrmgr_csr_rw.1181900087 May 21 01:55:13 PM PDT 24 May 21 01:55:14 PM PDT 24 28077631 ps
T173 /workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.2682679329 May 21 01:55:41 PM PDT 24 May 21 01:55:47 PM PDT 24 57690253 ps
T1009 /workspace/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.351722697 May 21 01:55:04 PM PDT 24 May 21 01:55:08 PM PDT 24 225859216 ps
T1010 /workspace/coverage/cover_reg_top/39.pwrmgr_intr_test.1698428197 May 21 01:55:49 PM PDT 24 May 21 01:55:54 PM PDT 24 47795422 ps
T163 /workspace/coverage/cover_reg_top/6.pwrmgr_tl_intg_err.490234034 May 21 01:55:15 PM PDT 24 May 21 01:55:17 PM PDT 24 345444726 ps
T1011 /workspace/coverage/cover_reg_top/16.pwrmgr_intr_test.4099339011 May 21 01:55:42 PM PDT 24 May 21 01:55:47 PM PDT 24 20711355 ps
T1012 /workspace/coverage/cover_reg_top/9.pwrmgr_csr_mem_rw_with_rand_reset.1784845558 May 21 01:55:29 PM PDT 24 May 21 01:55:30 PM PDT 24 53424947 ps
T134 /workspace/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.233171155 May 21 01:55:33 PM PDT 24 May 21 01:55:35 PM PDT 24 33187384 ps
T1013 /workspace/coverage/cover_reg_top/18.pwrmgr_intr_test.3123752830 May 21 01:55:46 PM PDT 24 May 21 01:55:51 PM PDT 24 19623050 ps
T1014 /workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.2110145735 May 21 01:55:16 PM PDT 24 May 21 01:55:18 PM PDT 24 553216745 ps
T1015 /workspace/coverage/cover_reg_top/13.pwrmgr_intr_test.2545950692 May 21 01:55:36 PM PDT 24 May 21 01:55:38 PM PDT 24 35820842 ps
T135 /workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.984634464 May 21 01:55:21 PM PDT 24 May 21 01:55:23 PM PDT 24 102937098 ps
T136 /workspace/coverage/cover_reg_top/12.pwrmgr_csr_rw.4111777435 May 21 01:55:32 PM PDT 24 May 21 01:55:34 PM PDT 24 41635509 ps
T1016 /workspace/coverage/cover_reg_top/15.pwrmgr_csr_mem_rw_with_rand_reset.855571021 May 21 01:55:41 PM PDT 24 May 21 01:55:47 PM PDT 24 61701796 ps
T118 /workspace/coverage/cover_reg_top/9.pwrmgr_csr_rw.2112027933 May 21 01:55:28 PM PDT 24 May 21 01:55:29 PM PDT 24 24629163 ps
T68 /workspace/coverage/cover_reg_top/14.pwrmgr_tl_errors.3647216662 May 21 01:55:33 PM PDT 24 May 21 01:55:37 PM PDT 24 87876188 ps
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