Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.44 96.00 96.37 100.00 99.02


Total test records in report: 1118
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html
T806 /workspace/coverage/default/32.pwrmgr_glitch.1001856329 May 28 02:59:25 PM PDT 24 May 28 02:59:34 PM PDT 24 52315306 ps
T807 /workspace/coverage/default/10.pwrmgr_aborted_low_power.1284738969 May 28 02:58:15 PM PDT 24 May 28 02:58:38 PM PDT 24 24523847 ps
T808 /workspace/coverage/default/49.pwrmgr_glitch.3111597388 May 28 03:00:16 PM PDT 24 May 28 03:00:25 PM PDT 24 56994790 ps
T809 /workspace/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.2577436084 May 28 03:00:03 PM PDT 24 May 28 03:00:09 PM PDT 24 35642992 ps
T810 /workspace/coverage/default/31.pwrmgr_glitch.1488933021 May 28 02:59:20 PM PDT 24 May 28 02:59:30 PM PDT 24 56964103 ps
T811 /workspace/coverage/default/20.pwrmgr_lowpower_invalid.2754163310 May 28 02:58:44 PM PDT 24 May 28 02:59:02 PM PDT 24 131252022 ps
T812 /workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.3822490825 May 28 02:59:30 PM PDT 24 May 28 02:59:39 PM PDT 24 206322653 ps
T813 /workspace/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.4073219509 May 28 02:59:42 PM PDT 24 May 28 02:59:49 PM PDT 24 29440045 ps
T814 /workspace/coverage/default/16.pwrmgr_aborted_low_power.200107467 May 28 02:58:48 PM PDT 24 May 28 02:59:06 PM PDT 24 35468338 ps
T815 /workspace/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.1042279078 May 28 03:00:11 PM PDT 24 May 28 03:00:16 PM PDT 24 29418441 ps
T816 /workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.305308614 May 28 03:00:03 PM PDT 24 May 28 03:00:09 PM PDT 24 43270907 ps
T817 /workspace/coverage/default/34.pwrmgr_stress_all.530012059 May 28 03:00:38 PM PDT 24 May 28 03:00:53 PM PDT 24 1842871152 ps
T818 /workspace/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.2783158506 May 28 02:58:57 PM PDT 24 May 28 02:59:12 PM PDT 24 328285683 ps
T819 /workspace/coverage/default/11.pwrmgr_smoke.2690591185 May 28 02:58:13 PM PDT 24 May 28 02:58:35 PM PDT 24 65945123 ps
T820 /workspace/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.2635304030 May 28 02:59:12 PM PDT 24 May 28 02:59:23 PM PDT 24 41872833 ps
T821 /workspace/coverage/default/38.pwrmgr_smoke.1676238214 May 28 02:59:37 PM PDT 24 May 28 02:59:45 PM PDT 24 101895328 ps
T822 /workspace/coverage/default/32.pwrmgr_wakeup.1687457095 May 28 02:59:22 PM PDT 24 May 28 02:59:31 PM PDT 24 371943749 ps
T823 /workspace/coverage/default/17.pwrmgr_reset.755279542 May 28 02:58:26 PM PDT 24 May 28 02:58:47 PM PDT 24 64517670 ps
T824 /workspace/coverage/default/26.pwrmgr_reset.3497806392 May 28 02:58:58 PM PDT 24 May 28 02:59:12 PM PDT 24 401748715 ps
T825 /workspace/coverage/default/0.pwrmgr_lowpower_wakeup_race.3749431518 May 28 02:57:51 PM PDT 24 May 28 02:57:56 PM PDT 24 256613633 ps
T826 /workspace/coverage/default/12.pwrmgr_reset_invalid.1260273603 May 28 02:58:23 PM PDT 24 May 28 02:58:44 PM PDT 24 148216172 ps
T827 /workspace/coverage/default/49.pwrmgr_reset.2555074144 May 28 03:00:18 PM PDT 24 May 28 03:00:28 PM PDT 24 58431403 ps
T828 /workspace/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1178885271 May 28 02:58:09 PM PDT 24 May 28 02:58:29 PM PDT 24 878881402 ps
T829 /workspace/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3460273840 May 28 02:59:54 PM PDT 24 May 28 03:00:00 PM PDT 24 892847330 ps
T830 /workspace/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.806906687 May 28 02:57:51 PM PDT 24 May 28 02:57:55 PM PDT 24 32155030 ps
T831 /workspace/coverage/default/36.pwrmgr_escalation_timeout.4224852044 May 28 02:59:32 PM PDT 24 May 28 02:59:42 PM PDT 24 229521980 ps
T832 /workspace/coverage/default/30.pwrmgr_stress_all.301870954 May 28 02:59:22 PM PDT 24 May 28 02:59:31 PM PDT 24 82346123 ps
T833 /workspace/coverage/default/8.pwrmgr_global_esc.2257110757 May 28 02:58:09 PM PDT 24 May 28 02:58:28 PM PDT 24 29302740 ps
T834 /workspace/coverage/default/3.pwrmgr_escalation_timeout.3327050153 May 28 02:57:52 PM PDT 24 May 28 02:57:59 PM PDT 24 212574141 ps
T835 /workspace/coverage/default/17.pwrmgr_lowpower_wakeup_race.1763628481 May 28 02:58:38 PM PDT 24 May 28 02:58:57 PM PDT 24 203954423 ps
T836 /workspace/coverage/default/30.pwrmgr_aborted_low_power.1793613000 May 28 02:59:18 PM PDT 24 May 28 02:59:28 PM PDT 24 50637012 ps
T837 /workspace/coverage/default/33.pwrmgr_wakeup.78779416 May 28 02:59:30 PM PDT 24 May 28 02:59:40 PM PDT 24 142443769 ps
T133 /workspace/coverage/default/13.pwrmgr_stress_all_with_rand_reset.3366167476 May 28 02:58:38 PM PDT 24 May 28 02:59:11 PM PDT 24 4352497741 ps
T76 /workspace/coverage/default/27.pwrmgr_stress_all_with_rand_reset.2714428512 May 28 02:59:13 PM PDT 24 May 28 02:59:37 PM PDT 24 7500740394 ps
T838 /workspace/coverage/default/19.pwrmgr_reset.1403987848 May 28 02:58:37 PM PDT 24 May 28 02:58:56 PM PDT 24 54082033 ps
T839 /workspace/coverage/default/3.pwrmgr_glitch.1486225711 May 28 02:57:56 PM PDT 24 May 28 02:58:08 PM PDT 24 47603216 ps
T840 /workspace/coverage/default/31.pwrmgr_disable_rom_integrity_check.3510631520 May 28 02:59:26 PM PDT 24 May 28 02:59:35 PM PDT 24 50849577 ps
T841 /workspace/coverage/default/39.pwrmgr_stress_all.1942450650 May 28 02:59:42 PM PDT 24 May 28 02:59:50 PM PDT 24 1034501941 ps
T842 /workspace/coverage/default/34.pwrmgr_lowpower_wakeup_race.1860608937 May 28 02:59:26 PM PDT 24 May 28 02:59:35 PM PDT 24 118331144 ps
T843 /workspace/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1729612595 May 28 03:00:09 PM PDT 24 May 28 03:00:16 PM PDT 24 774941901 ps
T844 /workspace/coverage/default/5.pwrmgr_reset_invalid.1683015547 May 28 02:58:04 PM PDT 24 May 28 02:58:20 PM PDT 24 107070665 ps
T845 /workspace/coverage/default/1.pwrmgr_reset_invalid.2774803566 May 28 02:57:53 PM PDT 24 May 28 02:58:01 PM PDT 24 108798389 ps
T846 /workspace/coverage/default/23.pwrmgr_wakeup.1975005805 May 28 02:58:50 PM PDT 24 May 28 02:59:07 PM PDT 24 186263521 ps
T847 /workspace/coverage/default/21.pwrmgr_global_esc.1703366633 May 28 02:58:48 PM PDT 24 May 28 02:59:05 PM PDT 24 80316342 ps
T848 /workspace/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3971629222 May 28 02:59:59 PM PDT 24 May 28 03:00:05 PM PDT 24 805733062 ps
T849 /workspace/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.3185285170 May 28 02:58:55 PM PDT 24 May 28 02:59:09 PM PDT 24 37006707 ps
T850 /workspace/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3065468162 May 28 02:58:22 PM PDT 24 May 28 02:58:46 PM PDT 24 851255488 ps
T851 /workspace/coverage/default/6.pwrmgr_aborted_low_power.2363472800 May 28 02:58:02 PM PDT 24 May 28 02:58:15 PM PDT 24 39269652 ps
T852 /workspace/coverage/default/0.pwrmgr_escalation_timeout.4109624620 May 28 02:57:55 PM PDT 24 May 28 02:58:04 PM PDT 24 313109740 ps
T853 /workspace/coverage/default/6.pwrmgr_wakeup.3433851473 May 28 02:58:05 PM PDT 24 May 28 02:58:22 PM PDT 24 56947826 ps
T854 /workspace/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4135659218 May 28 02:59:59 PM PDT 24 May 28 03:00:05 PM PDT 24 1168934359 ps
T855 /workspace/coverage/default/0.pwrmgr_smoke.3024510381 May 28 02:57:49 PM PDT 24 May 28 02:57:51 PM PDT 24 59978518 ps
T856 /workspace/coverage/default/37.pwrmgr_wakeup_reset.3710978409 May 28 02:59:38 PM PDT 24 May 28 02:59:46 PM PDT 24 172364017 ps
T857 /workspace/coverage/default/16.pwrmgr_lowpower_invalid.2958268669 May 28 02:58:38 PM PDT 24 May 28 02:58:57 PM PDT 24 79689437 ps
T858 /workspace/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.711177006 May 28 02:59:13 PM PDT 24 May 28 02:59:25 PM PDT 24 927785254 ps
T859 /workspace/coverage/default/43.pwrmgr_wakeup_reset.2653810847 May 28 02:59:59 PM PDT 24 May 28 03:00:04 PM PDT 24 126211491 ps
T860 /workspace/coverage/default/7.pwrmgr_global_esc.52992073 May 28 02:58:06 PM PDT 24 May 28 02:58:23 PM PDT 24 52344263 ps
T861 /workspace/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.1715376464 May 28 02:58:07 PM PDT 24 May 28 02:58:24 PM PDT 24 87832559 ps
T862 /workspace/coverage/default/3.pwrmgr_wakeup.1076499243 May 28 02:57:54 PM PDT 24 May 28 02:58:04 PM PDT 24 219682455 ps
T863 /workspace/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1621682631 May 28 02:58:58 PM PDT 24 May 28 02:59:14 PM PDT 24 1186760033 ps
T864 /workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2253942008 May 28 02:57:54 PM PDT 24 May 28 02:58:04 PM PDT 24 1117360931 ps
T77 /workspace/coverage/default/45.pwrmgr_stress_all_with_rand_reset.594624553 May 28 03:00:01 PM PDT 24 May 28 03:00:19 PM PDT 24 3188652454 ps
T865 /workspace/coverage/default/31.pwrmgr_reset.3052453501 May 28 02:59:20 PM PDT 24 May 28 02:59:30 PM PDT 24 44439898 ps
T866 /workspace/coverage/default/28.pwrmgr_escalation_timeout.843585614 May 28 02:59:08 PM PDT 24 May 28 02:59:20 PM PDT 24 309129822 ps
T867 /workspace/coverage/default/16.pwrmgr_reset.1975948811 May 28 02:58:38 PM PDT 24 May 28 02:58:57 PM PDT 24 219822023 ps
T868 /workspace/coverage/default/11.pwrmgr_aborted_low_power.123030786 May 28 02:58:03 PM PDT 24 May 28 02:58:18 PM PDT 24 48660936 ps
T869 /workspace/coverage/default/2.pwrmgr_reset.3037220831 May 28 02:57:56 PM PDT 24 May 28 02:58:06 PM PDT 24 93270987 ps
T870 /workspace/coverage/default/33.pwrmgr_reset.1718175110 May 28 02:59:20 PM PDT 24 May 28 02:59:31 PM PDT 24 117697214 ps
T871 /workspace/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.2880541674 May 28 02:59:45 PM PDT 24 May 28 02:59:51 PM PDT 24 38256974 ps
T872 /workspace/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.978605178 May 28 02:58:08 PM PDT 24 May 28 02:58:27 PM PDT 24 39448893 ps
T24 /workspace/coverage/default/3.pwrmgr_sec_cm.494928179 May 28 02:57:52 PM PDT 24 May 28 02:58:00 PM PDT 24 776067861 ps
T873 /workspace/coverage/default/48.pwrmgr_glitch.1815083768 May 28 03:00:18 PM PDT 24 May 28 03:00:28 PM PDT 24 45275198 ps
T874 /workspace/coverage/default/14.pwrmgr_global_esc.679903624 May 28 02:58:21 PM PDT 24 May 28 02:58:44 PM PDT 24 51410639 ps
T875 /workspace/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.3116856419 May 28 02:59:15 PM PDT 24 May 28 02:59:26 PM PDT 24 62207709 ps
T876 /workspace/coverage/default/15.pwrmgr_aborted_low_power.706300166 May 28 02:58:17 PM PDT 24 May 28 02:58:40 PM PDT 24 29647987 ps
T877 /workspace/coverage/default/23.pwrmgr_stress_all.764305820 May 28 02:58:51 PM PDT 24 May 28 02:59:09 PM PDT 24 671626048 ps
T878 /workspace/coverage/default/38.pwrmgr_wakeup_reset.2120347413 May 28 02:59:52 PM PDT 24 May 28 02:59:56 PM PDT 24 380843744 ps
T879 /workspace/coverage/default/35.pwrmgr_global_esc.2561926616 May 28 02:59:29 PM PDT 24 May 28 02:59:38 PM PDT 24 43803951 ps
T880 /workspace/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3321207815 May 28 02:58:16 PM PDT 24 May 28 02:58:41 PM PDT 24 937397045 ps
T881 /workspace/coverage/default/2.pwrmgr_smoke.1707703651 May 28 02:57:56 PM PDT 24 May 28 02:58:07 PM PDT 24 44019878 ps
T882 /workspace/coverage/default/46.pwrmgr_global_esc.4129814453 May 28 03:00:08 PM PDT 24 May 28 03:00:13 PM PDT 24 268710284 ps
T883 /workspace/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.2549280772 May 28 02:58:22 PM PDT 24 May 28 02:58:45 PM PDT 24 65682624 ps
T884 /workspace/coverage/default/18.pwrmgr_lowpower_invalid.356261861 May 28 02:58:38 PM PDT 24 May 28 02:58:57 PM PDT 24 188312039 ps
T885 /workspace/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3231864067 May 28 02:58:45 PM PDT 24 May 28 02:59:06 PM PDT 24 797392101 ps
T886 /workspace/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.1745701635 May 28 02:59:32 PM PDT 24 May 28 02:59:42 PM PDT 24 29914771 ps
T887 /workspace/coverage/default/19.pwrmgr_global_esc.1306430834 May 28 02:58:44 PM PDT 24 May 28 02:59:02 PM PDT 24 41046005 ps
T888 /workspace/coverage/default/23.pwrmgr_global_esc.1069970589 May 28 02:58:54 PM PDT 24 May 28 02:59:09 PM PDT 24 85688816 ps
T889 /workspace/coverage/default/29.pwrmgr_smoke.3888860928 May 28 02:59:13 PM PDT 24 May 28 02:59:24 PM PDT 24 42038728 ps
T890 /workspace/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2933281639 May 28 02:59:18 PM PDT 24 May 28 02:59:29 PM PDT 24 1725168846 ps
T891 /workspace/coverage/default/45.pwrmgr_wakeup.1703540972 May 28 02:59:58 PM PDT 24 May 28 03:00:03 PM PDT 24 227276618 ps
T892 /workspace/coverage/default/38.pwrmgr_stress_all_with_rand_reset.1555566902 May 28 02:59:54 PM PDT 24 May 28 03:00:15 PM PDT 24 5280794172 ps
T893 /workspace/coverage/default/28.pwrmgr_glitch.671032508 May 28 02:59:13 PM PDT 24 May 28 02:59:24 PM PDT 24 40594943 ps
T894 /workspace/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.3246187638 May 28 02:59:45 PM PDT 24 May 28 02:59:50 PM PDT 24 37870948 ps
T895 /workspace/coverage/default/4.pwrmgr_smoke.1466607397 May 28 02:57:51 PM PDT 24 May 28 02:57:56 PM PDT 24 36741295 ps
T896 /workspace/coverage/default/16.pwrmgr_stress_all.252006711 May 28 02:58:35 PM PDT 24 May 28 02:58:59 PM PDT 24 3000244470 ps
T897 /workspace/coverage/default/5.pwrmgr_stress_all_with_rand_reset.185930184 May 28 02:58:01 PM PDT 24 May 28 02:58:29 PM PDT 24 4860899621 ps
T898 /workspace/coverage/default/36.pwrmgr_reset_invalid.3142745784 May 28 02:59:38 PM PDT 24 May 28 02:59:46 PM PDT 24 188334626 ps
T899 /workspace/coverage/default/40.pwrmgr_lowpower_invalid.2181570804 May 28 02:59:40 PM PDT 24 May 28 02:59:47 PM PDT 24 67966456 ps
T900 /workspace/coverage/default/37.pwrmgr_stress_all.1756427101 May 28 02:59:31 PM PDT 24 May 28 02:59:41 PM PDT 24 1547829846 ps
T901 /workspace/coverage/default/27.pwrmgr_reset_invalid.1418577648 May 28 02:59:07 PM PDT 24 May 28 02:59:19 PM PDT 24 167574087 ps
T902 /workspace/coverage/default/0.pwrmgr_global_esc.4192624141 May 28 02:57:57 PM PDT 24 May 28 02:58:08 PM PDT 24 72954232 ps
T903 /workspace/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2492942229 May 28 03:00:18 PM PDT 24 May 28 03:00:30 PM PDT 24 1323359093 ps
T904 /workspace/coverage/default/4.pwrmgr_escalation_timeout.741960102 May 28 02:58:00 PM PDT 24 May 28 02:58:13 PM PDT 24 1375424918 ps
T905 /workspace/coverage/default/30.pwrmgr_wakeup.1228417171 May 28 02:59:22 PM PDT 24 May 28 02:59:32 PM PDT 24 275635645 ps
T906 /workspace/coverage/default/31.pwrmgr_wakeup_reset.1502504696 May 28 02:59:26 PM PDT 24 May 28 02:59:36 PM PDT 24 281963886 ps
T907 /workspace/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3381219811 May 28 02:57:56 PM PDT 24 May 28 02:58:09 PM PDT 24 912868725 ps
T908 /workspace/coverage/default/13.pwrmgr_lowpower_invalid.3378699426 May 28 02:58:14 PM PDT 24 May 28 02:58:36 PM PDT 24 44886392 ps
T909 /workspace/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.1995681881 May 28 02:59:05 PM PDT 24 May 28 02:59:17 PM PDT 24 30199375 ps
T910 /workspace/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.3415511241 May 28 02:58:38 PM PDT 24 May 28 02:58:57 PM PDT 24 66974376 ps
T911 /workspace/coverage/default/16.pwrmgr_wakeup.2423016511 May 28 02:58:25 PM PDT 24 May 28 02:58:46 PM PDT 24 167068498 ps
T912 /workspace/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.758561163 May 28 02:58:14 PM PDT 24 May 28 02:58:35 PM PDT 24 32559592 ps
T913 /workspace/coverage/default/8.pwrmgr_aborted_low_power.1757363009 May 28 02:58:17 PM PDT 24 May 28 02:58:40 PM PDT 24 19069429 ps
T914 /workspace/coverage/default/35.pwrmgr_wakeup.2818098760 May 28 03:00:23 PM PDT 24 May 28 03:00:34 PM PDT 24 347116816 ps
T78 /workspace/coverage/default/8.pwrmgr_stress_all_with_rand_reset.2872898221 May 28 02:58:09 PM PDT 24 May 28 02:58:47 PM PDT 24 15248705278 ps
T915 /workspace/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.3248559506 May 28 02:59:31 PM PDT 24 May 28 02:59:40 PM PDT 24 53190831 ps
T916 /workspace/coverage/default/2.pwrmgr_escalation_timeout.4215402515 May 28 02:57:56 PM PDT 24 May 28 02:58:08 PM PDT 24 567707310 ps
T917 /workspace/coverage/default/13.pwrmgr_wakeup_reset.2367308320 May 28 02:58:12 PM PDT 24 May 28 02:58:32 PM PDT 24 69831814 ps
T918 /workspace/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.613972180 May 28 02:59:29 PM PDT 24 May 28 02:59:40 PM PDT 24 1162099942 ps
T919 /workspace/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1446097970 May 28 02:58:56 PM PDT 24 May 28 02:59:13 PM PDT 24 825127628 ps
T920 /workspace/coverage/default/2.pwrmgr_stress_all_with_rand_reset.1250988606 May 28 02:57:58 PM PDT 24 May 28 02:58:16 PM PDT 24 4190880908 ps
T921 /workspace/coverage/default/23.pwrmgr_reset_invalid.3127446272 May 28 02:58:48 PM PDT 24 May 28 02:59:05 PM PDT 24 283323860 ps
T922 /workspace/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.823424364 May 28 02:59:34 PM PDT 24 May 28 02:59:42 PM PDT 24 29069888 ps
T923 /workspace/coverage/default/10.pwrmgr_lowpower_invalid.933746683 May 28 02:58:07 PM PDT 24 May 28 02:58:24 PM PDT 24 135248589 ps
T924 /workspace/coverage/default/12.pwrmgr_stress_all.1912789308 May 28 02:58:16 PM PDT 24 May 28 02:58:44 PM PDT 24 2329282000 ps
T925 /workspace/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.647910295 May 28 02:59:23 PM PDT 24 May 28 02:59:32 PM PDT 24 157089067 ps
T64 /workspace/coverage/default/12.pwrmgr_stress_all_with_rand_reset.937984031 May 28 02:58:15 PM PDT 24 May 28 02:58:55 PM PDT 24 7906559814 ps
T926 /workspace/coverage/default/42.pwrmgr_reset_invalid.3021756692 May 28 03:00:03 PM PDT 24 May 28 03:00:09 PM PDT 24 142084939 ps
T927 /workspace/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.4210667746 May 28 02:57:55 PM PDT 24 May 28 02:58:05 PM PDT 24 106439114 ps
T928 /workspace/coverage/default/11.pwrmgr_reset.2087859613 May 28 02:58:12 PM PDT 24 May 28 02:58:33 PM PDT 24 31656093 ps
T929 /workspace/coverage/default/0.pwrmgr_reset.1340447725 May 28 02:57:53 PM PDT 24 May 28 02:58:01 PM PDT 24 69742348 ps
T930 /workspace/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.62835639 May 28 02:59:59 PM PDT 24 May 28 03:00:05 PM PDT 24 799592608 ps
T931 /workspace/coverage/default/49.pwrmgr_escalation_timeout.1726705947 May 28 03:00:14 PM PDT 24 May 28 03:00:22 PM PDT 24 165996703 ps
T932 /workspace/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.3450975427 May 28 03:00:17 PM PDT 24 May 28 03:00:28 PM PDT 24 86207425 ps
T933 /workspace/coverage/default/27.pwrmgr_wakeup_reset.3057920768 May 28 02:59:16 PM PDT 24 May 28 02:59:28 PM PDT 24 497929321 ps
T934 /workspace/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.747172322 May 28 02:58:55 PM PDT 24 May 28 02:59:10 PM PDT 24 39256530 ps
T935 /workspace/coverage/default/9.pwrmgr_aborted_low_power.2722800094 May 28 02:58:05 PM PDT 24 May 28 02:58:21 PM PDT 24 40533192 ps
T936 /workspace/coverage/default/22.pwrmgr_lowpower_invalid.4226855505 May 28 02:58:54 PM PDT 24 May 28 02:59:09 PM PDT 24 48205320 ps
T937 /workspace/coverage/default/9.pwrmgr_reset_invalid.2088367813 May 28 02:58:04 PM PDT 24 May 28 02:58:20 PM PDT 24 102191489 ps
T938 /workspace/coverage/default/47.pwrmgr_lowpower_wakeup_race.2210550282 May 28 03:00:42 PM PDT 24 May 28 03:00:59 PM PDT 24 98791154 ps
T939 /workspace/coverage/default/11.pwrmgr_sec_cm_ctrl_config_regwen.587887215 May 28 02:58:13 PM PDT 24 May 28 02:58:34 PM PDT 24 133056582 ps
T940 /workspace/coverage/default/9.pwrmgr_escalation_timeout.2935710352 May 28 02:58:03 PM PDT 24 May 28 02:58:17 PM PDT 24 407901867 ps
T941 /workspace/coverage/default/27.pwrmgr_disable_rom_integrity_check.4088836622 May 28 02:59:13 PM PDT 24 May 28 02:59:23 PM PDT 24 54679355 ps
T942 /workspace/coverage/default/45.pwrmgr_escalation_timeout.3908525769 May 28 03:00:00 PM PDT 24 May 28 03:00:06 PM PDT 24 165367317 ps
T943 /workspace/coverage/default/46.pwrmgr_smoke.1021774689 May 28 02:59:59 PM PDT 24 May 28 03:00:04 PM PDT 24 38577292 ps
T944 /workspace/coverage/default/19.pwrmgr_stress_all.3092559960 May 28 02:58:39 PM PDT 24 May 28 02:59:00 PM PDT 24 564934251 ps
T945 /workspace/coverage/default/22.pwrmgr_reset.2886593233 May 28 02:58:49 PM PDT 24 May 28 02:59:06 PM PDT 24 26335093 ps
T946 /workspace/coverage/default/24.pwrmgr_global_esc.2607141781 May 28 02:59:00 PM PDT 24 May 28 02:59:14 PM PDT 24 45006586 ps
T947 /workspace/coverage/default/23.pwrmgr_smoke.1169211126 May 28 02:58:52 PM PDT 24 May 28 02:59:08 PM PDT 24 63506500 ps
T948 /workspace/coverage/default/33.pwrmgr_lowpower_invalid.1025014518 May 28 02:59:31 PM PDT 24 May 28 02:59:40 PM PDT 24 49606951 ps
T949 /workspace/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.3743693274 May 28 02:59:58 PM PDT 24 May 28 03:00:02 PM PDT 24 454845412 ps
T950 /workspace/coverage/default/30.pwrmgr_escalation_timeout.505110259 May 28 02:59:24 PM PDT 24 May 28 02:59:33 PM PDT 24 545726388 ps
T951 /workspace/coverage/default/25.pwrmgr_glitch.1164132481 May 28 02:58:59 PM PDT 24 May 28 02:59:13 PM PDT 24 78384167 ps
T952 /workspace/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.1344914004 May 28 02:59:41 PM PDT 24 May 28 02:59:48 PM PDT 24 73502475 ps
T953 /workspace/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.3403911036 May 28 02:58:52 PM PDT 24 May 28 02:59:09 PM PDT 24 76074890 ps
T954 /workspace/coverage/default/38.pwrmgr_stress_all.2389768674 May 28 02:59:46 PM PDT 24 May 28 02:59:58 PM PDT 24 1964524783 ps
T79 /workspace/coverage/default/7.pwrmgr_stress_all_with_rand_reset.1919877408 May 28 02:58:15 PM PDT 24 May 28 02:58:41 PM PDT 24 1424980177 ps
T955 /workspace/coverage/default/24.pwrmgr_wakeup_reset.3338681586 May 28 02:58:57 PM PDT 24 May 28 02:59:12 PM PDT 24 257881492 ps
T956 /workspace/coverage/default/2.pwrmgr_global_esc.911127634 May 28 02:57:54 PM PDT 24 May 28 02:58:04 PM PDT 24 149117294 ps
T957 /workspace/coverage/default/2.pwrmgr_wakeup_reset.3408636421 May 28 02:57:55 PM PDT 24 May 28 02:58:06 PM PDT 24 273019411 ps
T958 /workspace/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4071219662 May 28 02:57:58 PM PDT 24 May 28 02:58:11 PM PDT 24 1334619789 ps
T959 /workspace/coverage/default/38.pwrmgr_wakeup.596042323 May 28 02:59:41 PM PDT 24 May 28 02:59:48 PM PDT 24 202135776 ps
T960 /workspace/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.590572597 May 28 02:58:17 PM PDT 24 May 28 02:58:42 PM PDT 24 996894374 ps
T961 /workspace/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.258626107 May 28 02:58:54 PM PDT 24 May 28 02:59:11 PM PDT 24 1018428571 ps
T43 /workspace/coverage/default/6.pwrmgr_stress_all_with_rand_reset.3232029688 May 28 02:58:09 PM PDT 24 May 28 02:58:58 PM PDT 24 9421595844 ps
T962 /workspace/coverage/default/39.pwrmgr_glitch.194688674 May 28 02:59:42 PM PDT 24 May 28 02:59:49 PM PDT 24 55139314 ps
T963 /workspace/coverage/default/1.pwrmgr_global_esc.3770662867 May 28 02:57:58 PM PDT 24 May 28 02:58:11 PM PDT 24 23050168 ps
T964 /workspace/coverage/default/0.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.235311509 May 28 02:57:53 PM PDT 24 May 28 02:58:02 PM PDT 24 786091960 ps
T965 /workspace/coverage/default/10.pwrmgr_disable_rom_integrity_check.1391613557 May 28 02:58:06 PM PDT 24 May 28 02:58:23 PM PDT 24 68633481 ps
T966 /workspace/coverage/default/43.pwrmgr_reset_invalid.2916525008 May 28 03:00:02 PM PDT 24 May 28 03:00:09 PM PDT 24 162503920 ps
T967 /workspace/coverage/default/15.pwrmgr_global_esc.2798262385 May 28 02:58:32 PM PDT 24 May 28 02:58:52 PM PDT 24 31263336 ps
T968 /workspace/coverage/default/42.pwrmgr_global_esc.3992149002 May 28 03:00:04 PM PDT 24 May 28 03:00:10 PM PDT 24 33847621 ps
T969 /workspace/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2770799408 May 28 02:58:11 PM PDT 24 May 28 02:58:33 PM PDT 24 988969692 ps
T970 /workspace/coverage/default/1.pwrmgr_glitch.477973766 May 28 02:57:54 PM PDT 24 May 28 02:58:02 PM PDT 24 67554739 ps
T971 /workspace/coverage/default/37.pwrmgr_reset.2088236807 May 28 02:59:32 PM PDT 24 May 28 02:59:42 PM PDT 24 101528430 ps
T972 /workspace/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.2470411589 May 28 02:59:39 PM PDT 24 May 28 02:59:47 PM PDT 24 29501685 ps
T973 /workspace/coverage/default/11.pwrmgr_disable_rom_integrity_check.3898383679 May 28 02:58:33 PM PDT 24 May 28 02:58:52 PM PDT 24 82231075 ps
T974 /workspace/coverage/default/11.pwrmgr_escalation_timeout.1740038897 May 28 02:58:30 PM PDT 24 May 28 02:58:50 PM PDT 24 256256729 ps
T975 /workspace/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.2488231448 May 28 02:59:51 PM PDT 24 May 28 02:59:55 PM PDT 24 85880133 ps
T976 /workspace/coverage/default/24.pwrmgr_lowpower_invalid.3773605270 May 28 02:58:55 PM PDT 24 May 28 02:59:10 PM PDT 24 142539052 ps
T977 /workspace/coverage/default/46.pwrmgr_stress_all_with_rand_reset.2922246511 May 28 03:00:12 PM PDT 24 May 28 03:00:27 PM PDT 24 7784587878 ps
T978 /workspace/coverage/default/11.pwrmgr_stress_all.340373185 May 28 02:58:18 PM PDT 24 May 28 02:58:45 PM PDT 24 2502262034 ps
T979 /workspace/coverage/default/40.pwrmgr_stress_all.1180189177 May 28 02:59:46 PM PDT 24 May 28 02:59:54 PM PDT 24 1501587214 ps
T980 /workspace/coverage/default/48.pwrmgr_reset_invalid.3541154469 May 28 03:00:17 PM PDT 24 May 28 03:00:28 PM PDT 24 160357368 ps
T981 /workspace/coverage/default/33.pwrmgr_escalation_timeout.3776938169 May 28 02:59:31 PM PDT 24 May 28 02:59:41 PM PDT 24 1069424253 ps
T982 /workspace/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.1613163483 May 28 02:59:02 PM PDT 24 May 28 02:59:15 PM PDT 24 52017428 ps
T983 /workspace/coverage/default/19.pwrmgr_lowpower_invalid.3317695892 May 28 02:58:38 PM PDT 24 May 28 02:58:57 PM PDT 24 40590052 ps
T984 /workspace/coverage/default/17.pwrmgr_reset_invalid.3512103115 May 28 02:58:45 PM PDT 24 May 28 02:59:04 PM PDT 24 111443625 ps
T985 /workspace/coverage/default/39.pwrmgr_disable_rom_integrity_check.3350533179 May 28 02:59:49 PM PDT 24 May 28 02:59:54 PM PDT 24 68831195 ps
T986 /workspace/coverage/default/47.pwrmgr_global_esc.3589127593 May 28 03:00:17 PM PDT 24 May 28 03:00:27 PM PDT 24 37458174 ps
T987 /workspace/coverage/default/28.pwrmgr_wakeup.2403324902 May 28 02:59:10 PM PDT 24 May 28 02:59:22 PM PDT 24 195877306 ps
T988 /workspace/coverage/default/37.pwrmgr_global_esc.1689882047 May 28 02:59:33 PM PDT 24 May 28 02:59:42 PM PDT 24 39232630 ps
T989 /workspace/coverage/default/37.pwrmgr_reset_invalid.1485169063 May 28 02:59:44 PM PDT 24 May 28 02:59:51 PM PDT 24 114649460 ps
T990 /workspace/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.1173863510 May 28 02:59:11 PM PDT 24 May 28 02:59:22 PM PDT 24 33218070 ps
T991 /workspace/coverage/default/10.pwrmgr_reset_invalid.150280199 May 28 02:58:17 PM PDT 24 May 28 02:58:40 PM PDT 24 128060190 ps
T992 /workspace/coverage/default/48.pwrmgr_wakeup_reset.1150666834 May 28 03:00:13 PM PDT 24 May 28 03:00:28 PM PDT 24 323660754 ps
T993 /workspace/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1143151045 May 28 02:57:57 PM PDT 24 May 28 02:58:10 PM PDT 24 1913245554 ps
T994 /workspace/coverage/default/30.pwrmgr_lowpower_invalid.404728731 May 28 02:59:22 PM PDT 24 May 28 02:59:31 PM PDT 24 71755808 ps
T995 /workspace/coverage/default/12.pwrmgr_reset.2336174237 May 28 02:58:12 PM PDT 24 May 28 02:58:32 PM PDT 24 64997688 ps
T996 /workspace/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.347039984 May 28 02:58:36 PM PDT 24 May 28 02:58:56 PM PDT 24 44259578 ps
T997 /workspace/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.2306900060 May 28 02:58:02 PM PDT 24 May 28 02:58:15 PM PDT 24 91620109 ps
T998 /workspace/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3300268971 May 28 02:59:19 PM PDT 24 May 28 02:59:29 PM PDT 24 98513741 ps
T999 /workspace/coverage/default/25.pwrmgr_aborted_low_power.3645968975 May 28 02:58:56 PM PDT 24 May 28 02:59:10 PM PDT 24 33493465 ps
T1000 /workspace/coverage/default/48.pwrmgr_global_esc.4194134923 May 28 03:00:12 PM PDT 24 May 28 03:00:19 PM PDT 24 25834833 ps
T56 /workspace/coverage/cover_reg_top/16.pwrmgr_csr_rw.150784739 May 28 01:10:27 PM PDT 24 May 28 01:10:30 PM PDT 24 22065623 ps
T61 /workspace/coverage/cover_reg_top/8.pwrmgr_intr_test.3915013957 May 28 01:10:18 PM PDT 24 May 28 01:10:25 PM PDT 24 18699454 ps
T57 /workspace/coverage/cover_reg_top/5.pwrmgr_csr_rw.2099440075 May 28 01:10:11 PM PDT 24 May 28 01:10:19 PM PDT 24 61295104 ps
T65 /workspace/coverage/cover_reg_top/17.pwrmgr_same_csr_outstanding.2562449084 May 28 01:10:28 PM PDT 24 May 28 01:10:32 PM PDT 24 41968570 ps
T58 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.1611732709 May 28 01:10:09 PM PDT 24 May 28 01:10:16 PM PDT 24 41802061 ps
T44 /workspace/coverage/cover_reg_top/18.pwrmgr_tl_errors.2949168981 May 28 01:10:27 PM PDT 24 May 28 01:10:30 PM PDT 24 175191335 ps
T62 /workspace/coverage/cover_reg_top/21.pwrmgr_intr_test.4126524960 May 28 01:10:49 PM PDT 24 May 28 01:10:53 PM PDT 24 75902083 ps
T63 /workspace/coverage/cover_reg_top/20.pwrmgr_intr_test.1443901756 May 28 01:10:37 PM PDT 24 May 28 01:10:40 PM PDT 24 33212782 ps
T115 /workspace/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.836547821 May 28 01:10:15 PM PDT 24 May 28 01:10:23 PM PDT 24 42479236 ps
T45 /workspace/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.549071804 May 28 01:10:34 PM PDT 24 May 28 01:10:38 PM PDT 24 231123528 ps
T49 /workspace/coverage/cover_reg_top/9.pwrmgr_tl_errors.578856562 May 28 01:10:28 PM PDT 24 May 28 01:10:32 PM PDT 24 47114160 ps
T55 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.4124854211 May 28 01:10:09 PM PDT 24 May 28 01:10:15 PM PDT 24 20702042 ps
T50 /workspace/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.1971884709 May 28 01:10:32 PM PDT 24 May 28 01:10:36 PM PDT 24 108407307 ps
T156 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.2969557579 May 28 01:10:12 PM PDT 24 May 28 01:10:23 PM PDT 24 679745300 ps
T60 /workspace/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.1778006053 May 28 01:10:38 PM PDT 24 May 28 01:10:42 PM PDT 24 46055887 ps
T155 /workspace/coverage/cover_reg_top/48.pwrmgr_intr_test.289226098 May 28 01:10:40 PM PDT 24 May 28 01:10:44 PM PDT 24 45155337 ps
T51 /workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.3089464660 May 28 01:10:15 PM PDT 24 May 28 01:10:23 PM PDT 24 267364547 ps
T1001 /workspace/coverage/cover_reg_top/17.pwrmgr_csr_mem_rw_with_rand_reset.1168108906 May 28 01:10:41 PM PDT 24 May 28 01:10:45 PM PDT 24 131362419 ps
T59 /workspace/coverage/cover_reg_top/5.pwrmgr_tl_errors.4015086295 May 28 01:10:12 PM PDT 24 May 28 01:10:21 PM PDT 24 43144371 ps
T148 /workspace/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.1824149415 May 28 01:10:23 PM PDT 24 May 28 01:10:27 PM PDT 24 380906752 ps
T153 /workspace/coverage/cover_reg_top/42.pwrmgr_intr_test.895917043 May 28 01:10:41 PM PDT 24 May 28 01:10:45 PM PDT 24 44636712 ps
T69 /workspace/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.1982506094 May 28 01:10:40 PM PDT 24 May 28 01:10:45 PM PDT 24 54369889 ps
T104 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.3265300180 May 28 01:10:10 PM PDT 24 May 28 01:10:17 PM PDT 24 39975787 ps
T1002 /workspace/coverage/cover_reg_top/19.pwrmgr_tl_errors.29078249 May 28 01:10:34 PM PDT 24 May 28 01:10:38 PM PDT 24 85480270 ps
T1003 /workspace/coverage/cover_reg_top/44.pwrmgr_intr_test.465391581 May 28 01:10:37 PM PDT 24 May 28 01:10:40 PM PDT 24 51528084 ps
T68 /workspace/coverage/cover_reg_top/7.pwrmgr_tl_errors.2136227627 May 28 01:10:13 PM PDT 24 May 28 01:10:21 PM PDT 24 195090419 ps
T1004 /workspace/coverage/cover_reg_top/14.pwrmgr_tl_errors.3525471066 May 28 01:10:40 PM PDT 24 May 28 01:10:45 PM PDT 24 218396381 ps
T1005 /workspace/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.2228623475 May 28 01:10:11 PM PDT 24 May 28 01:10:19 PM PDT 24 88580453 ps
T1006 /workspace/coverage/cover_reg_top/28.pwrmgr_intr_test.3046506985 May 28 01:10:41 PM PDT 24 May 28 01:10:46 PM PDT 24 39102268 ps
T151 /workspace/coverage/cover_reg_top/16.pwrmgr_intr_test.862708023 May 28 01:10:21 PM PDT 24 May 28 01:10:26 PM PDT 24 19868437 ps
T1007 /workspace/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.2108092466 May 28 01:10:05 PM PDT 24 May 28 01:10:08 PM PDT 24 27249879 ps
T1008 /workspace/coverage/cover_reg_top/2.pwrmgr_tl_errors.356189111 May 28 01:10:12 PM PDT 24 May 28 01:10:21 PM PDT 24 379891151 ps
T152 /workspace/coverage/cover_reg_top/31.pwrmgr_intr_test.3981933672 May 28 01:10:37 PM PDT 24 May 28 01:10:40 PM PDT 24 43439363 ps
T113 /workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.984305286 May 28 01:10:14 PM PDT 24 May 28 01:10:24 PM PDT 24 344212346 ps
T1009 /workspace/coverage/cover_reg_top/2.pwrmgr_intr_test.4140153394 May 28 01:10:15 PM PDT 24 May 28 01:10:23 PM PDT 24 82546042 ps
T1010 /workspace/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.1902382190 May 28 01:10:08 PM PDT 24 May 28 01:10:14 PM PDT 24 23640041 ps
T116 /workspace/coverage/cover_reg_top/14.pwrmgr_csr_rw.1462925422 May 28 01:10:47 PM PDT 24 May 28 01:10:52 PM PDT 24 23266002 ps
T154 /workspace/coverage/cover_reg_top/4.pwrmgr_intr_test.270328417 May 28 01:10:09 PM PDT 24 May 28 01:10:15 PM PDT 24 20460833 ps
T1011 /workspace/coverage/cover_reg_top/3.pwrmgr_intr_test.3393008216 May 28 01:10:15 PM PDT 24 May 28 01:10:22 PM PDT 24 21253175 ps
T1012 /workspace/coverage/cover_reg_top/33.pwrmgr_intr_test.123096542 May 28 01:10:39 PM PDT 24 May 28 01:10:43 PM PDT 24 21801912 ps
T1013 /workspace/coverage/cover_reg_top/9.pwrmgr_intr_test.2590552296 May 28 01:10:31 PM PDT 24 May 28 01:10:34 PM PDT 24 41615192 ps
T1014 /workspace/coverage/cover_reg_top/15.pwrmgr_tl_errors.1539152682 May 28 01:10:21 PM PDT 24 May 28 01:10:27 PM PDT 24 66921929 ps
T1015 /workspace/coverage/cover_reg_top/45.pwrmgr_intr_test.3161427452 May 28 01:10:41 PM PDT 24 May 28 01:10:45 PM PDT 24 53604781 ps
T117 /workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.2562003133 May 28 01:10:32 PM PDT 24 May 28 01:10:35 PM PDT 24 51774246 ps
T1016 /workspace/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.1990596865 May 28 01:10:10 PM PDT 24 May 28 01:10:18 PM PDT 24 84321956 ps
T1017 /workspace/coverage/cover_reg_top/13.pwrmgr_intr_test.832637422 May 28 01:10:32 PM PDT 24 May 28 01:10:35 PM PDT 24 20489561 ps
T1018 /workspace/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.1455068884 May 28 01:10:20 PM PDT 24 May 28 01:10:26 PM PDT 24 65452062 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%