Unified Coverage Report :: Group :: rstmgr_env_pkg::rstmgr_env_cov::reset_stretcher_cg

Group : rstmgr_env_pkg::rstmgr_env_cov::reset_stretcher_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/rstmgr-sim-vcs/default/sim-vcs/../src/lowrisc_dv_rstmgr_env_0.1/rstmgr_env_cov.sv

---

Summary for Group rstmgr_env_pkg::rstmgr_env_cov::reset_stretcher_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	12	0	12	100.00

Variables for Group rstmgr_env_pkg::rstmgr_env_cov::reset_stretcher_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
count_cp	4	0	4	100.00	100	1	1	0
length_cp	8	0	8	100.00	100	1	1	0

Summary for Variable count_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for count_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8577	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
cb[0]	1274	1			T1	1		T2	3		T3	1
cb[1]	1140	1			T2	4		T5	4		T6	4
cb[2]	1036	1			T2	4		T5	4		T6	4
cb[3]	959	1			T2	3		T5	4		T6	4

---

Summary for Variable length_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for length_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
others	10567	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lb[0]	359	1			T2	4		T6	2		T9	2
lb[1]	309	1			T2	1		T9	2		T15	1
lb[2]	305	1			T2	5		T9	5		T14	2
lb[3]	310	1			T5	1		T9	5		T14	3
lb[4]	290	1			T2	2		T5	1		T9	1
lb[5]	296	1			T2	1		T9	1		T16	1
lb[6]	284	1			T5	1		T6	1		T9	4
lb[7]	266	1			T15	1		T14	2		T69	1