CHIP_EARLGREY_ASIC Synthesis Results

Saturday May 14 2022 22:41:55 UTC

GitHub Revision: a13b9b8ed
Foundry Revision: ec563d4

Branch: HEAD

Synthesis Tool: DC

Build Mode Flow Warnings Flow Errors Analyze Warnings Analyze Errors Elab Warnings Elab Errors Compile Warnings Compile Errors
default 135565 0 322 0 713 0 103 0

Circuit Complexity in [kGE]

Instance Comb Buf/Inv Regs Logic Macros Total Logic [%] Macro [%] Total [%]
chip_earlgrey_asic 1082.5 78.5 1083.5 2166.0 5398.5 7564.6 -- -- --
top_earlgrey 1076.4 -- 1073.4 2149.8 4852.1 7001.9 99.2 % 89.9 % 92.6 %
top_earlgrey/u_adc_ctrl_aon 6.1 -- 9.6 15.7 0.00 15.7 0.7 % 0.0 % 0.2 %
top_earlgrey/u_aes 67.3 -- 43.0 110.2 0.00 110.2 5.1 % 0.0 % 1.5 %
top_earlgrey/u_alert_handler 35.8 -- 40.6 76.4 0.00 76.4 3.5 % 0.0 % 1.0 %
top_earlgrey/u_aon_timer_aon 2.7 -- 3.7 6.4 0.00 6.4 0.3 % 0.0 % 0.1 %
top_earlgrey/u_clkmgr_aon 5.3 -- 8.5 13.8 0.00 13.8 0.6 % 0.0 % 0.2 %
top_earlgrey/u_csrng 37.6 -- 92.5 130.1 0.00 130.1 6.0 % 0.0 % 1.7 %
top_earlgrey/u_edn0 8.1 -- 16.9 25.0 0.00 25.0 1.2 % 0.0 % 0.3 %
top_earlgrey/u_edn1 5.5 -- 11.5 17.0 0.00 17.0 0.8 % 0.0 % 0.2 %
top_earlgrey/u_entropy_src 52.0 -- 60.2 112.2 0.00 112.2 5.2 % 0.0 % 1.5 %
top_earlgrey/u_flash_ctrl 75.8 -- 72.9 148.6 3495.4 3644.1 6.9 % 64.7 % 48.2 %
top_earlgrey/u_gpio 3.1 -- 4.8 7.9 0.00 7.9 0.4 % 0.0 % 0.1 %
top_earlgrey/u_hmac 16.2 -- 16.2 32.4 0.00 32.4 1.5 % 0.0 % 0.4 %
top_earlgrey/u_i2c0 8.4 -- 21.9 30.3 0.00 30.3 1.4 % 0.0 % 0.4 %
top_earlgrey/u_i2c1 8.4 -- 21.9 30.3 0.00 30.3 1.4 % 0.0 % 0.4 %
top_earlgrey/u_i2c2 8.4 -- 21.9 30.3 0.00 30.3 1.4 % 0.0 % 0.4 %
top_earlgrey/u_keymgr 49.9 -- 34.6 84.5 0.00 84.5 3.9 % 0.0 % 1.1 %
top_earlgrey/u_kmac 116.2 -- 72.1 188.3 0.00 188.3 8.7 % 0.0 % 2.5 %
top_earlgrey/u_lc_ctrl 14.1 -- 15.6 29.7 0.00 29.7 1.4 % 0.0 % 0.4 %
top_earlgrey/u_otbn 185.3 -- 112.9 298.2 91.6 389.8 13.8 % 1.7 % 5.2 %
top_earlgrey/u_otp_ctrl 63.5 -- 47.2 110.7 284.7 395.3 5.1 % 5.3 % 5.2 %
top_earlgrey/u_pattgen 2.3 -- 4.3 6.6 0.00 6.6 0.3 % 0.0 % 0.1 %
top_earlgrey/u_pinmux_aon 27.8 -- 18.4 46.3 0.00 46.3 2.1 % 0.0 % 0.6 %
top_earlgrey/u_pwm_aon 11.5 -- 12.1 23.6 0.00 23.6 1.1 % 0.0 % 0.3 %
top_earlgrey/u_pwrmgr_aon 2.3 -- 2.5 4.8 0.00 4.8 0.2 % 0.0 % 0.1 %
top_earlgrey/u_rom_ctrl 8.5 -- 6.6 15.1 48.1 63.3 0.7 % 0.9 % 0.8 %
top_earlgrey/u_rstmgr_aon 6.6 -- 10.0 16.6 0.00 16.6 0.8 % 0.0 % 0.2 %
top_earlgrey/u_rv_core_ibex 112.3 -- 72.4 184.8 69.8 254.6 8.5 % 1.3 % 3.4 %
top_earlgrey/u_rv_dm 7.9 -- 8.9 16.8 0.00 16.8 0.8 % 0.0 % 0.2 %
top_earlgrey/u_rv_plic 10.4 -- 10.9 21.3 0.00 21.3 1.0 % 0.0 % 0.3 %
top_earlgrey/u_rv_timer 1.8 -- 1.6 3.4 0.00 3.4 0.2 % 0.0 % 0.0 %
top_earlgrey/u_sensor_ctrl 1.5 -- 1.4 2.9 0.00 2.9 0.1 % 0.0 % 0.0 %
top_earlgrey/u_spi_device 18.9 -- 24.1 43.0 69.9 112.9 2.0 % 1.3 % 1.5 %
top_earlgrey/u_spi_host0 9.7 -- 35.8 45.5 0.00 45.5 2.1 % 0.0 % 0.6 %
top_earlgrey/u_spi_host1 9.6 -- 35.8 45.4 0.00 45.4 2.1 % 0.0 % 0.6 %
top_earlgrey/u_sram_ctrl_main 9.0 -- 5.5 14.6 724.3 738.9 0.7 % 13.4 % 9.8 %
top_earlgrey/u_sram_ctrl_ret_aon 8.5 -- 5.0 13.5 28.4 41.9 0.6 % 0.5 % 0.6 %
top_earlgrey/u_sysrst_ctrl_aon 8.3 -- 11.5 19.8 0.00 19.8 0.9 % 0.0 % 0.3 %
top_earlgrey/u_uart0 2.8 -- 5.8 8.5 0.00 8.5 0.4 % 0.0 % 0.1 %
top_earlgrey/u_uart1 2.8 -- 5.8 8.5 0.00 8.5 0.4 % 0.0 % 0.1 %
top_earlgrey/u_uart2 2.8 -- 5.8 8.5 0.00 8.5 0.4 % 0.0 % 0.1 %
top_earlgrey/u_uart3 2.8 -- 5.8 8.5 0.00 8.5 0.4 % 0.0 % 0.1 %
top_earlgrey/u_usbdev 6.9 -- 9.8 16.8 39.9 56.6 0.8 % 0.7 % 0.7 %
top_earlgrey/u_xbar_main 26.7 -- 44.8 71.5 0.00 71.5 3.3 % 0.0 % 0.9 %
top_earlgrey/u_xbar_peri 5.2 -- 0.15 5.3 0.00 5.3 0.2 % 0.0 % 0.1 %
u_ast 5.2 -- 10.1 15.3 0.00 15.3 0.7 % 0.0 % 0.2 %
u_padring 0.95 -- 0.00 0.95 546.4 547.3 0.0 % 10.1 % 7.2 %
u_prim_usb_diff_rx 0.01 -- 0.00 0.01 0.00 0.01 0.0 % 0.0 % 0.0 %

Timing in [ns]

Path Group Period WNS TNS
AON_CLK 4750.0 0.00 0.00
IO_CLK 9.9 0.00 0.00
JTAG_TCK 47.5 0.00 0.00
MAIN_CLK 8.5 0.00 0.00
SPI_CSB_CLK 16.0 0.00 0.00
SPI_DEV_CLK 16.0 0.00 0.00
SPI_DEV_IN_CLK 16.0 0.00 0.00
SPI_DEV_OUT_CLK 16.0 0.00 0.00
SPI_DEV_PASSTHRU_CLK 25.0 0.00 0.00
SPI_DEV_PASSTHRU_CSB_CLK 25.0 0.00 0.00
SPI_DEV_PASSTHRU_IN_CLK 25.0 0.00 0.00
SPI_DEV_PASSTHRU_OUT_CLK 25.0 0.00 0.00
SPI_HOST_CLK 19.8 0.00 0.00
SPI_HOST_INT_CLK 19.8 0.00 0.00
SPI_HOST_PASSTHRU_CLK 25.0 0.00 0.00
USB_CLK 19.8 0.00 0.00
default -- -0.37 -0.37

Power Estimates in [mW]

Network Internal Leakage Total
2.8 / 56.1 % 1.8 / 36.9 % 0.35 / 7.0 % 5

Past Results