CHIP_EARLGREY_ASIC Synthesis Results

Thursday May 09 2024 07:02:43 UTC

GitHub Revision: 0dcad22914
Foundry Revision: 5fc983b

Branch: cs_regression

Synthesis Tool: DC

Build Mode Flow Warnings Flow Errors Analyze Warnings Analyze Errors Elab Warnings Elab Errors Compile Warnings Compile Errors
default 0 9 0 0 0 0 0 0

Circuit Complexity in [kGE]

Gate equivalent is not properly defined

No area report found

Timing in [ns]

No timing report found

Power Estimates in [mW]

No power report found

Past Results