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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4069 1 T4 10 T6 2 T23 4
auto[1] 2154 1 T6 2 T5 6 T16 4



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 168 1 T101 2 T25 4 T147 2
auto[134217728:268435455] 178 1 T4 2 T25 2 T219 4
auto[268435456:402653183] 218 1 T16 2 T192 2 T25 4
auto[402653184:536870911] 168 1 T49 2 T25 2 T130 2
auto[536870912:671088639] 186 1 T40 2 T25 2 T130 4
auto[671088640:805306367] 218 1 T5 2 T40 2 T43 4
auto[805306368:939524095] 210 1 T16 2 T24 2 T130 2
auto[939524096:1073741823] 202 1 T43 2 T25 2 T47 4
auto[1073741824:1207959551] 166 1 T47 2 T272 2 T97 2
auto[1207959552:1342177279] 217 1 T192 2 T43 2 T25 2
auto[1342177280:1476395007] 200 1 T40 4 T25 4 T47 4
auto[1476395008:1610612735] 170 1 T25 2 T130 2 T102 2
auto[1610612736:1744830463] 176 1 T25 10 T201 6 T47 2
auto[1744830464:1879048191] 216 1 T40 2 T192 2 T43 2
auto[1879048192:2013265919] 182 1 T4 2 T192 2 T131 2
auto[2013265920:2147483647] 238 1 T4 2 T5 2 T192 2
auto[2147483648:2281701375] 230 1 T6 2 T25 2 T130 2
auto[2281701376:2415919103] 202 1 T43 4 T25 8 T102 2
auto[2415919104:2550136831] 216 1 T192 2 T43 2 T25 4
auto[2550136832:2684354559] 244 1 T25 4 T148 2 T201 2
auto[2684354560:2818572287] 182 1 T23 2 T25 4 T131 2
auto[2818572288:2952790015] 202 1 T148 2 T47 6 T255 2
auto[2952790016:3087007743] 198 1 T23 2 T39 2 T43 2
auto[3087007744:3221225471] 166 1 T43 2 T25 2 T201 2
auto[3221225472:3355443199] 208 1 T23 2 T49 2 T25 4
auto[3355443200:3489660927] 188 1 T43 2 T25 2 T47 2
auto[3489660928:3623878655] 164 1 T49 2 T25 4 T47 6
auto[3623878656:3758096383] 205 1 T4 2 T39 2 T25 4
auto[3758096384:3892314111] 174 1 T4 2 T43 2 T25 2
auto[3892314112:4026531839] 164 1 T39 2 T25 4 T130 2
auto[4026531840:4160749567] 186 1 T39 2 T24 2 T192 2
auto[4160749568:4294967295] 181 1 T6 2 T5 2 T101 2



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 114 1 T25 2 T47 2 T36 2
auto[0:134217727] auto[1] 54 1 T101 2 T25 2 T147 2
auto[134217728:268435455] auto[0] 118 1 T4 2 T25 2 T219 2
auto[134217728:268435455] auto[1] 60 1 T219 2 T48 2 T195 2
auto[268435456:402653183] auto[0] 148 1 T192 2 T47 2 T36 2
auto[268435456:402653183] auto[1] 70 1 T16 2 T25 4 T147 2
auto[402653184:536870911] auto[0] 108 1 T25 2 T130 2 T86 2
auto[402653184:536870911] auto[1] 60 1 T49 2 T131 4 T116 2
auto[536870912:671088639] auto[0] 134 1 T130 4 T432 2 T195 2
auto[536870912:671088639] auto[1] 52 1 T40 2 T25 2 T47 2
auto[671088640:805306367] auto[0] 144 1 T40 2 T43 4 T102 2
auto[671088640:805306367] auto[1] 74 1 T5 2 T98 2 T293 2
auto[805306368:939524095] auto[0] 146 1 T130 2 T44 2 T47 4
auto[805306368:939524095] auto[1] 64 1 T16 2 T24 2 T116 4
auto[939524096:1073741823] auto[0] 120 1 T25 2 T47 2 T86 2
auto[939524096:1073741823] auto[1] 82 1 T43 2 T47 2 T255 2
auto[1073741824:1207959551] auto[0] 114 1 T47 2 T272 2 T97 2
auto[1073741824:1207959551] auto[1] 52 1 T50 2 T330 2 T434 2
auto[1207959552:1342177279] auto[0] 123 1 T192 2 T43 2 T25 2
auto[1207959552:1342177279] auto[1] 94 1 T148 2 T195 2 T190 2
auto[1342177280:1476395007] auto[0] 126 1 T40 4 T25 4 T47 2
auto[1342177280:1476395007] auto[1] 74 1 T47 2 T221 4 T396 2
auto[1476395008:1610612735] auto[0] 106 1 T25 2 T130 2 T47 2
auto[1476395008:1610612735] auto[1] 64 1 T102 2 T44 2 T148 2
auto[1610612736:1744830463] auto[0] 128 1 T25 6 T201 2 T47 2
auto[1610612736:1744830463] auto[1] 48 1 T25 4 T201 4 T220 2
auto[1744830464:1879048191] auto[0] 139 1 T40 2 T192 2 T43 2
auto[1744830464:1879048191] auto[1] 77 1 T25 4 T134 2 T63 2
auto[1879048192:2013265919] auto[0] 106 1 T4 2 T192 2 T47 2
auto[1879048192:2013265919] auto[1] 76 1 T131 2 T48 2 T83 2
auto[2013265920:2147483647] auto[0] 162 1 T4 2 T192 2 T25 2
auto[2013265920:2147483647] auto[1] 76 1 T5 2 T25 2 T148 2
auto[2147483648:2281701375] auto[0] 154 1 T6 2 T25 2 T130 2
auto[2147483648:2281701375] auto[1] 76 1 T48 2 T53 2 T8 2
auto[2281701376:2415919103] auto[0] 140 1 T43 4 T25 6 T219 2
auto[2281701376:2415919103] auto[1] 62 1 T25 2 T102 2 T47 2
auto[2415919104:2550136831] auto[0] 124 1 T192 2 T25 4 T130 2
auto[2415919104:2550136831] auto[1] 92 1 T43 2 T36 2 T135 2
auto[2550136832:2684354559] auto[0] 140 1 T201 2 T47 2 T19 2
auto[2550136832:2684354559] auto[1] 104 1 T25 4 T148 2 T47 2
auto[2684354560:2818572287] auto[0] 120 1 T25 2 T21 2 T116 2
auto[2684354560:2818572287] auto[1] 62 1 T23 2 T25 2 T131 2
auto[2818572288:2952790015] auto[0] 128 1 T47 4 T247 2 T431 2
auto[2818572288:2952790015] auto[1] 74 1 T148 2 T47 2 T255 2
auto[2952790016:3087007743] auto[0] 136 1 T23 2 T39 2 T43 2
auto[2952790016:3087007743] auto[1] 62 1 T247 2 T256 4 T41 2
auto[3087007744:3221225471] auto[0] 112 1 T25 2 T47 2 T7 2
auto[3087007744:3221225471] auto[1] 54 1 T43 2 T201 2 T8 2
auto[3221225472:3355443199] auto[0] 148 1 T23 2 T25 4 T102 2
auto[3221225472:3355443199] auto[1] 60 1 T49 2 T225 2 T209 2
auto[3355443200:3489660927] auto[0] 122 1 T43 2 T25 2 T47 2
auto[3355443200:3489660927] auto[1] 66 1 T52 2 T20 2 T135 2
auto[3489660928:3623878655] auto[0] 110 1 T25 2 T47 2 T242 2
auto[3489660928:3623878655] auto[1] 54 1 T49 2 T25 2 T47 4
auto[3623878656:3758096383] auto[0] 137 1 T4 2 T39 2 T25 4
auto[3623878656:3758096383] auto[1] 68 1 T47 6 T70 2 T299 2
auto[3758096384:3892314111] auto[0] 124 1 T4 2 T43 2 T25 2
auto[3758096384:3892314111] auto[1] 50 1 T44 2 T99 2 T66 2
auto[3892314112:4026531839] auto[0] 124 1 T25 2 T130 2 T47 2
auto[3892314112:4026531839] auto[1] 40 1 T39 2 T25 2 T195 2
auto[4026531840:4160749567] auto[0] 110 1 T39 2 T192 2 T47 2
auto[4026531840:4160749567] auto[1] 76 1 T24 2 T347 2 T262 2
auto[4160749568:4294967295] auto[0] 104 1 T25 2 T130 2 T44 2
auto[4160749568:4294967295] auto[1] 77 1 T6 2 T5 2 T101 2

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