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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4131 1 T1 16 T2 6 T4 18
auto[1] 2024 1 T1 8 T2 2 T4 6



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 210 1 T2 2 T16 2 T82 2
auto[134217728:268435455] 178 1 T1 2 T4 2 T14 2
auto[268435456:402653183] 200 1 T4 2 T16 2 T60 2
auto[402653184:536870911] 166 1 T1 2 T2 2 T37 2
auto[536870912:671088639] 186 1 T2 2 T139 2 T6 6
auto[671088640:805306367] 186 1 T1 4 T82 2 T40 2
auto[805306368:939524095] 202 1 T1 2 T34 2 T184 2
auto[939524096:1073741823] 168 1 T1 2 T4 2 T14 2
auto[1073741824:1207959551] 200 1 T82 2 T184 2 T51 2
auto[1207959552:1342177279] 184 1 T174 2 T201 2 T183 2
auto[1342177280:1476395007] 214 1 T4 2 T16 2 T82 2
auto[1476395008:1610612735] 178 1 T1 2 T182 2 T289 2
auto[1610612736:1744830463] 220 1 T4 2 T13 2 T182 2
auto[1744830464:1879048191] 204 1 T44 2 T182 2 T196 2
auto[1879048192:2013265919] 184 1 T1 4 T14 4 T16 2
auto[2013265920:2147483647] 206 1 T15 2 T60 2 T37 4
auto[2147483648:2281701375] 181 1 T4 2 T24 2 T182 2
auto[2281701376:2415919103] 192 1 T47 2 T6 4 T231 2
auto[2415919104:2550136831] 182 1 T14 4 T44 2 T55 2
auto[2550136832:2684354559] 190 1 T47 6 T289 2 T6 4
auto[2684354560:2818572287] 192 1 T13 2 T17 2 T34 2
auto[2818572288:2952790015] 214 1 T13 2 T16 2 T186 4
auto[2952790016:3087007743] 168 1 T2 2 T4 2 T186 2
auto[3087007744:3221225471] 200 1 T184 2 T55 2 T186 2
auto[3221225472:3355443199] 182 1 T1 2 T4 2 T8 2
auto[3355443200:3489660927] 186 1 T48 2 T186 2 T108 2
auto[3489660928:3623878655] 190 1 T1 2 T4 2 T184 2
auto[3623878656:3758096383] 180 1 T4 2 T8 2 T43 2
auto[3758096384:3892314111] 208 1 T4 4 T24 2 T60 2
auto[3892314112:4026531839] 204 1 T16 2 T43 2 T45 2
auto[4026531840:4160749567] 202 1 T17 2 T139 2 T6 2
auto[4160749568:4294967295] 198 1 T1 2 T14 2 T15 4



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 146 1 T182 2 T51 2 T47 4
auto[0:134217727] auto[1] 64 1 T2 2 T16 2 T82 2
auto[134217728:268435455] auto[0] 126 1 T4 2 T14 2 T40 2
auto[134217728:268435455] auto[1] 52 1 T1 2 T182 2 T22 2
auto[268435456:402653183] auto[0] 128 1 T4 2 T127 2 T47 2
auto[268435456:402653183] auto[1] 72 1 T16 2 T60 2 T46 2
auto[402653184:536870911] auto[0] 114 1 T1 2 T2 2 T37 2
auto[402653184:536870911] auto[1] 52 1 T40 2 T6 2 T81 2
auto[536870912:671088639] auto[0] 104 1 T2 2 T139 2 T6 2
auto[536870912:671088639] auto[1] 82 1 T6 4 T194 2 T67 2
auto[671088640:805306367] auto[0] 122 1 T1 4 T40 2 T6 2
auto[671088640:805306367] auto[1] 64 1 T82 2 T28 2 T56 2
auto[805306368:939524095] auto[0] 140 1 T1 2 T108 2 T41 2
auto[805306368:939524095] auto[1] 62 1 T34 2 T184 2 T60 2
auto[939524096:1073741823] auto[0] 114 1 T108 2 T6 6 T58 2
auto[939524096:1073741823] auto[1] 54 1 T1 2 T4 2 T14 2
auto[1073741824:1207959551] auto[0] 142 1 T184 2 T51 2 T47 2
auto[1073741824:1207959551] auto[1] 58 1 T82 2 T52 2 T54 2
auto[1207959552:1342177279] auto[0] 134 1 T201 2 T183 2 T88 2
auto[1207959552:1342177279] auto[1] 50 1 T174 2 T238 2 T394 2
auto[1342177280:1476395007] auto[0] 146 1 T4 2 T16 2 T82 2
auto[1342177280:1476395007] auto[1] 68 1 T125 2 T139 2 T6 2
auto[1476395008:1610612735] auto[0] 124 1 T182 2 T289 2 T6 2
auto[1476395008:1610612735] auto[1] 54 1 T1 2 T193 2 T81 2
auto[1610612736:1744830463] auto[0] 132 1 T4 2 T182 2 T190 2
auto[1610612736:1744830463] auto[1] 88 1 T13 2 T28 2 T6 2
auto[1744830464:1879048191] auto[0] 142 1 T44 2 T182 2 T196 2
auto[1744830464:1879048191] auto[1] 62 1 T185 2 T181 2 T239 2
auto[1879048192:2013265919] auto[0] 116 1 T1 4 T14 2 T184 2
auto[1879048192:2013265919] auto[1] 68 1 T14 2 T16 2 T180 2
auto[2013265920:2147483647] auto[0] 146 1 T15 2 T37 4 T196 2
auto[2013265920:2147483647] auto[1] 60 1 T60 2 T6 2 T174 2
auto[2147483648:2281701375] auto[0] 135 1 T4 2 T182 2 T6 2
auto[2147483648:2281701375] auto[1] 46 1 T24 2 T54 2 T6 2
auto[2281701376:2415919103] auto[0] 128 1 T6 2 T193 2 T7 2
auto[2281701376:2415919103] auto[1] 64 1 T47 2 T6 2 T231 2
auto[2415919104:2550136831] auto[0] 138 1 T14 2 T44 2 T127 2
auto[2415919104:2550136831] auto[1] 44 1 T14 2 T55 2 T6 2
auto[2550136832:2684354559] auto[0] 122 1 T47 4 T289 2 T6 4
auto[2550136832:2684354559] auto[1] 68 1 T47 2 T114 2 T49 2
auto[2684354560:2818572287] auto[0] 132 1 T108 2 T127 2 T6 4
auto[2684354560:2818572287] auto[1] 60 1 T13 2 T17 2 T34 2
auto[2818572288:2952790015] auto[0] 132 1 T186 2 T181 2 T239 2
auto[2818572288:2952790015] auto[1] 82 1 T13 2 T16 2 T186 2
auto[2952790016:3087007743] auto[0] 112 1 T2 2 T4 2 T186 2
auto[2952790016:3087007743] auto[1] 56 1 T125 2 T114 2 T308 2
auto[3087007744:3221225471] auto[0] 126 1 T184 2 T186 2 T47 2
auto[3087007744:3221225471] auto[1] 74 1 T55 2 T200 2 T6 2
auto[3221225472:3355443199] auto[0] 120 1 T1 2 T4 2 T82 2
auto[3221225472:3355443199] auto[1] 62 1 T8 2 T43 2 T185 2
auto[3355443200:3489660927] auto[0] 142 1 T186 2 T108 2 T51 2
auto[3355443200:3489660927] auto[1] 44 1 T48 2 T81 2 T195 2
auto[3489660928:3623878655] auto[0] 128 1 T4 2 T184 2 T21 2
auto[3489660928:3623878655] auto[1] 62 1 T1 2 T47 2 T6 4
auto[3623878656:3758096383] auto[0] 114 1 T4 2 T43 2 T182 2
auto[3623878656:3758096383] auto[1] 66 1 T8 2 T47 2 T21 2
auto[3758096384:3892314111] auto[0] 138 1 T37 2 T127 2 T47 2
auto[3758096384:3892314111] auto[1] 70 1 T4 4 T24 2 T60 2
auto[3892314112:4026531839] auto[0] 112 1 T43 2 T182 2 T186 2
auto[3892314112:4026531839] auto[1] 92 1 T16 2 T45 2 T6 4
auto[4026531840:4160749567] auto[0] 132 1 T17 2 T139 2 T57 2
auto[4026531840:4160749567] auto[1] 70 1 T6 2 T22 2 T239 2
auto[4160749568:4294967295] auto[0] 144 1 T1 2 T15 2 T44 2
auto[4160749568:4294967295] auto[1] 54 1 T14 2 T15 2 T84 2

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