Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4209

1

T1

6

T14

4

T8

2

auto[1]

1947

1

T1

4

T8

2

T21

8

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	198	1			T22	2		T23	2		T7	2
auto[134217728:268435455]	202	1			T5	2		T44	2		T183	2
auto[268435456:402653183]	222	1			T5	4		T56	2		T194	2
auto[402653184:536870911]	193	1			T8	2		T5	4		T181	2
auto[536870912:671088639]	180	1			T16	2		T24	2		T5	2
auto[671088640:805306367]	154	1			T24	2		T5	2		T25	2
auto[805306368:939524095]	182	1			T24	2		T33	2		T5	6
auto[939524096:1073741823]	212	1			T1	2		T24	2		T5	4
auto[1073741824:1207959551]	188	1			T1	2		T33	2		T183	2
auto[1207959552:1342177279]	158	1			T22	2		T91	2		T48	2
auto[1342177280:1476395007]	182	1			T33	2		T5	4		T25	2
auto[1476395008:1610612735]	172	1			T5	2		T194	2		T43	2
auto[1610612736:1744830463]	194	1			T25	2		T100	2		T29	2
auto[1744830464:1879048191]	184	1			T5	4		T45	2		T23	2
auto[1879048192:2013265919]	192	1			T5	2		T189	2		T43	4
auto[2013265920:2147483647]	217	1			T16	2		T5	2		T56	2
auto[2147483648:2281701375]	218	1			T33	2		T21	4		T5	6
auto[2281701376:2415919103]	182	1			T24	2		T5	4		T74	2
auto[2415919104:2550136831]	204	1			T1	2		T5	2		T23	2
auto[2550136832:2684354559]	186	1			T8	2		T16	2		T24	2
auto[2684354560:2818572287]	180	1			T5	4		T186	2		T183	2
auto[2818572288:2952790015]	194	1			T16	2		T5	4		T181	2
auto[2952790016:3087007743]	178	1			T24	2		T5	6		T75	2
auto[3087007744:3221225471]	194	1			T16	2		T5	4		T91	2
auto[3221225472:3355443199]	214	1			T5	6		T42	2		T6	2
auto[3355443200:3489660927]	196	1			T5	6		T181	2		T28	2
auto[3489660928:3623878655]	164	1			T43	6		T74	2		T48	2
auto[3623878656:3758096383]	220	1			T1	2		T21	2		T5	4
auto[3758096384:3892314111]	178	1			T5	4		T181	2		T23	2
auto[3892314112:4026531839]	178	1			T1	2		T21	2		T5	2
auto[4026531840:4160749567]	234	1			T5	4		T181	2		T186	2
auto[4160749568:4294967295]	206	1			T14	4		T5	10		T6	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	136	1			T22	2		T7	2		T26	2
auto[0:134217727]	auto[1]	62	1			T23	2		T43	2		T98	2
auto[134217728:268435455]	auto[0]	154	1			T5	2		T44	2		T183	2
auto[134217728:268435455]	auto[1]	48	1			T26	2		T34	2		T99	2
auto[268435456:402653183]	auto[0]	160	1			T5	4		T56	2		T100	2
auto[268435456:402653183]	auto[1]	62	1			T194	2		T74	2		T78	2
auto[402653184:536870911]	auto[0]	134	1			T8	2		T5	4		T49	2
auto[402653184:536870911]	auto[1]	59	1			T181	2		T98	2		T55	2
auto[536870912:671088639]	auto[0]	128	1			T16	2		T24	2		T5	2
auto[536870912:671088639]	auto[1]	52	1			T189	2		T7	2		T198	2
auto[671088640:805306367]	auto[0]	100	1			T24	2		T5	2		T25	2
auto[671088640:805306367]	auto[1]	54	1			T103	2		T313	2		T46	2
auto[805306368:939524095]	auto[0]	126	1			T24	2		T33	2		T5	6
auto[805306368:939524095]	auto[1]	56	1			T22	2		T42	2		T7	2
auto[939524096:1073741823]	auto[0]	150	1			T1	2		T24	2		T5	2
auto[939524096:1073741823]	auto[1]	62	1			T5	2		T181	2		T23	2
auto[1073741824:1207959551]	auto[0]	126	1			T1	2		T33	2		T183	2
auto[1073741824:1207959551]	auto[1]	62	1			T194	2		T29	2		T220	2
auto[1207959552:1342177279]	auto[0]	102	1			T22	2		T91	2		T48	2
auto[1207959552:1342177279]	auto[1]	56	1			T93	2		T253	2		T231	2
auto[1342177280:1476395007]	auto[0]	112	1			T33	2		T5	2		T43	2
auto[1342177280:1476395007]	auto[1]	70	1			T5	2		T25	2		T81	2
auto[1476395008:1610612735]	auto[0]	112	1			T5	2		T43	2		T101	2
auto[1476395008:1610612735]	auto[1]	60	1			T194	2		T74	2		T223	2
auto[1610612736:1744830463]	auto[0]	128	1			T100	2		T29	2		T55	2
auto[1610612736:1744830463]	auto[1]	66	1			T25	2		T235	2		T231	2
auto[1744830464:1879048191]	auto[0]	122	1			T5	4		T23	2		T28	2
auto[1744830464:1879048191]	auto[1]	62	1			T45	2		T27	2		T60	2
auto[1879048192:2013265919]	auto[0]	136	1			T43	4		T75	2		T34	2
auto[1879048192:2013265919]	auto[1]	56	1			T5	2		T189	2		T34	2
auto[2013265920:2147483647]	auto[0]	159	1			T16	2		T5	2		T56	2
auto[2013265920:2147483647]	auto[1]	58	1			T354	2		T233	2		T348	2
auto[2147483648:2281701375]	auto[0]	148	1			T33	2		T5	4		T7	2
auto[2147483648:2281701375]	auto[1]	70	1			T21	4		T5	2		T186	2
auto[2281701376:2415919103]	auto[0]	118	1			T24	2		T5	2		T57	2
auto[2281701376:2415919103]	auto[1]	64	1			T5	2		T74	2		T81	2
auto[2415919104:2550136831]	auto[0]	134	1			T1	2		T5	2		T23	2
auto[2415919104:2550136831]	auto[1]	70	1			T125	2		T121	2		T55	4
auto[2550136832:2684354559]	auto[0]	142	1			T16	2		T24	2		T101	2
auto[2550136832:2684354559]	auto[1]	44	1			T8	2		T183	2		T101	2
auto[2684354560:2818572287]	auto[0]	114	1			T5	2		T186	2		T183	2
auto[2684354560:2818572287]	auto[1]	66	1			T5	2		T101	2		T60	2
auto[2818572288:2952790015]	auto[0]	140	1			T16	2		T5	4		T181	2
auto[2818572288:2952790015]	auto[1]	54	1			T99	2		T57	2		T300	2
auto[2952790016:3087007743]	auto[0]	136	1			T24	2		T5	4		T75	2
auto[2952790016:3087007743]	auto[1]	42	1			T5	2		T57	2		T60	4
auto[3087007744:3221225471]	auto[0]	134	1			T16	2		T5	2		T91	2
auto[3087007744:3221225471]	auto[1]	60	1			T5	2		T78	2		T102	2
auto[3221225472:3355443199]	auto[0]	138	1			T5	2		T56	2		T126	2
auto[3221225472:3355443199]	auto[1]	76	1			T5	4		T42	2		T6	2
auto[3355443200:3489660927]	auto[0]	114	1			T5	2		T28	2		T43	2
auto[3355443200:3489660927]	auto[1]	82	1			T5	4		T181	2		T98	2
auto[3489660928:3623878655]	auto[0]	104	1			T43	2		T48	2		T94	4
auto[3489660928:3623878655]	auto[1]	60	1			T43	4		T74	2		T221	2
auto[3623878656:3758096383]	auto[0]	138	1			T5	4		T22	2		T43	8
auto[3623878656:3758096383]	auto[1]	82	1			T1	2		T21	2		T92	2
auto[3758096384:3892314111]	auto[0]	120	1			T5	4		T181	2		T23	2
auto[3758096384:3892314111]	auto[1]	58	1			T126	2		T49	2		T104	2
auto[3892314112:4026531839]	auto[0]	114	1			T181	2		T45	2		T42	2
auto[3892314112:4026531839]	auto[1]	64	1			T1	2		T21	2		T5	2
auto[4026531840:4160749567]	auto[0]	176	1			T5	2		T181	2		T186	2
auto[4026531840:4160749567]	auto[1]	58	1			T5	2		T60	2		T303	2
auto[4160749568:4294967295]	auto[0]	154	1			T14	4		T5	6		T183	2
auto[4160749568:4294967295]	auto[1]	52	1			T5	4		T6	2		T64	2