Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4174

1

T5

6

T16

12

T18

6

auto[1]

2119

1

T3

2

T5

6

T16

10

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	208	1			T16	2		T41	2		T39	2
auto[134217728:268435455]	204	1			T7	4		T184	2		T48	4
auto[268435456:402653183]	204	1			T3	2		T20	2		T133	4
auto[402653184:536870911]	194	1			T42	2		T131	2		T45	2
auto[536870912:671088639]	172	1			T43	2		T47	2		T45	2
auto[671088640:805306367]	193	1			T41	2		T22	2		T46	2
auto[805306368:939524095]	192	1			T43	2		T7	4		T47	2
auto[939524096:1073741823]	190	1			T30	2		T182	2		T48	2
auto[1073741824:1207959551]	200	1			T18	2		T7	6		T114	2
auto[1207959552:1342177279]	232	1			T7	2		T180	2		T181	2
auto[1342177280:1476395007]	172	1			T5	2		T43	2		T30	2
auto[1476395008:1610612735]	198	1			T5	2		T25	2		T22	2
auto[1610612736:1744830463]	198	1			T5	2		T45	2		T180	2
auto[1744830464:1879048191]	228	1			T5	2		T16	2		T120	2
auto[1879048192:2013265919]	184	1			T18	2		T20	4		T120	2
auto[2013265920:2147483647]	200	1			T133	2		T7	2		T86	2
auto[2147483648:2281701375]	176	1			T18	2		T7	2		T45	2
auto[2281701376:2415919103]	232	1			T25	2		T131	2		T6	2
auto[2415919104:2550136831]	172	1			T5	2		T21	2		T6	2
auto[2550136832:2684354559]	218	1			T42	4		T43	4		T22	2
auto[2684354560:2818572287]	168	1			T23	2		T7	2		T87	2
auto[2818572288:2952790015]	196	1			T18	2		T25	2		T21	2
auto[2952790016:3087007743]	204	1			T42	2		T20	2		T120	2
auto[3087007744:3221225471]	180	1			T7	2		T39	2		T114	2
auto[3221225472:3355443199]	164	1			T22	2		T7	2		T182	2
auto[3355443200:3489660927]	226	1			T16	6		T20	2		T43	4
auto[3489660928:3623878655]	178	1			T5	2		T22	2		T6	2
auto[3623878656:3758096383]	218	1			T43	2		T22	2		T6	2
auto[3758096384:3892314111]	204	1			T16	2		T21	2		T48	4
auto[3892314112:4026531839]	188	1			T16	6		T18	2		T20	2
auto[4026531840:4160749567]	212	1			T16	2		T42	2		T23	2
auto[4160749568:4294967295]	188	1			T16	2		T21	2		T7	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	138	1			T24	4		T115	2		T48	4
auto[0:134217727]	auto[1]	70	1			T16	2		T41	2		T39	2
auto[134217728:268435455]	auto[0]	128	1			T7	4		T184	2		T48	2
auto[134217728:268435455]	auto[1]	76	1			T48	2		T96	2		T247	2
auto[268435456:402653183]	auto[0]	128	1			T20	2		T133	4		T87	2
auto[268435456:402653183]	auto[1]	76	1			T3	2		T115	2		T48	2
auto[402653184:536870911]	auto[0]	130	1			T42	2		T45	2		T48	2
auto[402653184:536870911]	auto[1]	64	1			T131	2		T182	2		T124	2
auto[536870912:671088639]	auto[0]	104	1			T43	2		T47	2		T45	2
auto[536870912:671088639]	auto[1]	68	1			T182	2		T124	2		T307	2
auto[671088640:805306367]	auto[0]	120	1			T22	2		T46	2		T60	2
auto[671088640:805306367]	auto[1]	73	1			T41	2		T39	2		T183	2
auto[805306368:939524095]	auto[0]	142	1			T43	2		T7	4		T195	2
auto[805306368:939524095]	auto[1]	50	1			T47	2		T91	2		T68	2
auto[939524096:1073741823]	auto[0]	126	1			T30	2		T48	2		T44	2
auto[939524096:1073741823]	auto[1]	64	1			T182	2		T60	2		T56	2
auto[1073741824:1207959551]	auto[0]	136	1			T18	2		T7	6		T183	2
auto[1073741824:1207959551]	auto[1]	64	1			T114	2		T48	2		T197	2
auto[1207959552:1342177279]	auto[0]	144	1			T7	2		T48	2		T96	2
auto[1207959552:1342177279]	auto[1]	88	1			T180	2		T181	2		T124	4
auto[1342177280:1476395007]	auto[0]	110	1			T30	2		T7	4		T87	2
auto[1342177280:1476395007]	auto[1]	62	1			T5	2		T43	2		T7	2
auto[1476395008:1610612735]	auto[0]	128	1			T5	2		T25	2		T22	2
auto[1476395008:1610612735]	auto[1]	70	1			T24	2		T48	2		T60	2
auto[1610612736:1744830463]	auto[0]	130	1			T45	2		T48	2		T60	2
auto[1610612736:1744830463]	auto[1]	68	1			T5	2		T180	2		T232	2
auto[1744830464:1879048191]	auto[0]	142	1			T16	2		T120	2		T7	4
auto[1744830464:1879048191]	auto[1]	86	1			T5	2		T7	4		T39	2
auto[1879048192:2013265919]	auto[0]	108	1			T20	4		T120	2		T133	2
auto[1879048192:2013265919]	auto[1]	76	1			T18	2		T60	2		T65	2
auto[2013265920:2147483647]	auto[0]	132	1			T133	2		T7	2		T86	2
auto[2013265920:2147483647]	auto[1]	68	1			T60	2		T300	2		T97	2
auto[2147483648:2281701375]	auto[0]	118	1			T18	2		T7	2		T90	2
auto[2147483648:2281701375]	auto[1]	58	1			T45	2		T314	2		T299	2
auto[2281701376:2415919103]	auto[0]	154	1			T25	2		T135	2		T46	2
auto[2281701376:2415919103]	auto[1]	78	1			T131	2		T6	2		T124	2
auto[2415919104:2550136831]	auto[0]	128	1			T5	2		T21	2		T6	2
auto[2415919104:2550136831]	auto[1]	44	1			T56	2		T261	2		T68	2
auto[2550136832:2684354559]	auto[0]	128	1			T42	2		T43	2		T48	2
auto[2550136832:2684354559]	auto[1]	90	1			T42	2		T43	2		T22	2
auto[2684354560:2818572287]	auto[0]	106	1			T23	2		T7	2		T87	2
auto[2684354560:2818572287]	auto[1]	62	1			T182	2		T57	2		T257	2
auto[2818572288:2952790015]	auto[0]	132	1			T25	2		T21	2		T22	2
auto[2818572288:2952790015]	auto[1]	64	1			T18	2		T90	2		T48	4
auto[2952790016:3087007743]	auto[0]	134	1			T42	2		T120	2		T7	2
auto[2952790016:3087007743]	auto[1]	70	1			T20	2		T135	2		T182	2
auto[3087007744:3221225471]	auto[0]	122	1			T7	2		T114	2		T26	2
auto[3087007744:3221225471]	auto[1]	58	1			T39	2		T57	2		T48	2
auto[3221225472:3355443199]	auto[0]	114	1			T22	2		T7	2		T183	2
auto[3221225472:3355443199]	auto[1]	50	1			T182	2		T257	2		T203	2
auto[3355443200:3489660927]	auto[0]	162	1			T16	6		T20	2		T43	4
auto[3355443200:3489660927]	auto[1]	64	1			T181	2		T48	2		T70	2
auto[3489660928:3623878655]	auto[0]	136	1			T5	2		T22	2		T6	2
auto[3489660928:3623878655]	auto[1]	42	1			T124	2		T60	2		T351	2
auto[3623878656:3758096383]	auto[0]	152	1			T43	2		T22	2		T23	2
auto[3623878656:3758096383]	auto[1]	66	1			T6	2		T195	2		T124	2
auto[3758096384:3892314111]	auto[0]	156	1			T21	2		T48	2		T59	2
auto[3758096384:3892314111]	auto[1]	48	1			T16	2		T48	2		T67	2
auto[3892314112:4026531839]	auto[0]	132	1			T16	2		T18	2		T20	2
auto[3892314112:4026531839]	auto[1]	56	1			T16	4		T257	2		T70	2
auto[4026531840:4160749567]	auto[0]	132	1			T16	2		T87	2		T24	2
auto[4026531840:4160749567]	auto[1]	80	1			T42	2		T23	2		T60	4
auto[4160749568:4294967295]	auto[0]	122	1			T21	2		T7	2		T195	2
auto[4160749568:4294967295]	auto[1]	66	1			T16	2		T48	2		T60	2