SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 8 | 0 | 8 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
invalid_hw_input_cp | 8 | 0 | 8 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 8 | 0 | 8 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[OtpRootKeyInvalid] | 869 | 1 | T22 | 50 | T23 | 50 | T24 | 10 | ||||
auto[OtpRootKeyValidLow] | 181 | 1 | T22 | 7 | T23 | 7 | T24 | 1 | ||||
auto[LcStateInvalid] | 120 | 1 | T15 | 24 | T104 | 24 | T393 | 24 | ||||
auto[OtpDevIdInvalid] | 156 | 1 | T15 | 24 | T394 | 60 | T286 | 24 | ||||
auto[RomDigestInvalid] | 144 | 1 | T104 | 48 | T393 | 48 | T286 | 24 | ||||
auto[RomDigestValidLow] | 180 | 1 | T15 | 36 | T344 | 12 | T395 | 12 | ||||
auto[FlashCreatorSeedInvalid] | 36 | 1 | T91 | 12 | T281 | 24 | - | - | ||||
auto[FlashOwnerSeedInvalid] | 108 | 1 | T21 | 24 | T99 | 12 | T100 | 72 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |