Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6770

1

T6

18

T15

16

T25

46

auto[1]

285

1

T124

9

T125

16

T126

14

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	2870	1			T6	6		T15	8		T25	17
auto[134217728:268435455]	144	1			T49	1		T199	1		T59	1
auto[268435456:402653183]	186	1			T35	1		T197	1		T198	1
auto[402653184:536870911]	142	1			T15	1		T25	2		T150	2
auto[536870912:671088639]	125	1			T6	2		T25	1		T59	1
auto[671088640:805306367]	131	1			T34	1		T35	1		T59	1
auto[805306368:939524095]	136	1			T40	1		T150	2		T124	2
auto[939524096:1073741823]	130	1			T6	2		T35	1		T198	1
auto[1073741824:1207959551]	156	1			T6	1		T15	1		T25	3
auto[1207959552:1342177279]	142	1			T15	1		T40	1		T7	2
auto[1342177280:1476395007]	135	1			T150	1		T49	1		T35	2
auto[1476395008:1610612735]	138	1			T6	2		T25	3		T199	1
auto[1610612736:1744830463]	132	1			T15	1		T25	1		T35	1
auto[1744830464:1879048191]	143	1			T25	2		T45	1		T124	1
auto[1879048192:2013265919]	134	1			T15	1		T25	1		T150	1
auto[2013265920:2147483647]	128	1			T25	1		T35	1		T59	1
auto[2147483648:2281701375]	106	1			T59	1		T126	2		T53	1
auto[2281701376:2415919103]	141	1			T25	1		T150	1		T199	1
auto[2415919104:2550136831]	144	1			T6	1		T25	2		T35	2
auto[2550136832:2684354559]	123	1			T198	1		T199	1		T124	1
auto[2684354560:2818572287]	109	1			T25	1		T124	2		T59	2
auto[2818572288:2952790015]	120	1			T6	1		T25	2		T197	1
auto[2952790016:3087007743]	131	1			T15	1		T35	1		T198	1
auto[3087007744:3221225471]	116	1			T15	1		T25	2		T59	3
auto[3221225472:3355443199]	143	1			T15	1		T150	1		T45	1
auto[3355443200:3489660927]	155	1			T6	2		T25	1		T40	1
auto[3489660928:3623878655]	145	1			T25	1		T150	1		T35	2
auto[3623878656:3758096383]	116	1			T25	1		T35	1		T59	1
auto[3758096384:3892314111]	138	1			T34	1		T59	2		T7	1
auto[3892314112:4026531839]	119	1			T25	2		T199	1		T124	1
auto[4026531840:4160749567]	129	1			T25	1		T35	1		T199	1
auto[4160749568:4294967295]	148	1			T6	1		T25	1		T44	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	2855	1			T6	6		T15	8		T25	17
auto[0:134217727]	auto[1]	15	1			T125	1		T85	1		T258	1
auto[134217728:268435455]	auto[0]	136	1			T49	1		T199	1		T59	1
auto[134217728:268435455]	auto[1]	8	1			T125	2		T408	1		T407	2
auto[268435456:402653183]	auto[0]	174	1			T35	1		T197	1		T198	1
auto[268435456:402653183]	auto[1]	12	1			T125	1		T269	1		T370	1
auto[402653184:536870911]	auto[0]	133	1			T15	1		T25	2		T150	2
auto[402653184:536870911]	auto[1]	9	1			T302	1		T409	1		T407	1
auto[536870912:671088639]	auto[0]	120	1			T6	2		T25	1		T59	1
auto[536870912:671088639]	auto[1]	5	1			T371	1		T408	1		T376	1
auto[671088640:805306367]	auto[0]	125	1			T34	1		T35	1		T59	1
auto[671088640:805306367]	auto[1]	6	1			T117	1		T420	1		T421	1
auto[805306368:939524095]	auto[0]	127	1			T40	1		T150	2		T124	1
auto[805306368:939524095]	auto[1]	9	1			T124	1		T126	1		T269	1
auto[939524096:1073741823]	auto[0]	119	1			T6	2		T35	1		T198	1
auto[939524096:1073741823]	auto[1]	11	1			T126	1		T269	1		T333	1
auto[1073741824:1207959551]	auto[0]	141	1			T6	1		T15	1		T25	3
auto[1073741824:1207959551]	auto[1]	15	1			T124	1		T125	2		T258	1
auto[1207959552:1342177279]	auto[0]	130	1			T15	1		T40	1		T7	2
auto[1207959552:1342177279]	auto[1]	12	1			T125	2		T269	1		T422	1
auto[1342177280:1476395007]	auto[0]	128	1			T150	1		T49	1		T35	2
auto[1342177280:1476395007]	auto[1]	7	1			T125	1		T269	1		T258	1
auto[1476395008:1610612735]	auto[0]	125	1			T6	2		T25	3		T199	1
auto[1476395008:1610612735]	auto[1]	13	1			T124	1		T125	2		T126	2
auto[1610612736:1744830463]	auto[0]	125	1			T15	1		T25	1		T35	1
auto[1610612736:1744830463]	auto[1]	7	1			T409	2		T353	1		T246	1
auto[1744830464:1879048191]	auto[0]	131	1			T25	2		T45	1		T7	1
auto[1744830464:1879048191]	auto[1]	12	1			T124	1		T125	1		T258	1
auto[1879048192:2013265919]	auto[0]	126	1			T15	1		T25	1		T150	1
auto[1879048192:2013265919]	auto[1]	8	1			T124	1		T302	1		T346	1
auto[2013265920:2147483647]	auto[0]	116	1			T25	1		T35	1		T59	1
auto[2013265920:2147483647]	auto[1]	12	1			T125	2		T254	2		T258	1
auto[2147483648:2281701375]	auto[0]	90	1			T59	1		T53	1		T210	1
auto[2147483648:2281701375]	auto[1]	16	1			T126	2		T269	1		T254	1
auto[2281701376:2415919103]	auto[0]	134	1			T25	1		T150	1		T199	1
auto[2281701376:2415919103]	auto[1]	7	1			T126	1		T254	1		T258	1
auto[2415919104:2550136831]	auto[0]	138	1			T6	1		T25	2		T35	2
auto[2415919104:2550136831]	auto[1]	6	1			T126	1		T258	1		T370	1
auto[2550136832:2684354559]	auto[0]	119	1			T198	1		T199	1		T205	1
auto[2550136832:2684354559]	auto[1]	4	1			T124	1		T125	1		T254	1
auto[2684354560:2818572287]	auto[0]	103	1			T25	1		T59	2		T7	2
auto[2684354560:2818572287]	auto[1]	6	1			T124	2		T258	1		T333	1
auto[2818572288:2952790015]	auto[0]	118	1			T6	1		T25	2		T197	1
auto[2818572288:2952790015]	auto[1]	2	1			T421	1		T305	1		-	-
auto[2952790016:3087007743]	auto[0]	123	1			T15	1		T35	1		T198	1
auto[2952790016:3087007743]	auto[1]	8	1			T126	1		T269	1		T258	1
auto[3087007744:3221225471]	auto[0]	108	1			T15	1		T25	2		T59	3
auto[3087007744:3221225471]	auto[1]	8	1			T125	1		T412	1		T358	1
auto[3221225472:3355443199]	auto[0]	137	1			T15	1		T150	1		T45	1
auto[3221225472:3355443199]	auto[1]	6	1			T126	1		T371	1		T348	1
auto[3355443200:3489660927]	auto[0]	144	1			T6	2		T25	1		T40	1
auto[3355443200:3489660927]	auto[1]	11	1			T124	1		T126	3		T258	1
auto[3489660928:3623878655]	auto[0]	136	1			T25	1		T150	1		T35	2
auto[3489660928:3623878655]	auto[1]	9	1			T370	1		T371	1		T381	1
auto[3623878656:3758096383]	auto[0]	106	1			T25	1		T35	1		T59	1
auto[3623878656:3758096383]	auto[1]	10	1			T126	1		T85	1		T333	1
auto[3758096384:3892314111]	auto[0]	129	1			T34	1		T59	2		T7	1
auto[3758096384:3892314111]	auto[1]	9	1			T254	1		T117	1		T422	1
auto[3892314112:4026531839]	auto[0]	108	1			T25	2		T199	1		T124	1
auto[3892314112:4026531839]	auto[1]	11	1			T254	1		T370	1		T381	1
auto[4026531840:4160749567]	auto[0]	123	1			T25	1		T35	1		T199	1
auto[4026531840:4160749567]	auto[1]	6	1			T422	1		T407	1		T380	1
auto[4160749568:4294967295]	auto[0]	143	1			T6	1		T25	1		T44	1
auto[4160749568:4294967295]	auto[1]	5	1			T272	1		T302	1		T353	1