Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4082

1

T5

10

T6

2

T24

6

auto[1]

2034

1

T5

2

T24

6

T20

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	180	1			T5	2		T20	2		T7	4
auto[134217728:268435455]	186	1			T22	2		T7	6		T145	2
auto[268435456:402653183]	164	1			T5	2		T53	2		T123	2
auto[402653184:536870911]	182	1			T145	2		T53	6		T231	2
auto[536870912:671088639]	204	1			T5	4		T25	2		T7	8
auto[671088640:805306367]	210	1			T5	2		T25	2		T7	4
auto[805306368:939524095]	184	1			T7	2		T53	2		T38	2
auto[939524096:1073741823]	196	1			T7	6		T143	2		T53	6
auto[1073741824:1207959551]	208	1			T20	2		T44	2		T25	2
auto[1207959552:1342177279]	214	1			T146	2		T53	8		T91	2
auto[1342177280:1476395007]	178	1			T5	2		T23	2		T7	2
auto[1476395008:1610612735]	186	1			T20	2		T43	2		T23	2
auto[1610612736:1744830463]	180	1			T25	2		T7	2		T53	2
auto[1744830464:1879048191]	190	1			T25	2		T7	4		T53	6
auto[1879048192:2013265919]	188	1			T20	2		T22	2		T7	6
auto[2013265920:2147483647]	162	1			T23	2		T7	4		T91	2
auto[2147483648:2281701375]	186	1			T6	2		T24	2		T7	4
auto[2281701376:2415919103]	172	1			T7	2		T53	4		T36	2
auto[2415919104:2550136831]	220	1			T24	2		T43	2		T50	2
auto[2550136832:2684354559]	204	1			T24	2		T44	2		T25	2
auto[2684354560:2818572287]	188	1			T7	2		T146	2		T231	2
auto[2818572288:2952790015]	202	1			T20	2		T21	4		T23	2
auto[2952790016:3087007743]	182	1			T50	2		T7	2		T159	2
auto[3087007744:3221225471]	192	1			T20	2		T25	4		T7	2
auto[3221225472:3355443199]	178	1			T24	2		T36	2		T89	2
auto[3355443200:3489660927]	160	1			T44	2		T21	2		T27	2
auto[3489660928:3623878655]	192	1			T7	6		T146	2		T121	2
auto[3623878656:3758096383]	232	1			T24	4		T22	2		T7	4
auto[3758096384:3892314111]	210	1			T20	2		T46	4		T53	2
auto[3892314112:4026531839]	198	1			T20	2		T50	2		T7	12
auto[4026531840:4160749567]	202	1			T46	2		T53	2		T89	2
auto[4160749568:4294967295]	186	1			T7	2		T145	2		T53	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	124	1			T5	2		T7	2		T91	2
auto[0:134217727]	auto[1]	56	1			T20	2		T7	2		T54	6
auto[134217728:268435455]	auto[0]	114	1			T22	2		T7	4		T145	2
auto[134217728:268435455]	auto[1]	72	1			T7	2		T122	2		T41	4
auto[268435456:402653183]	auto[0]	120	1			T5	2		T53	2		T91	2
auto[268435456:402653183]	auto[1]	44	1			T123	2		T231	2		T105	2
auto[402653184:536870911]	auto[0]	126	1			T145	2		T53	4		T54	2
auto[402653184:536870911]	auto[1]	56	1			T53	2		T231	2		T90	2
auto[536870912:671088639]	auto[0]	136	1			T5	2		T25	2		T7	8
auto[536870912:671088639]	auto[1]	68	1			T5	2		T90	2		T41	2
auto[671088640:805306367]	auto[0]	138	1			T5	2		T25	2		T7	2
auto[671088640:805306367]	auto[1]	72	1			T7	2		T123	2		T104	2
auto[805306368:939524095]	auto[0]	110	1			T7	2		T53	2		T38	2
auto[805306368:939524095]	auto[1]	74	1			T56	2		T291	2		T322	2
auto[939524096:1073741823]	auto[0]	130	1			T7	2		T143	2		T53	4
auto[939524096:1073741823]	auto[1]	66	1			T7	4		T53	2		T54	2
auto[1073741824:1207959551]	auto[0]	144	1			T20	2		T44	2		T25	2
auto[1073741824:1207959551]	auto[1]	64	1			T53	2		T322	2		T88	2
auto[1207959552:1342177279]	auto[0]	150	1			T146	2		T53	6		T91	2
auto[1207959552:1342177279]	auto[1]	64	1			T53	2		T27	2		T322	2
auto[1342177280:1476395007]	auto[0]	118	1			T5	2		T23	2		T7	2
auto[1342177280:1476395007]	auto[1]	60	1			T46	2		T217	2		T228	2
auto[1476395008:1610612735]	auto[0]	120	1			T23	2		T7	2		T122	2
auto[1476395008:1610612735]	auto[1]	66	1			T20	2		T43	2		T53	2
auto[1610612736:1744830463]	auto[0]	116	1			T25	2		T53	2		T47	4
auto[1610612736:1744830463]	auto[1]	64	1			T7	2		T54	2		T227	2
auto[1744830464:1879048191]	auto[0]	126	1			T25	2		T7	4		T53	6
auto[1744830464:1879048191]	auto[1]	64	1			T273	2		T56	2		T217	2
auto[1879048192:2013265919]	auto[0]	122	1			T20	2		T7	2		T146	2
auto[1879048192:2013265919]	auto[1]	66	1			T22	2		T7	4		T53	4
auto[2013265920:2147483647]	auto[0]	110	1			T23	2		T7	2		T91	2
auto[2013265920:2147483647]	auto[1]	52	1			T7	2		T55	2		T429	2
auto[2147483648:2281701375]	auto[0]	118	1			T6	2		T7	4		T146	2
auto[2147483648:2281701375]	auto[1]	68	1			T24	2		T53	2		T88	2
auto[2281701376:2415919103]	auto[0]	124	1			T7	2		T53	4		T36	2
auto[2281701376:2415919103]	auto[1]	48	1			T280	2		T448	2		T63	2
auto[2415919104:2550136831]	auto[0]	140	1			T24	2		T50	2		T7	4
auto[2415919104:2550136831]	auto[1]	80	1			T43	2		T145	2		T53	2
auto[2550136832:2684354559]	auto[0]	144	1			T44	2		T25	2		T7	2
auto[2550136832:2684354559]	auto[1]	60	1			T24	2		T55	2		T56	2
auto[2684354560:2818572287]	auto[0]	122	1			T7	2		T159	6		T62	2
auto[2684354560:2818572287]	auto[1]	66	1			T146	2		T231	2		T41	2
auto[2818572288:2952790015]	auto[0]	128	1			T20	2		T23	2		T7	2
auto[2818572288:2952790015]	auto[1]	74	1			T21	4		T7	2		T311	2
auto[2952790016:3087007743]	auto[0]	122	1			T7	2		T159	2		T54	4
auto[2952790016:3087007743]	auto[1]	60	1			T50	2		T10	2		T253	2
auto[3087007744:3221225471]	auto[0]	116	1			T20	2		T25	4		T143	2
auto[3087007744:3221225471]	auto[1]	76	1			T7	2		T53	6		T37	2
auto[3221225472:3355443199]	auto[0]	130	1			T24	2		T89	2		T122	2
auto[3221225472:3355443199]	auto[1]	48	1			T36	2		T105	2		T205	2
auto[3355443200:3489660927]	auto[0]	106	1			T27	2		T54	2		T56	2
auto[3355443200:3489660927]	auto[1]	54	1			T44	2		T21	2		T446	2
auto[3489660928:3623878655]	auto[0]	120	1			T7	2		T146	2		T89	2
auto[3489660928:3623878655]	auto[1]	72	1			T7	4		T121	2		T54	2
auto[3623878656:3758096383]	auto[0]	154	1			T24	2		T22	2		T7	4
auto[3623878656:3758096383]	auto[1]	78	1			T24	2		T221	2		T231	2
auto[3758096384:3892314111]	auto[0]	142	1			T20	2		T46	4		T53	2
auto[3758096384:3892314111]	auto[1]	68	1			T220	2		T417	2		T229	2
auto[3892314112:4026531839]	auto[0]	138	1			T20	2		T50	2		T7	8
auto[3892314112:4026531839]	auto[1]	60	1			T7	4		T280	2		T96	2
auto[4026531840:4160749567]	auto[0]	142	1			T46	2		T89	2		T54	2
auto[4026531840:4160749567]	auto[1]	60	1			T53	2		T221	2		T54	2
auto[4160749568:4294967295]	auto[0]	132	1			T7	2		T145	2		T37	2
auto[4160749568:4294967295]	auto[1]	54	1			T53	2		T121	2		T88	2