Unified Coverage Report :: Group :: push_pull_agent_pkg::req_ack_cg

Group : push_pull_agent_pkg::req_ack_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_push_pull_agent_0.1/push_pull_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_0.cov::m_req_ack_cg	100.00	1	100	1	64	64
push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_1.cov::m_req_ack_cg	100.00	1	100	1	64	64

---

Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_0.cov::m_req_ack_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_0.cov::m_req_ack_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_0.cov::m_req_ack_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_req_ack	3	0	3	100.00	100	1	1	4

---

Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_1.cov::m_req_ack_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_1.cov::m_req_ack_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_adc_push_pull_agent_1.cov::m_req_ack_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_req_ack	3	0	3	100.00	100	1	1	4

Summary for Variable cp_req_ack

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	3	0	3	100.00

Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins

NAME	COUNT	STATUS
ack_wo_req	0	Excluded
[auto[1]]	0	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	794389	1			T12	2219		T13	2532		T14	1695
auto[2]	792537	1			T12	2219		T13	2529		T14	1693
auto[3]	788157	1			T12	2217		T13	2526		T14	1691

Summary for Variable cp_req_ack

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	3	0	3	100.00

Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins

NAME	COUNT	STATUS
ack_wo_req	0	Excluded
[auto[1]]	0	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	787763	1			T12	2214		T13	2526		T14	1691
auto[2]	787948	1			T12	2217		T13	2526		T14	1691
auto[3]	787206	1			T12	2215		T13	2526		T14	1691